CLS-16D24-44-DF8/TR8

RGBW Color Sensor with I2C Interface CLS-16D24-44-DF8/TR8 Features • I2C interface (Fast Speed Mode at 400kHz/s) • Supply Voltage Range from 2.4V to 3.6V • I2C BUS Voltage Range from 1.7V to 3.6V • Operating Temperature Range from-40°C to +65°C • Support parallel output for (R, G, B, W, IR) • Up to 16-bit Digital Output (0~65535) • Programmable Dynamic Range Ratio (x1, x4, x8, x32, x96) • High resolution (0.002 Lux/count) • Maximum detection lux ( 204,679 Lux) • Programmable integration time • 50Hz/60Hz flicker noise and IR rejection • Individual programmable low and high threshold for interrupt function • The product itself will remain within RoHS compliant version • Compliance with EU REACH • Compliance Halogen Free(Br < 900ppm, Cl < 900ppm, Br+Cl < 1500ppm) Description The CLS-16D24-44-DF8/TR8 is a low power, high sensitivity, Color light sensor with an I 2C interface. This color sensor senses red, green, blue, white (RGBW) and infrared light and converts them to digital values. The RGBW sensor is designed to reject IR in light sources allowing the device to operate in environments from sunlight to dark rooms. The integrating ADC rejects 50Hz and 60Hz flicker caused by artificial light sources. A selectable range allows the user to optimize sensitivity suitable for the illuminance and color temperature of ambient light for adjusting LCD backlight of TV, mobile phone and tablet PC. The CLS-16D24-44-DF8/TR8 supports hardware and software user programmable interrupt thresholds. Applications • Detection of ambient for controlling the backlight of TFT LCD display. • Automatic residential and commercial lighting management. • Automatic contrast enhancement for electronic signboard. • Mobile phone, Smart phone, PDA, Tablet PC. 1 Copyright © 2017, Everlight All Rights Reserved. Release Date : 09.07.2020. Issue No: DLS-0000230 Rev:5 Ver.:5 Release Date:09/15/2020 　 狀態:Approved(正式發行) www.everlight.com DATASHEET SMD  CLS WITH 16BIT I2C INTERFACE CLS-16D24-44-DF8/TR8 Block Diagram VDD R PGA Circuit ADC G PGA Circuit ADC B PGA Circuit ADC C PGA Circuit ADC IR PGA Circuit ADC G B W IR Oscillator INT ASIC IO Interface IR Cut Filter R SCL SDA Temperature Circuit GND 2 Copyright © 2017, Everlight All Rights Reserved. Release Date : 09.07.2020. Issue No: DLS-0000230 Rev:5 Ver.:5 Release Date:09/15/2020 　 狀態:Approved(正式發行) www.everlight.com DATASHEET SMD  CLS WITH 16BIT I2C INTERFACE CLS-16D24-44-DF8/TR8 I/O Pins Configuration Pad Description Pin I/O Type Pin Name Description 1 NC NC No connection 2 PWR VDD Power supply 3 GND GND Ground 4 NC NC No connection 5 I SCL I2C serial clock line 6 I/O SDA I2C serial data line 7 O INT Interrupt pin 8 NC NC No connection Direction denotation: 3 I/O Type Dir. I/O Type Dir. O Output GND I Input I/O Input / Output PWR Power NC Not Connect Ground Copyright © 2017, Everlight All Rights Reserved. Release Date : 09.07.2020. Issue No: DLS-0000230 Rev:5 Ver.:5 Release Date:09/15/2020 　 狀態:Approved(正式發行) www.everlight.com DATASHEET SMD  CLS WITH 16BIT I2C INTERFACE CLS-16D24-44-DF8/TR8 Absolute Maximum Ratings Parameter Symbol Rating Unit Supply Voltage VDD 4.5 V I2C Bus Pin Voltage SCL, SDA, INT -0.2 to 4.5 V Operating Temperature Tope -40 to +65 ℃ Storage Temperature Tstg -40 to +100 ℃ Human Body Model 2 KV ESD Rating Note: Exceeding these ratings could cause damage to the device. All voltages are with respect to ground. Currents are positive into, negative out of the specified terminal. Recommended Operating Conditions Parameter Symbol Min. Typ. Max. Unit Condition Supply Voltage (Note 1 ) VDD 2.4 - 3.6 V - I2 C Bus Pin Voltage VBus 1.62 1.8 VDD V VBus≤VDD Operating Temperature Tope -40 - +65 ℃ - - - - - V - V - I2C Bus Input High Voltage ( Note2 ) I2C Bus Input Low VoltageNote2 VIH_SCL, VBus x 0.7 VIH_SDA VIL_SCL, - - VIL_SDA - - 0.5 Notes: 1. The power supply need to make sure the VDD slew rate at least 1.0V/ms. CLS-16D24-44-DF8/TR8 has a power on reset function. When VDD drops below 2V at room temp, the IC will be reset automatically. After power back up at the required slew rate, the I2C registers need to be set again to the required values. 2. The specs are defined under VDD=3.3V, Ta=25°C 4 Copyright © 2017, Everlight All Rights Reserved. Release Date : 09.07.2020. Issue No: DLS-0000230 Rev:5 Ver.:5 Release Date:09/15/2020 　 狀態:Approved(正式發行) www.everlight.com DATASHEET SMD  CLS WITH 16BIT I2C INTERFACE CLS-16D24-44-DF8/TR8 Electro-Optical Characteristics (VDD=3.3V, Ta = 25℃) Parameter Symbol Min. Typ. Max. Unit Condition IDD - 210 - μA EV = 0 lx (Note 1) Sleep mode EV = 0 lx I2C inactive Supply Current IPD - 2.5 - μA A/DC resolution - 10 - 16 bit - ADC integration time TINT 2.067 - 2116 ms INT_TIME x CLSCONV Sensing Area DIOD_SELT 1 - 2 - - Full ADC counts value - 1023 - 65535 counts - 0 1 3 counts EV = 0 lx (Note 2) RCH - 1500 - counts λP=632 nm LED (Note 3,5) GCH - 3300 - counts λP=518 nm LED (Note 3,6) BCH - 2100 - counts λP=468 nm LED (Note 3,7) CLS detection resolution - - - 0.002 lx/count White LED 6500K (Note 2) CLS maximum detection intensity - - - 204K Lux White LED 6500K (Note 4) - nm - RCH GCH Dark ADC Count BCH WCH Irradiance response λPRed Peak sensitivity wavelength λPGreen λPBlue 610 - 550 470 Note : 1. 2. 3. 4. 5. 6. 7. 5 The testing condition: EN_CLS=1, DIOD_SELT=2, PGA_CLS=x4, INT_TIME=64 T, CLSCONV=1 INT_TIME The testing condition: EN_CLS=1, DIOD_SELT=2, PGA_CLS=x96, INT_TIME=64 T, CLSCONV=16 INT_TIME The testing condition: EN_CLS=1, DIOD_SELT=2, PGA_CLS=x96, INT_TIME=16 T, CLSCONV=6 INT_TIME The testing condition: EN_CLS=1, DIOD_SELT=1, PGA_CLS=x1, INT_TIME=1 T, CLSCONV=1 INT_TIME Red LED is used as optical source. ( Ie = 20 μW/cm2) Green LED is used as optical source. ( Ie = 20 μW/cm2) Blue LED is used as optical source. ( Ie = 20 μW/cm2) Copyright © 2017, Everlight All Rights Reserved. Release Date : 09.07.2020. Issue No: DLS-0000230 Rev:5 Ver.:5 Release Date:09/15/2020 　 狀態:Approved(正式發行) www.everlight.com DATASHEET SMD  CLS WITH 16BIT I2C INTERFACE CLS-16D24-44-DF8/TR8 I2C Write Format S Slave Addr 7 Bit Reg Addr 8 Bit A W A Data 8 Bit A P I2C Block Write Format S Slave Addr 7 Bit A W Reg Addr 8 Bit Data 8 Bit A A A Data 8 Bit A P I2C Read Format S Slave Addr 7 Bit W Reg Addr 8 Bit A A S Slave Addr 7 Bit Data 8 Bit R A N P I2C Block Read Format S Slave Addr 7 Bit W Reg Addr 8 Bit A A S Slave Addr 7 Bit Data 8 Bit R A A Master to Slave Slave to Master Data 8 Bit A N P S Start Condition, 1 Bit P Stop Condition, 1 Bit W Write, Set 0 for write, 1 Bit R Read, Set 1 for read, 1 Bit A Acknowledge(ACK), Set 0, 1 Bit N Non acknowledge(NACK), Set 1, 1 Bit I2C Slave Address and R/W bit This address is seven bits long followed by an eighth bit which is a data direction bit (R/W). A ‘0’ indicates a transmission (WRITE), a ‘1’ indicates a request for data (READ). The slave address of this device is 0x38. 6 Copyright © 2017, Everlight All Rights Reserved. Release Date : 09.07.2020. Issue No: DLS-0000230 Rev:5 Ver.:5 Release Date:09/15/2020 　 狀態:Approved(正式發行) www.everlight.com DATASHEET SMD  CLS WITH 16BIT I2C INTERFACE CLS-16D24-44-DF8/TR8 Register Set The CLS-16D24-44-DF8/TR8 is operated over the I2C bus with registers that contain configuration, status, and result information. All registers are 8 bits long. 7 Address Name Type Default value Description 0x00 SYSM_CTRL RW 0x00 CLS operation mode control, waiting mode control, SW reset 0x01 INT_CTRL RW 0x03 Interrupt pin control, interrupt persist control 0x02 INT_FLAG RW 0x00 Interrupt flag, reset(POR) flag 0x03 WAIT_TIME RW 0x00 Waiting time setting 0x04 CLS_GAIN RW 0x00 CLS analog gain setting 0x05 CLS_TIME RW 0x00 CLS integrated time setting 0x0B PERSISTENCE RW 0x11 CLS persistence setting 0x0C CLS_THRES_LL RW 0x00 CLS lower interrupt threshold - LSB 0x0D CLS_THRES_LH RW 0x00 CLS lower interrupt threshold - MSB 0x0E CLS_THRES_HL RW 0xFF CLS higher interrupt threshold - LSB 0x0F CLS_THRES_HH RW 0xFF CLS higher interrupt threshold - MSB 0x16 INT_SOURCE RW 0x08 CLS interrupt source 0x17 ERROR_FLAG RW 0x00 Error flag 0x1C RCH_DATA_L R 0x00 RCH output data - LSB 0x1D RCH_DATA_H R 0x00 RCH output data - MSB 0x1E GCH_DATA_L R 0x00 GCH output data - LSB 0x1F GCH_DATA_H R 0x00 GCH output data - MSB 0x20 BCH_DATA_L R 0x00 BCH output data - LSB 0x21 BCH_DATA_H R 0x00 BCH output data - MSB 0x22 WCH_DATA_L R 0x00 WCH output data - LSB 0x23 WCH_DATA_H R 0x00 WCH output data - MSB 0x24 IRCH_DATA_L R 0x00 IRCH output data - LSB 0x25 IRCH_DATA_H R 0x00 IRCH output data - MSB 0xBC PROD_ID_L R 0x12 Product ID - LSB 0xBD PROD_ID_H R 0x07 Product ID - MSB Copyright © 2017, Everlight All Rights Reserved. Release Date : 09.07.2020. Issue No: DLS-0000230 Rev:5 Ver.:5 Release Date:09/15/2020 　 error 狀態:Approved(正式發行) flag, power on www.everlight.com DATASHEET SMD  CLS WITH 16BIT I2C INTERFACE CLS-16D24-44-DF8/TR8 SYSM_CTRL 0x00 BIT R/W 7 SWRST SYSM_CTRL, System Control (Default = 0x00) 5 4 3 2 0 0 0 0 6 EN_WAIT 1 EN_IR 0 EN_CLS 1 0 0 EN_CINT SWRST：Software reset. Reset all register to default value. 0: (Default) 1: Reset will be triggered. EN_WAIT：Waiting time will be inserted between two measurements. 0: Disable waiting function. (Default) 1: Enable waiting function. EN_IR：Enables IR function. 0: Disable IR function. (Default) 1: Enable IR function. EN_CLS：Enables CLS function. 0: Disable CLS function. (Default) 1: Enable CLS function. INT_CTRL 0x01 BIT 7 6 R/W 0 0 Interrupt Pin Control (Default = 0x01) 5 4 3 2 CLS_ 0 0 0 SYNC CLS_SYNC：Measurement is pended when CLS interrupt is triggered. Until clear the interrupt then start the next measurement. 0: Disable pending CLS function. (Default) 1: Enable pending CLS function. EN_CINT：The CLS interrupt (INT_CLS) flag can trigger the INT pin to low. 0: Disable INT_CLS effect INT pin. 1: Enable INT_CLS effect INT pin. (Default) 8 Copyright © 2017, Everlight All Rights Reserved. Release Date : 09.07.2020. Issue No: DLS-0000230 Rev:5 Ver.:5 Release Date:09/15/2020 　 狀態:Approved(正式發行) www.everlight.com DATASHEET SMD  CLS WITH 16BIT I2C INTERFACE CLS-16D24-44-DF8/TR8 INT_FLAG 0x02 BIT 7 R/W INT_POR 6 DATA_ FLAG INT_FLAG, System Control (Default = 0x00) 5 4 3 2 0 0 0 0 1 0 0 INT_CLS INT_POR： Power-On-Reset Interrupt flag trigger the INT pin when the flag sets to one. Write zero to clear the flag. 0: Clear the flag 1: This bit will be set to one when it satisfy one of the following conditions:  Power On  VDD < 2.0V  SWRST DATA_FLAG： It shows if any data is invalid after completion of each conversion cycle. This bit is read-only. 0: data valid. 1: data invalid. INT_CLS： CLS Interrupt flag. It correlation with sensor data and CLS high/low threshold. Write zero to clear the flag. 0: CLS Interrupt not trigger or be cleared. 1: CLS interrupt triggered Interrupt Behavior: POR INT CLS Algorithm EN_CINT 9 Copyright © 2017, Everlight All Rights Reserved. Release Date : 09.07.2020. Issue No: DLS-0000230 Rev:5 Ver.:5 Release Date:09/15/2020 　 狀態:Approved(正式發行) www.everlight.com DATASHEET SMD  CLS WITH 16BIT I2C INTERFACE CLS-16D24-44-DF8/TR8 CLS Interrupt Algorithm Correlative register: The CLS Interrupt (INT_CLS, register 0x02, bit0). The CLS Persistence (PRS_CLS, register 0x0B, bit0 to bit3), The CLS Data (W channel data, register 0x22 to 0x23), The CLS Low Threshold (CLS_THRES_L, register 0x0C to 0x0D), The CLS High Threshold (CLS_THRES_H, register 0x0E to 0x0F). INT_CLS triggered condition: 1. Rule of active interrupt: DATA>CLS_THRES_H or DATA