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SP504

SP504

  • 厂商:

    EXAR(艾科嘉)

  • 封装:

  • 描述:

    SP504 - WAN Multi-Mode Serial Transceiver - Exar Corporation

  • 数据手册
  • 价格&库存
SP504 数据手册
SP504 WAN Multi-Mode Serial Transceiver • +5V Only • Seven (7) Drivers and Seven (7) Receivers • Driver and Receiver Tri-State Control • Reduced V.35 Termination Network • Pin Compatible with the SP503 • Software Selectable Interface Modes: -RS-232E (V.28) -RS-422A (V., X.2) -RS-449 (V. & V.0) -RS-485 -V.35 -EIA-530 (V. & V.0) -EIA-530A (V. & V.0) -V.36 77 SCT(b) 76 SCT(a) 69 DM(b) 68 DM(a) 71 RD(b) 70 RD(a) 67 CS(b) 66 CS(a) 61 SD(a) 65 TT(b) 63 TT(a) 75 GND 72 GND 64 GND 78 DSR 80 CTS 79 SCT 74 VCC 73 VCC 62 VCC RxD 1 RDEC0 2 RDEC1 3 RDEC2 4 RDEC3 5 TTEN 6 SCTEN 7 N/C 8 TDEC3 9 TDEC2 10 TDEC1 11 TDEC0 12 DTR 13 TxD 14 TxC 15 RTS 16 RL 17 V35_STAT 18 DCD 19 RxC 20 60 GND 59 SD(b) 58 TR(a) 57 GND 56 TR(b) 55 VCC 54 RS(a) 53 GND 52 RS(b) 51 LL(a) 50 GND 49 LL(b) 48 VCC 47 RL(a) 46 GND 45 RL(b) 44 ST(b) 43 GND 42 ST(a) 41 VCC SP504 RT(a) 37 RT(b) 38 IC(a) 39 RR(a) 35 STEN 23 DESCRIPTION The SP504 is a single chip device that supports eight (8) physical serial interface standards for Wide Area Network connectivity. The SP504 is fabricated using a low power BiCMOS process technology, and incorporates an Exar patented (5,306,954) charge pump allowing +5V only operation. Seven (7) drivers and seven (7) receivers can be configured via software for any of the above interface modes at any time. The SP504 is suitable for DTE-DCE applications. The SP504 requires only one external resistor per V.35 driver for compliant V.35 Operation. Vcc SWITCHABLE V.35 TERMINATION RESISTOR NETWORKS C1+ C1C2+ C2- 22µF, 16V 22µF, 16V 22µF, 16V Vdd Programmable Charge Pump Vss 22µF, 16V RxD RxC CTS DSR DCD RI SCT RxD TxD TxD DTR RTS RL LL ST TT RxC DTR CTS SP504 SP50 4 RTS DSR RL DCD LL RI ST SCT TT Receiver Decode Driver Decode Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com RR(b) 36 GND 29 GND 34 SP504_02_2708  IC(b) 40 VCC 25 C1+ 26 ST 22 LL 24 RI 21 V DD 27 VCC 33 VSS 32 C2+ 28 C1- 30 C2- 31 ABSOLUTE MAXIMUM RATINGS These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. VCC.......................................................................+7V Input Voltages: Logic...........................-0.3V to (VCC+0.5V) Drivers........................-0.3V to (VCC+0.5V) Receivers..........................................±5V Output Voltages: Logic...........................-0.3V to (VCC+0.5V) Drivers...............................................±4V Receivers....................-0.3V to (VCC+0.5V) Storage Temperature.......................-65˚C to +150˚C Power Dissipation.......................................2000mW Package Derating: øJA................................................46 °C/W øJC................................................6 °C/W STORAGE CONSIDERATIONS Due to the relatively large package size of the 80-pin quad flat-pack, storage in a low humidity environment is preferred. Large high density plastic packages are moisture sensitive and should be stored in Dry Vapor Barrier Bags. Prior to usage, the parts should remain bagged and stored below 40°C and 60%RH. If the parts are removed from the bag, they should be used within 48 hours or stored in an environment at or below 20%RH. If the above conditions cannot be followed, the parts should be baked for four hours at 25°C in order remove moisture prior to soldering. Exar ships the 80-pin QFP in Dry Vapor Barrier Bags with a humidity indicator card and desiccant pack.The humidity indicator should be below 30%RH. SPECIFICATIONS PARAMETER Logic Inputs VIL VIH LOGIC OUTPUTS VOL VOH RS-485 DRIVER TTL Input Levels VIL VIH Outputs HIGH Level Output LOW Level Output Differential Output Balance Offset Open Circuit Voltage Output Current Short-Circuit Current Transition Time TA = +25°C and VCC = +5.0V unless otherwise noted. MIN. TYP. MAX. 0.8 UNITS Volts Volts CONDITIONS 2.0 0.4 2.4 Volts Volts IOUT = +3.2mA IOUT = -.0mA 0.8 2.0 +6.0 -0.3 +/-.5 +/-0.2 +2.5 +/-6.0 28.0 +/-250 20 0 50 80 00 40 +/-5.0 Volts Volts Volts Volts Volts Volts Volts Volts mA mA ns Mbps ns RL = 54Ω Terminated in -7V to +0V Rise/Fall time, 0% to 90% RL = 54Ω; Figure 3a TA @ 25°C and VCC = +5V only Figures 3a and 5; RL= 54Ω, CL=50pF RL = 54Ω, CL = 50pF |VT| - |VT| Max. Transmission Rate Propagation Delay tPHL Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com SP504_02_2708 2 SPECIFICATIONS PARAMETER TA = +25°C and VCC = +5.0V unless otherwise noted. MIN. 50 TYP. 80 20 MAX. 00 40 UNITS ns ns CONDITIONS TA @ 25°C and VCC = +5V only Figures 3a and 5; RL= 54Ω, CL=50pF |tPHL - tPLH|; TA @ 25°C RS-485 DRIVER (continued) Propagation Delay tPLH Differential Driver Skew RS-485 RECEIVER TTL Output Levels VOL VOH Input HIGH Threshold LOW Threshold Common Mode Range HIGH Input Current LOW Input Current Receiver Sensitivity Input Impedance Max. Transmission Rate Propagation Delay tPHL Propagation Delay tPLH Differential Receiver Skew V.35 DRIVER TTL Input Levels VIL VIH Outputs Differential Output Source Impedance Short-Circuit Impedance Voltage Output Offset Transition Time Max. Transmission Rate Propagation Delay tPHL Propagation Delay tPLH DIfferential Driver Skew V.35 RECEIVER TTL Output Levels VOL VOH 2.4 0.4 Volts Volts SP504_02_2708 0.4 2.4 +0.2 -7.0 -7.0 +2 -0.2 +2 Volts Volts Volts Volts Volts Refer to Receiver input graph Refer to Receiver input graph (a)-(b) (a)-(b) +/-0.2 2 0 80 80 0 0 30 80 80 Volts kΩ Mbps ns ns ns Over -7V to +2V common mode Range Figure 3a TA @ 25°C and VCC = +5V only. Figures 3a and 7; A is inverting and B is non-inverting. |tPHL - tPLH|; TA @ +25°C 0.8 2.0 Volts Volts All Outputs measured with 150Ω termination resistor connected to the non-inverting outputs as shown in Figure 9. +/-0.44 50 35 -0.6 35 0 50 50 80 80 30 00 00 40 00 50 +/-0.66 50 65 +0.6 60 Volts Ω Ω Volts ns Mbps ns ns ns 48kbps data rate; TA @ 25°C RL = 100Ω TA @ 25°C and VCC = +5V only Figures 3b and 5 |tPHL - tPLH|; TA @ +25°C VOUT = -2V to +2V; A = B RL = 100Ω Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com 3 SPECIFICATIONS PARAMETER TA = +25°C and VCC = +5.0V unless otherwise noted. MIN. TYP. MAX. UNITS CONDITIONS V.35 RECEIVER (continued) Input Differential Threshold Input Impedance Short-Circuit Impedance Max. Transmission Rate Propagation Delay tPHL Propagation Delay tPLH DIfferential Receiver Skew RS-422 DRIVER (V.11) TTL Input Levels VIL VIH Outputs Open circuit Voltage, VO Differential Output, VT Balance Offset Short Circuit Current Power Off Current Transition Time Max. Transmission Rate Propagation Delay tPHL Propagation Delay tPLH Differential Skew RS-422 RECEIVER (V.11) TTL Output Levels VOL VOH Input HIGH Threshold LOW Threshold Common Mode Range HIGH Input Current LOW Input Current Receiver Sensitivity Input Impedance Max. Transmission Rate 4 0 +/-0.3 Volts kΩ Mbps SP504_02_2708 +/-80 90 35 0 00 00 30 30 30 200 200 00 50 0 65 mV Ω Ω Mbps ns ns ns TA @ 25°C and VCC = +5V only Figures 3b and 7; A is inverting and B is non-inverting. |tPHL - tPLH|; TA @ 25°C VIN = +2V to -2V 0.8 2.0 +/-6.0 +/-2.0 0.5VO +/-5.0 0.67VO +/-0.4 +3.0 +/-50 +/-00 20 0 50 50 80 80 20 00 00 40 40 Volts Volts Volts Volts Volts Volts Volts mA µA ns Mbps ns ns ns VOUT = 0V VCC = 0V, VOUT = +/-0.25V Rise/Fall time, 0% - 90% RL = 100Ω; Figure 3a TA @ 25°C and VCC = +5V only Figures 3a and 5; RDIFF = 100Ω |tPHL - tPLH|; TA @ 25°C RL = 3.9kΩ RL = 100Ω TA @ 25°C |VT| - |VT| 0.4 2.4 +0.2 -6.0 -7.0 +6.0 -0.2 +7 Volts Volts Volts Volts Volts Refer to Receiver input graph Refer to Receiver input graph VCM = +7V to -7V VIN = +0V to -0V (a)-(b) (a)-(b) Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com 4 SPECIFICATIONS PARAMETER Propagation Delay tPHL Propagation Delay tPLH TA = +25°C and VCC = +5.0V unless otherwise noted. MIN. 80 80 TYP. 0 0 30 MAX. 80 80 UNITS ns ns ns CONDITIONS TA @ 25°C and VCC = +5V only. Figures 3b and 7; A is inverting and B is non-inverting. |tPHL - tPLH|; TA @ 25°C RS-422 RECEIVER (V.11) (continued) DIfferential Receiver Skew RS-232 DRIVER (V.28) TTL Input Levels VIL VIH Outputs HIGH Level Output LOW Level Output Open Circuit Voltage Short Circuit Current Power Off Impedance Slew Rate Transistion Time Max. Transmission Rate Propagation Delay tPHL Propagation Delay tPLH RS-232 RECEIVER (V.28) TTL Output Levels VOL VOH Input HIGH Threshold LOW Threshold Reciever Open Circuit Bias Input Impedance Max. Transmission Rate Propagation Delay tPHL Propagation Delay tPLH RS-423 DRIVER (V.10) TTL Input Levels VIL VIH Outputs Open Circuit Voltage, VO +/-4.0 2.0 3 20 0.05 0.05 0.8 2.4 20 0.5 0.5 300 +5.0 -5.0 -5 2.0 0.8 Volts Volts +5.0 -5.0 +5 +/-00 30 .56 230.4   4 4 Volts Volts Volts mA Ω V/µs µs kbps µs µs RL = 3kΩ, VIN = 0.8V RL = 3kΩ, VIN = 2.0V VOUT = 0V VCC = 0V, VOUT = +/-2.0V RL = 3kΩ, CL = 50pF; VCC = +5.0V, TA @ 25°C RL = 3KΩ, CL = 2500pF; between +/-3V, TA @ +25°C RL = 3kΩ, CL = 2500pF TA @ 25°C and VCC = +5V only. Measured from .5V of VIN to 50% of VOUT; RL = 3kΩ 0.4 Volts Volts .7 .2 3.0 +2.0 Volts Volts Volts kΩ kbps µs µs VIN = +5V to -5V TA @ 25°C and VCC = +5V only. Measured from 50% of VIN to .5V of VOUT 5 230.4 0.25 0.25 7   0.8 Volts Volts +/-6.0 Volts RL = 3.9kΩ SP504_02_2708 Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com 5 TA = +25°C and VCC = +5.0V unless otherwise noted. SPECIFICATIONS PARAMETER HIGH Level Output, VT LOW Level Output, VT Short Circuit Current Power Off Current Transition Time MIN. +3.6 -6.0 0.9VOC TYP. MAX. +6.0 -3.6 +/-50 +/-00 00 UNITS Volts Volts Volts mA µA ns kbps µs µs CONDITIONS RL = 450Ω; VOUT ≥0.9VOC RL = 450Ω; VOUT ≥0.9VOC TA = +25°C, VCC = +5.0V VOUT = 0V, VCC = +5.0V VCC = 0V, VOUT = +/-0.25V Rise/Fall time, between +/-3V RL = 450Ω TA @ 25°C and VCC = +5V only. Measured from .5V of VIN to 50% of VOUT; RL = 450Ω RS-423 DRIVER (V.10) (continued) Max. Transmission Rate Propagation Delay tPHL Propagation Delay tPLH RS-423 RECEIVER (V.10) TTL Output Levels VOL VOH Input HIGH Threshold LOW Threshold HIGH Input Current LOW Input Current Receiver Sensitivity Input Impedance Max. Transmission Rate Propagation Delay tPHL Propagation Delay tPLH POWER REQUIREMENTS VCC ICC (No Mode Selected) ICC (RS-232 Mode) ICC (RS-422 Mode) ICC (RS-449 Mode) ICC (EIA-530 Mode) ICC (EIA-530A Mode) ICC (RS-485 Mode) ICC (V.35 Mode) ICC (V.36 Mode) 20 0.05 0.05 0.5 0.5 2 2 0.4 2.4 +0.3 -7.0 +7.0 -0.3 Volts Volts Volts Volts Refer to Receiver input graph Refer to Receiver input graph +/-0.3 4 20 0.05 0.05 0.2 0.2   Volts kΩ kbps µs µs VCM = +7V to -7V VIN = +0V to -0V TA @ 25°C and VCC = +5V only Measured from 50% of VIN to .5V of VOUT 4.75 5.00 30 40 320 320 320 320 370 20 30 5.25 Volts mA mA mA mA mA mA mA mA mA All ICC values are with VCC = +5V fIN = 120kbps; Drivers loaded fIN = 2Mbps; Drivers loaded fIN = 2Mbps; Drivers loaded fIN = 2Mbps Drivers loaded fIN = 2Mbps Drivers loaded fIN = 2Mbps Drivers loaded fIN = 2Mbps Drivers loaded fIN = 2Mbps Drivers loaded ENVIRONMENTAL AND MECHANICAL Operating Temperature Range Storage Temperature Range ESD 0 -65 500 +70 +50 °C °C V HBM SP504_02_2708 Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com 6 RECEIVER INPUT GRAPHS RS-422 RECEIVER +3.25mA RS-423 RECEIVER +3.25mA -10V -3V +3V +10V -10V -3V +3V +10V Maximum Input Current Versus Voltage -3.25mA -3.25mA RS-485 RECEIVER +1.0mA Maximum Input Current Versus Voltage -7V -3V +6V +12V -0.6mA 1 Unit Load Maximum Input Current Versus Voltage TA = +70°C to 0°C and VCC = +4.75V to +5.25V unless otherwise noted. OTHER AC CHARACTERISTICS PARAMETER RS-232 Mode tPZL; Tri-state to Output LOW tPZH; Tri-state to Output HIGH tPLZ; Output LOW to Tri-state tPHZ; Output HIGH to Tri-state RS-423 MODE tPZL; Tri-state to Output LOW tPZH; Tri-state to Output HIGH tPLZ; Output LOW to Tri-state tPHZ; Output HIGH to Tri-state RS-422, RS-485 MODES tPZL; Tri-state to Output LOW tPZH; Tri-state to Output HIGH tPLZ; Output LOW to Tri-state tPHZ; Output HIGH to Tri-state V.35 MODE tPZL; Tri-state to Output LOW tPZH; Tri-state to Output HIGH tPLZ; Output LOW to Tri-state tPHZ; Output HIGH to Tri-state MIN. TYP. MAX. UNITS CONDITIONS DRIVER DELAY TIME BETWEEN ACTIVE MODE AND TRI-STATE MODE 0.70 0.40 0.20 0.40 0.5 0.20 0.20 0.5 2.80 0.0 0.0 0.0 2.60 0.0 0.0 0.5 5.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 0.0 2.0 2.0 2.0 0.0 2.0 2.0 2.0 µs µs µs µs µs µs µs µs µs µs µs µs µs µs µs µs CL = 100pF, Fig. 4 ; S closed CL = 100pF, Fig. 4 ; S2 closed CL = 100pF, Fig. 4 ; S closed CL = 100pF, Fig. 4 ; S2 closed CL = 100pF, Fig. 4 ; S closed CL = 100pF, Fig. 4 ; S2 closed CL = 100pF, Fig. 4 ; S closed CL = 100pF, Fig. 4 ; S2 closed CL = 100pF, Fig. 4 & 6; S closed CL = 100pF, Fig. 4 & 6; S2 closed CL = 15pF, Fig. 4 & 6; S closed CL = 15pF, Fig. 4 & 6; S2 closed CL = 100pF, Fig. 4 & 6; S closed CL = 100pF, Fig. 4 & 6; S2 closed CL = 15pF, Fig. 4 & 6; S closed CL = 15pF, Fig. 4 & 6; S2 closed SP504_02_2708 Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com 7 TA = +70°C to 0°C and VCC = +4.75V to +5.25V unless otherwise noted. OTHER AC CHARACTERISTICS PARAMETER RS-232 Mode tPZL; Tri-state to Output LOW tPZH; Tri-state to Output HIGH tPLZ; Output LOW to Tri-state tPHZ; Output HIGH to Tri-state RS-423 MODE tPZL; Tri-state to Output LOW tPZH; Tri-state to Output HIGH tPLZ; Output LOW to Tri-state tPHZ; Output HIGH to Tri-state RS-422, RS-485 MODES tPZL; Tri-state to Output LOW tPZH; Tri-state to Output HIGH tPLZ; Output LOW to Tri-state tPHZ; Output HIGH to Tri-state V.35 MODE tPZL; Tri-state to Output LOW tPZH; Tri-state to Output HIGH tPLZ; Output LOW to Tri-state tPHZ; Output HIGH to Tri-state MIN. TYP. MAX. UNITS CONDITIONS RECEIVER DELAY TIME BETWEEN ACTIVE MODE AND TRI-STATE MODE 0.2 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 20 20 20 20 20 20 20 20 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 50 50 50 50 50 50 50 50 µs µs µs µs µs µs µs µs µs µs µs µs µs µs µs µs ns ns ns ns ns ns ns ns CL = 100pF, Fig. 2 ; S closed CL = 100pF, Fig. 2 ; S2 closed CL = 100pF, Fig. 2 ; S closed CL = 100pF, Fig. 2 ; S2 closed CL = 100pF, Fig. 2 ; S closed CL = 100pF, Fig. 2 ; S2 closed CL = 100pF, Fig. 2 ; S closed CL = 100pF, Fig. 2 ; S2 closed CL = 100pF, Fig. 2 & 8; S closed CL = 100pF, Fig. 2 & 8; S2 closed CL = 15pF, Fig. 2 & 8; S closed CL = 15pF, Fig. 2 & 8; S2 closed CL = 100pF, Fig. 2 & 8; S closed CL = 100pF, Fig. 2 & 8; S2 closed CL = 15pF, Fig. 2 & 8; S closed CL = 15pF, Fig. 2 & 8; S2 closed VCC = +5.0V, TA @ 25ºC VCC = +5.0V, TA @ 25ºC VCC = +5.0V, TA @ 25ºC VCC = +5.0V, TA @ 25ºC VCC = +5.0V, TA @ 25ºC VCC = +5.0V, TA @ 25ºC VCC = +5.0V, TA @ 25ºC VCC = +5.0V, TA @ 25ºC TRANSCEIVER TO TRANSCEIVER SKEW RS-232 Driver RS-232 Receiver RS-422 Driver RS-422 Receiver RS-423 Driver RS-423 Receiver V.35 Driver V.35 Receiver [(tPHL-tPLH)Trcvr - (tPHL - tPLH)TRCVRX] Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com SP504_02_2708 8 A R VOD R B Figure . Driver DC Test Load Circuit Receiver Output CRL Test Point S1 1KΩ S2 1KΩ VCC VOC Figure 2. Receiver Timing Test Load Circuit DI A B CL1 RL CL2 A B RO 15pF DI A B A B RO 15pF Figure 3a. Driver / Receiver Timing Test Circuit Figure 3b.Timing Test Circuit (V.35 Mode only) Output Under Test 500Ω CL S1 VCC S2 Figure 4.Driver Timing Test Load #2 Circuit Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com SP504_02_2708 9 DRIVER INPUT +3V 0V A B VO 1/2VO f = 1MHz; TR ≤ 10ns; TF ≤ 10nS 1.5V t PLH t PHL 1/2VO t SKEW t SKEW 1.5V DRIVER OUTPUT DIFFERENTIAL VO+ 0V OUTPUT VO– VA - VB Figure 5. Driver Propagation Delays tF tR TDECx +3V 0V 5V VOL f = 1MHz; t R < 10ns; t F < 10ns 1.5V t ZL 2.3V Output nor mally LOW Output nor mally HIGH 1.5V t LZ 0.5V 0.5V t HZ A, B A, B VOH 0V 2.3V t ZH Figure 6. Driver Enable and Disable Times A– B VOD2 + VOD2 – f = 1MHz; t R ≤ 10ns ; t F ≤ 10ns 0V INPUT 0V VOH RECEIVER OUT VOL 1.5V t PHL OUTPUT t PLH 1.5V Figure 7. Receiver Propagation Delays Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com SP504_02_2708 0 RDECx +3V 0V 5V VIL VIH 1.5V f = 1MHz; t ≤ 10ns; t ≤ 10ns R F t ZL 1.5V Output nor mally LOW Output nor mally HIGH 1.5V t LZ 0.5V 0.5V t HZ DRIVER INPUT RECEIVER OUT RECEIVER OUT 0V 1.5V t ZH DRIVER OUTPUT Figure 8. Receiver Enable and Disable Times Figure 9. Typical RS-232 Driver Output Waveform DRIVER INPUT DRIVER INPUT DRIVER OUTPUT DRIVER OUTPUT Figure 0. Typical RS-423 Driver Output Waveform Figure . Typical RS-422/RS-485 Driver Output Waveform DRIVER INPUT 0.825 0.66 0.495 0.33 V.35 VOD V.35 Driver VOD over Temperature VOD+ DRIVER OUTPUT 0.65 0 -0.65 -0.33 -0.495 -0.66 -0.825 0 0 20 30 40 50 Temperature (deg C) VODVcc = 5.0V 60 70 Figure 2. Typical V.35 Driver Output Waveform Figure 3. V.35 Driver Output VOD VS. Temperature SP504_02_2708 Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com  PINOUT… Pin 6 — SD(a) — Analog Out — Send data, inverted; sourced from TxD. 77 SCT(b) 76 SCT(a) 69 DM(b) 68 DM(a) 71 RD(b) 70 RD(a) 67 CS(b) 66 CS(a) 61 SD(a) 65 TT(b) 63 TT(a) 75 GND 72 GND 64 GND 78 DSR 79 SCT 80 CTS 74 VCC 73 VCC 62 VCC Pin 63 — TT(a) — Analog Out — Terminal Timing, inverted; sourced from TxC Pin 65 — TT(b) — Analog Out — Terminal Timing, non–inverted; sourced from TxC. Pin 70 — RD(a) — Receive Data, analog input; inverted; source for RxD. Pin 71 — RD(b) — Receive Data; analog input; non-inverted; source for RxD. Pin 76 — SCT(a) — Serial Clock Transmit; analog input, inverted; source for SCT. Pin 77 — SCT(b) — Serial Clock Transmit: analog input, non–inverted; source for SCT Pin 79 — SCT — Serial Clock Transmit; TTL output; sources from SCT(a) and SCT(b) inputs. CONTROL LINE GROUP Pin 13 — DTR — Data Terminal Ready; TTL input; source for TR(a) and TR(b) outputs. Pin 16 — RTS — Ready To Send; TTL input; source for RS(a) and RS(b) outputs. Pin 17 — RL — Remote Loopback; TTL input; source for RL(a) and RL(b) outputs. Pin 18 — V35_STAT — V.35 Status; TTL output; outputs logic high when in V.35 mode. Pin 19 — DCD— Data Carrier Detect; TTL output; sourced from RR(a) and RR(b) inputs. Pin 21 — RI — Ring Indicate; TTL output; sourced from IC(a) and IC(b) inputs. Pin 24 — LL — Local Loopback; TTL input; source for LL(a) and LL(b) outputs. Pin 35 — RR(a)— Receiver Ready; analog input, inverted; source for DCD. Pin 36 — RR(b)— Receiver Ready; analog input, non-inverted; source for DCD. Pin 39 — IC(a)— Incoming Call; analog input, inverted; source for RI. RxD 1 RDEC0 2 RDEC1 3 RDEC2 4 RDEC3 5 TTEN 6 SCTEN 7 N/C 8 TDEC3 9 TDEC2 10 TDEC1 11 TDEC0 12 DTR 13 TxD 14 TxC 15 RTS 16 RL 17 V35_STAT 18 DCD 19 RxC 20 60 GND 59 SD(b) 58 TR(a) 57 GND 56 TR(b) 55 VCC 54 RS(a) 53 GND 52 RS(b) 51 LL(a) 50 GND 49 LL(b) 48 VCC 47 RL(a) 46 GND 45 RL(b) 44 ST(b) 43 GND 42 ST(a) 41 VCC SP504 RT(a) 37 RT(b) 38 IC(a) 39 RR(a) 35 STEN 23 PIN ASSIGNMENTS… CLOCK AND DATA GROUP Pin 1 — RxD — Receive Data; TTL output, sourced from RD(a) and RD(b) inputs. Pin 14 — TxD — TTL input ; transmit data source for SD(a) and SD(b) outputs. Pin 15 — TxC — Transmit Clock; TTL input for TT driver outputs. Pin 20 — RxC — Receive Clock; TTL output sourced from RT(a) and RT(b) inputs. Pin 22 — ST — Send Timing; TTL input; source for ST(a) and ST(b) outputs. Pin 37 — RT(a) — Receive Timing; analog input, inverted; source for RxC. Pin 38 — RT(b) — Receive Timing; analog input, non-inverted; source for RxC. Pin 42 — ST(a) — Send Timing; analog output, inverted; sourced from ST. Pin 44 — ST(b) — Send Timing; analog output, non-inverted; sourced from ST. Pin 59 — SD(b) — Analog Out — Send data, non-inverted; sourced from TxD. Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com RR(b) 36 GND 29 GND 34 IC(b) 40 VCC 25 C1+ 26 ST 22 LL 24 RI 21 V DD 27 VCC 33 VSS 32 C2+ 28 C1- 30 C2- 31 SP504_02_2708 2 Pin 40 — IC(b)— Incoming Call; analog input,non-inverted; source for RI. Pin 45 — RL(b) — Remote Loopback; analog output, non-inverted; sourced from RL. Pin 47 — RL(a) — Remote Loopback; analog output inverted; sourced from RL. Pin 49— LL(b) — Local Loopback; analog output, non-inverted; sourced from LL. Pin 51 — LL(a) — Local Loopback; analog output, inverted; sourced from LL. Pin 52 — RS(b) — Ready To Send; analog output, non-inverted; sourced from RTS. Pin 54 — RS(a) — Ready To Send; analog output, inverted; sourced from RTS. Pin 56 — TR(b) — Terminal Ready; analog output, non-inverted; sourced from DTR. Pin 58 — TR(a) — Terminal Ready; analog output, inverted; sourced from DTR. Pin 66 — CS(a)— Clear To Send; analog input, inverted; source for CTS. Pin 67 — CS(b)— Clear To Send; analog input, non-inverted; source for CTS. Pin 68 — DM(a)— Data Mode; analog input, inverted; source for DSR. Pin 69 — DM(b)— Data Mode; analog input, non-inverted; source for DSR Pin 78 — DSR— Data Set Ready; TTL output; sourced from DM(a), DM(b) inputs. Pin 80 — CTS— Clear To Send; TTL output; sourced from CS(a) and CS(b) inputs. CONTROL REGISTERS Pins 2–5 — RDEC0 – RDEC3 — Receiver decode register; configures receiver modes; TTL inputs. Pin 6 — TTEN — Enables TT driver, active low; TTL input. Pin 7 — SCTEN — Enables SCT receiver; active high; TTL input. Pins 2–9 — TDEC0 – TDEC3 — Transmitter decode register; configures transmitter modes; TTL inputs. Pin 23 — STEN — Enables ST driver; active low; TTL input. POWER SUPPLIES Pins 25, 33, 4, 48, 55, 62, 73, 74 — VCC — +5V input. Pins 29, 34, 43, 46, 50, 53, 57, 60, 64, 72, 75 — GND — Ground. Pin 27 — VDD +0V Charge Pump Capacitor — Connects from VDD to VCC. Suggested capacitor size is 22µF, 6V. Pin 32 — VSS –0V Charge Pump Capacitor — Connects from ground to VSS. Suggested capacitor size is 22µF, 6V. Pins 26 and 30 — C+ and C– — Charge Pump Capacitor — Connects from C+ to C–. Suggested capacitor size is 22µF, 6V. Pins 28 and 3 — C2+ and C2– — Charge Pump Capacitor — Connects from C2+ to C2–. Suggested capacitor size is 22µF, 6V. NOTE: NC pins should be left floating; internal signals may be present. Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com SP504_02_2708 3 FEATURES… The SP504 is a highly integrated serial transceiver that allows software control of its interface modes. Similar to the SP503, the SP504 offers the same hardware interface modes for RS-232 (V.28), RS-422A (V.), RS-449, RS-485, V.35, EIA-530 and includes V.36 and E IA-530A. The interface mode selec tion is done via an 8–bit switch; four (4) bits control the drivers and four (4) bits control the receivers. The S P504 is fabricated using low power BiCMOS process technology, and incorporates a Exar patented (5,306,954) charge pump allowing +5V only operation. Each device is packaged in an 80–pin JEDEC Quad FlatPack package. The SP504 is ideally suited for wide area network connectivity based on the interface modes offered and the driver and receiver configurations. The SP504 has seven (7) independent drivers and seven (7) independent receivers. In V.35 mode, the SP504 includes the necessary components and termination resistors internal within the device for compliant V.35 operation. THEORY OF OPERATION The SP504 is made up of five separate circuit blocks — the charge pump, drivers, receivers, decoder and switching array. Each of these circuit blocks is described in more detail below. Charge–Pump The SP504's charge pump design is based on the SP503 where Exar's patented charge pump design (5,306,954) uses a four–phase voltage shifting technique to attain symmetrical ±0V power supplies. In addition, the SP504 charge pump incorporates a " programmable" feature that produces an output of ±0V or ±5V for VSS and VDD depending on the mode of operation. The charge pump still requires external capacitors to store the charge. Figure 8a shows the waveform found on the positive side of capacitor C2, and Figure 8b shows the negative side of capcitor C2. There is a free–running oscillator that controls the four phases of the voltage shifting. A description of each phase follows. 4 The SP504 charge pump is used for RS-232 where the output voltage swing is typically ±0V and also used for RS-423. However, RS-423 requires the voltage swing on the driver output be between ±4V to ±6V during an open circuit (no load). The charge pump would need to be regulated down from ±0V to ±5V. A typical ±0V charge pump would require external clamping such as 5V zener diodes on VDD and VSS to ground. The ±5V output has symmetrical levels as in the ±0V output. The ±5V is used in the following modes where RS-423 levels are used: RS449, EIA-530, EIA-530A and V.36. Phase 1 (±10V) — VSS charge storage — During this phase of the clock cycle, the positive side of capacitors C and C2 are initially charged to +5V. The Cl+ is then switched to ground and the charge on C– is transferred to C2–. Since C2+ is connected to +5V, the voltage potential across capacitor C2 is now 0V. Phase 1 (±5V) — VSS & VDD charge storage and transfer — With the C and C2 capacitors initially charged to +5V, Cl+ is then switched to ground and the charge on C– is transferred to the VSS storage capacitor. Simultaneously the C2– is switched to ground and the 5V charge on C2+ is transferred to the VDD storage capacitor. VCC = +5V +5V C1 + – C2 –5V + – + C4 – VDD Storage Capacitor – + VSS Storage Capacitor –5V C3 Figure 4a. Charge Pump Phase  for ±0V. VCC = +5V +5V C1 + – C2 + – + C4 – VDD Storage Capacitor –5V – + VSS Storage Capacitor C3 Figure 4b. Charge Pump Phase  for ±5V. SP504_02_2708 Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com VCC = +5V VCC = +5V C1 + – C2 + – + C4 – VDD Storage Capacitor C1 + – C2 + – + C4 – VDD Storage Capacitor –10V – + VSS Storage Capacitor –5V – + VSS Storage Capacitor C3 C3 Figure 5a. Charge Pump Phase 2 for ±0V. VCC = +5V Figure 5b. Charge Pump Phase 2 for ±5V. VCC = +5V +5V C1 + – C2 + – + C4 – VDD Storage Capacitor C1 +10V + – C2 + – + C4 – VDD Storage Capacitor –5V –5V – + VSS Storage Capacitor – + VSS Storage Capacitor C3 C3 Figure 6. Charge Pump Phase 3. Figure 7. Charge Pump Phase 4. Phase 2 (±10V) — VSS transfer — Phase two of the clock connects the negative terminal of C2 to the VSS storage capacitor and the positive terminal of C2 to ground, and transfers the generated –l0V or the generated –5V to C3. Simultaneously, the positive side of capacitor C  is switched to +5V and the negative side is connected to ground. Phase 2 (±5V) — VSS & VDD charge storage — C+ is reconnected to VCC to recharge the C capacitor. C2+ is switched to ground and C2– is connected to C3. The 5V charge from Phase  is now transferred to the VSS storage capacitor. VSS receives a continuous charge from either C or C2. With the C capacitor charged to 5V, the cycle begins again. Phase 3 — VDD charge storage — The third phase of the clock is identical to the first phase — the charge transferred in C produces –5V in the negative terminal of C, which is applied to the negative side of capacitor C2. Since C2+ is at +5V, the voltage potential across C2 is l0V. For the 5V output, C2+ is connected to ground so that the potential on C2 is only +5V. +0V C 2+ GND GND C2 – (a) +5V C 2+ GND (b) GND C 2– –5V –0V Figure 8a and 8b. Charge Pump Waveforms Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com SP504_02_2708 5 Since both VDD and VSS are separately generated from VCC in a no–load condition, VDD and VSS will be symmetrical. Older charge pump approaches that generate V– from V+ will show a decrease in the magnitude of V– compared to V+ due to the inherent inefficiencies in the design. The clock rate for the charge pump typically operates at 5kHz. The external capacitors must be a minimum of 22µF with a 6V breakdown rating. External Power Supplies For applications that do not require +5V only, external supplies can be applied at the V+ and V– pins. The value of the external supply voltages must be no greater than ±l0.5V. The tolerance should be ±5% from ±0V. The current drain for the supplies is used for RS-232 and RS-423 drivers. For the RS-232 driver, the current requirement will be 3.5mA per driver. The RS-423 driver worst case current drain will be mA per driver. Power sequencing is required for the SP504. The supplies must be sequenced accordingly: +0V, +5V and –0V. An external circuit would be needed for proper power supply sequencing. Consult factory for application circuitry. Drivers The SP504 has seven (7) enhanced independent drivers. Control for the mode selection is done via a four–bit control word. The drivers are pre-arranged such that for each mode of operation, the relative position and functionality of the drivers are set up to accommodate the selected interface mode. As the mode of the drivers is changed, the electrical characteristics will change to support the requirements of clock, data, and control line signal levels. Table  shows the mode of each driver in the different interface modes that can be selected. There are four basic types of driver circuits — RS-232, RS-423, RS-485 and V.35. The RS-232 drivers output single–ended signals with a minimum of ±5V (with 3kΩ and 2500pF loading), and can operate up to 20kbps. 6 The RS-232 drivers are used in RS232 mode for all signals, and also in V.35 mode where they are used as t he control line signals such as DTR and RTS. The RS-423 drivers are also single–ended signals with a minimum voltage output of ±3.6V (with 450Ω loading) and can operate up to 20kbps. Open circuit VOL and VOH measurements are ±4.0V to ±6.0V. The RS423 drivers are used in RS-449, EIA-530, EIA-530A and V.36 modes as Category II signals from each of their corresponding specifications. The third type of driver produces a differential signal that can maintain RS-485, ±.5V differential output levels with a worst case load of 54Ω. The signal levels and drive capability of the RS-485 drivers allow the drivers to also support RS-422 (V.) requirements of ±2V differential output levels with 100Ω loads. The RS-422 drivers are used in RS449, EIA-530, EIA-530A and V.36 modes as Category I signals which are used for clock and data. The fourth type of driver is the V.35 driver. V.35 levels require ±0.55V driver output signals with a load of 100Ω. The SP504 drivers simplify existing V.35 implementations that use external termination schemes. The drivers were specifically designed to comply with the requirements of V.35 as well as the driver output impedance values of V.35. The drivers achieve the 50Ω to 150Ω source impedance. However, an external 150Ω resistor to ground must be connected to the non-inverting outputs; SD(b), ST(b), and TT(b), in order to comply with the 135Ω to 165Ω short-circuit impedance for V.35. The V.35 driver itself is disabled and transparent when the decoder is in all other modes. All of the differential drivers; RS-485, RS-422, and V.35, can operate up to 0Mbps. The driver inputs are both TTL or CMOS compatible. Since there are no pull-up or pull-down resistors on the driver inputs, they should be tied to a known logic state in order to define the driver output. SP504_02_2708 Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com Receivers The SP504 has seven (7) independent receivers which can be programmed for the different interface modes. Control for the mode selection is done via a 4–bit control word that is independent from the driver control word. The coding for the drivers and receivers is identical. Therefore, if the modes for the drivers and receivers are supposed to be identical in the application, the control lines can be tied together. Like the drivers, the receivers are pre-arranged for the specific requirements of the interface. As the operating mode of the receivers is changed, the electrical characteristics will change to support the requirements of clock, data, and control line receivers. Table 2 shows the mode of each receiver in the different interface modes that can be selected. There are three basic types of receiver circuits — RS-232, RS-423, and RS-485. The RS-232 receiver is a single–ended input with a threshold of 0.8V to 2.4V. The RS-232 receiver has an operating voltage range of ±5V and can receive signals up to 20kbps. The input sensitivity complies with EIA-RS-232 and V.28 at +3V to -3V. The input impedance is 3kΩ to 7kΩ. RS232 receivers are used in RS-232 mode for all data, clock and control signals. They are also used in V.35 mode for control line signals such as CTS and DSR. The RS-423 receivers are also single–ended but have an input threshold as low as ±200mV. The input impedance is guaranteed to be greater than 4kΩ, with an operating voltage range of ±7V. The RS-423 receivers can operate up to 20kbps. RS-423 receivers are used in RS-449, EIA-530, EIA-530A and V.36 modes as Category II signals as indicated by their corresponding specifications. The third type of receiver is a differential which supports RS-485. The RS-485 receiver has an input impedance of 15kΩ and a differential threshold of ±200mV. Since the characteristics of an RS-422 (V.) receiver are actually subsets of RS-485, the receivers for RS-422 requirements are covered by the RS-485 7 receivers. RS-422 receivers are used in RS-449, EIA-530, EIA-530A and V.36 as Category I signals for receiving clock, data, and some control line signals. The differential receivers can receive data up to 0Mbps. The RS-485 receivers are also used for the V.35 mode. Unlike the older implementations of differential or V.35 receivers, the SP504 contains an internal resistor termination network that ensures a V.35 input impedance of 100Ω (±10Ω) and a short-circuit impedance of 150Ω (±15Ω). The traditional V.35 implementations required external termination resistors to acheive the proper V.35 impedances. The internal network is connected via low on-resistance FET switches when the decoder is changed to V.35 mode. The termination network is transparent when all other modes are selected. The V.35 receivers can operate up to 0Mbps. All receivers include a fail-safe feature that outputs a logic HIGH when the receiver inputs are open. For single-ended RS-232 receivers, there are internal 5kΩ pull-down resistors on the inputs which produces a logic HIGH ("") at the receiver outputs. The single-ended RS-423 receivers produce a logic LOW ("0") on the output when the inputs are open. This is due to a pull-up device connected to the input. The differential receivers have the same internal pull-up device on the non-inverting input which produces a logic HIGH ("") at the receiver output. The three differential receivers when configured in V.35 mode (RxD, RxC & SCT) do not have fail-safe because the internal termination resistor network is connected. Decoder The SP504 has the ability to change the interface mode of the drivers or receivers via an 8–bit switch. The decoder for the drivers and receivers is not latched; it is merely a combinational logic switch. The control word can be externally latched either HIGH or LOW to write the appropriate code into the SP504. The codes shown in Tables 1 and 2 are the only specified, valid modes for the SP504. Undefined codes SP504_02_2708 Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com may represent other interface modes not specified (consult the factory for more information). The drivers are controlled with the data bits labeled TDEC3–TDEC0. All of the drivers can be put into tri-state mode by writing 0000 to the driver decode switch. The three drivers TxD, ST and TxC, have a 150Ω pull-down resistor to ground connected at the (b) output. This resistor is part of the V.35 driver circuitry and should be connected when in V.35 mode. Tri-state is possible for all drivers in RS-232 mode. The receivers are controlled with data bits RDEC3–RDEC0; the code 0000 written to the receivers will place the outputs into tri-state mode. The 0000 decoder word will override the enable control line for the one receiver (SCT). Using the V.35_STAT Pin The SP504 includes a V.35 status pin where the V35_STAT pin (pin 8) is a logic HIGH ("") when the decoder is set to V.35 mode. The pin is a logic LOW ("0") when in all other modes including tri-state (decoder set at "0000"). Pin 8 allows the user to easily add FET switches or solid state relays to connect the external 150Ω resistor for V.35 operation. V35_STAT can be connected to the gate of the FET switches or the control of the relays so that the 150Ω resistors are connected to the non-inverting output of the three V.35 drivers. The output current of the V35_STAT pin is that of a typical TTL load of –3.2mA. The electrical specifications are similar to the SP504 receiver outputs. This feature would reduce additional logic required by older traditional methods. NET/NET2 Testing and Compliancy Many system designers are required to certify their system for use in the European public network. Electrical testing is performed in adherence to the NET (Norme Européenne de Télécommunication) which specifies the ITU Series V specifications. The SP504 adheres to all the required physical layer testing for NET and NET2. Consult factory for details. Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com SP504_02_2708 8 SP504 Driver Mode Selection Pin Label TDEC3 - TDEC0 SD(a) SD(b) TR(a) TR(b) RS(a) RS(b) RL(a) RL(b) LL(a) LL(b) ST(a) ST(b) TT(a) TT(b) Mode: 0000 tri-state tri-state tri-state tri-state tri-state tri-state tri-state tri-state tri-state tri-state tri-state tri-state tri-state tri-state RS232 0010 V.28 tri-state V.28 tri-state V.28 tri-state V.28 tri-state V.28 tri-state V.28 tri-state V.28 tri-state V.35 1110 V.35– V.35+ V.28 tri-state V.28 tri-state V.28 tri-state V.28 tr i-state V.35– V.35+ V.35– V.35+ RS422 0100 V.11– V.11+ V.11– V.11+ V.11– V.11+ V.11– V.11+ V.11– V.11+ V.11– V.11+ V.11– V.11+ RS485 0101 RS485– RS485+ RS485– RS485+ RS485– RS485+ RS485– RS485+ RS485– RS485+ RS485– RS485+ RS485– RS485+ RS449 1100 V.11– V.11+ V.11– V.11+ V.11– V.11+ V.10 tri-state V.10 tri-state V.11– V.11+ V.11– V.11+ EIA530 1101 V.11– V.11+ V.11– V.11+ V.11– V.11+ V.10 tri-state V.10 tri-state V.11– V.11+ V.11– V.11+ EIA-530A 1111 V.11– V.11+ V.10 tri-state V.11– V.11+ V.11– V.11+ V.10 tri-state V.11– V.11+ V.11– V.11+ V.36 0110 V.11– V.11+ V.10 tri-state V.10 tri-state V.10 tri-state V.10 tri-state V.11– V.11+ V.11– V.11+ Table . Driver Mode Selection SP504 Receiver Mode Selection Pin Label RDEC3 - RDEC0 RD(a) RD(b) RT(a) RT(b) CS(a) CS(b) DM(a) DM(b) RR(a) RR(b) IC(a) IC(b) SCT(a) SCT(b) Mode: 0000 >12kΩ to GND >12kΩ to GND >12kΩ to GND >12kΩ to GND >12kΩ to GND >12kΩ to GND >12kΩ to GND RS232 0010 V.28 V.28 V.28 V.28 V.28 V.28 V.28 V.35 1110 V.35– V.35+ V.35– V.35+ V.28 >12kΩ to GND V.28 >12kΩ to GND V.28 >12kΩ to GND V.28 >12kΩ to GND V.35– V.35+ RS422 0100 V.11– V.11+ V.11– V.11+ V.11– V.11+ V.11– V.11+ V.11– V.11+ V.11– V.11+ V.11– V.11+ RS485 0101 RS485– RS485+ RS485– RS485+ RS485– RS485+ RS485– RS485+ RS485– RS485+ RS485– RS485+ RS485– RS485+ RS449 1100 V.11– V.11+ V.11– V.11+ V.11– V.11+ V.11– V.11+ V.11– V.11+ V.10 >12kΩ to GND V.11– V.11+ EIA530 1101 V.11– V.11+ V.11– V.11+ V.11– V.11+ V.11– V.11+ V.11– V.11+ V.10 >12kΩ to GND V.11– V.11+ EIA-530A 1111 V.11– V.11+ V.11– V.11+ V.11– V.11+ V.10 >12kΩ to GND V.11– V.11+ V.10 >12kΩ to GND V.11– V.11+ V.36 0110 V.11– V.11+ V.11– V.11+ V.10 >12kΩ to GND V.10 >12kΩ to GND V.10 >12kΩ to GND V.10 >12kΩ to GND V.11– V.11+ >12kΩ to GND >12kΩ to GND >12kΩ to GND >12kΩ to GND >12kΩ to GND >12kΩ to GND >12kΩ to GND >12kΩ to GND >12kΩ to GND >12kΩ to GND >12kΩ to GND >12kΩ to GND >12kΩ to GND >12kΩ to GND Table 2. Receiver Mode Selection Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com SP504_02_2708 9 1N5819 +5V 10µF 22µF 22µF 22µF 25 VCC 27 VDD 26 30 28 31 C2VSS 22µF C1+ C1- C2+ Charge Pump 32 14 TxD 61 SD(a) 59 SD(b) 13 DTR 58 TR(a) 56 TR(b) 16 RTS 54 RS(a) 52 RS(b) 17 RL 47 RL(a) 45 RL(b) 24 LL 51 LL(a) 49 LL(b) 22 ST 42 ST(a) 44 ST(b) 23 STEN 15 TxC 63 TT(a) 65 TT(b) 6 TTEN 150Ω Note 1 A RD(a) 70 RxD 1 RD(b) 71 RT (a) 37 RxC 20 RT (b) 38 CS(a) 66 CTS 80 CS(b) 67 DM(a) 68 DSR 78 DM (b) 69 RR(a) 35 A — Receiver Tri-State Circuitry & V.35 terminaiton resistor circuitry for RR(b) 36 RxD, RxC & SCT . B — Driver Tri-State circuitry & V.35 termination circuitr y for T xD , TxC & ST . B 150Ω Note 1 DCD 19 IC(a) 39 RI 21 IC(b) 40 150Ω SCT(a) 76 SCT 79 SCTEN 7 SCT(b) 77 5 4 3 2 9 10 11 12 Note 1 RS-422 Mode Input Word 0 1 0 0 0 1 0 0 External Latch TDEC X RDEC X SP504 (SEE PAGE 12 FOR GROUND PINS) Note 1 For V.35 Termination, needs to be connected fo r p roper V. 35 o peration. A l ow o nresistance (≤1Ω) FET or switch can be used to connect and disconnect the resistor from the non-inverting output. Figure 9. SP504 Typical Operating Circuit Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com SP504_02_2708 20 MODE: RS-232 DRIVER RECEIVER TDEC3 TDEC 2 TDEC1 TDEC0 RDEC3 RDEC2 RDEC1 RDEC0 0 0 1 0 0 0 1 0 14 TxD RD(a) 70 RxD 1 RT(a) 37 RxC 20 13 DTR 58 TR(a) 61 SD(a) CS(a) 66 CTS 80 16 RTS 54 RS(a) DM(a) 68 DSR 78 17 RL 47 RL(a) RR(a) 35 DCD 19 24 LL 51 LL(a) IC(a) 39 RI 21 22 ST 42 ST(a) 23 STEN 15 TxC 63 TT(a) 6 TTEN SCT(a) 76 SCT 79 SCTEN 7 RECEIVERS DRIVERS STEN 1 0 ST Disabled Enabled TTEN 1 0 TT Disabled Enabled SCTEN 1 0 SCT Enabled Disabled Figure 20. Mode Diagram — RS-232 Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com SP504_02_2708 2 DRIVER RECEIVER TDEC 3 TDEC 2 TDEC 1 TDEC 0 RDEC 3 RDEC 2 RDEC 1 RDEC 0 1 1 1 0 1 1 1 0 RD(a) 70 RxD 1 RD(b) 71 RT (a) 37 RxC 20 RT(b) 38 CS(a) 66 CTS 80 DM(a) 68 DSR 78 RR(a) 35 DCD 19 IC(a) 39 RI 21 SCT(a) 76 SCT 79 SCTEN 7 SCT(b) 77 14 TxD 61 SD(a) 59 SD(b) 13 DTR 58 TR(a) 16 RT S 54 RS(a) 17 RL 47 RL(a) 24 LL 51 LL(a) 22 ST 42 ST(a) 44 ST(b) 23 STEN 15 TxC 63 TT(a) 65 TT(b) 6 TTEN MODE: V .35 RECEIVERS DRIVERS STEN 1 0 ST Disabled Enabled TTEN 1 0 TT SCTEN SCT Disabled 1 Enabled Enabled 0 Disabled Figure 2. Mode Diagram — V.35 Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com SP504_02_2708 22 DRIVER RECEIVER TDEC 3 TDEC 2 TDEC 1 TDEC 0 RDEC 3 RDEC 2 RDEC 1 RDEC 0 0 1 0 0 0 1 0 0 RD(a) 70 RxD 1 RD(b) 71 RT(a) 37 RxC 20 RT (b) 38 CS(a) 66 CTS 80 CS(b) 67 DM(a) 68 DSR 78 DM(b) 69 RR(a) 35 DCD 19 RR(b) 36 IC(a) 39 RI 21 IC(b) 40 SCT(a) 76 SCT 79 SCTEN 7 SCT(b) 77 14 TxD 61 SD(a) 59 SD(b) 13 DTR 58 TR(a) 55 TR(b) 16 RT S 54 RS(a) 52 RS(b) 17 RL 47 RL(a) 45 RL(b) 24 LL 51 LL(a) 49 LL(b) 22 ST 42 ST(a) 44 ST(b) 23 STEN 15 TxC 63 TT(a) 65 TT(b) 6 TTEN MODE: RS-422 RECEIVERS DRIVERS STEN 1 0 ST TT SCTEN TTEN Disabled 1 Disabled 1 Enabled 0 Enabled 0 SCT Enabled Disabled Figure 22. Mode Diagram — RS-422 Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com SP504_02_2708 23 MODE: RS-449 DRIVER RECEIVER TDEC 3 TDEC 2 TDEC 1 TDEC 0 RDEC 3 RDEC 2 RDEC 1 RDEC 0 1 1 0 0 1 1 0 0 RD(a) 70 RxD 1 RD(b) 71 RT(a) 37 RxC 20 RT (b) 38 CS(a) 66 CTS 80 CS(b) 67 DM(a) 68 DSR 78 DM(b) 69 RR(a) 35 DCD 19 RR(b) 36 IC(a) 39 RI 21 SCT(a) 76 SCT 79 SCTEN 7 SCT(b) 77 14 TxD 61 SD(a) 59 SD(b) 13 DTR 58 TR(a) 55 TR(b) 16 RT S 54 RS(a) 52 RS(b) 17 RL 47 RL(a) 24 LL 51 LL(a) 22 ST 42 ST(a) 44 ST(b) 23 STEN 15 TxC 63 TT(a) 65 TT(b) 6 TTEN RECEIVERS DRIVERS STEN 1 0 ST TT SCTEN TTEN Disabled 1 Disabled 1 Enabled 0 Enabled 0 SCT Enabled Disabled Figure 23. Mode Diagram — RS-449 Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com SP504_02_2708 24 DRIVER RECEIVER TDEC 3 TDEC 2 TDEC 1 TDEC 0 RDEC 3 RDEC 2 RDEC 1 RDEC 0 0 1 0 1 0 1 0 1 RD(a) 70 RxD 1 RD(b) 71 RT(a) 37 RxC 20 RT (b) 38 CS(a) 66 CTS 80 CS(b) 67 DM(a) 68 DSR 78 DM(b) 69 RR(a) 35 DCD 19 RR(b) 36 IC(a) 39 RI 21 IC(b) 40 SCT(a) 76 SCT 79 SCTEN 7 SCT(b) 77 14 TxD 61 SD(a) 59 SD(b) 13 DTR 58 TR(a) 55 TR(b) 16 RT S 54 RS(a) 52 RS(b) 17 RL 47 RL(a) 45 RL(b) 24 LL 51 LL(a) 49 LL(b) 22 ST 42 ST(a) 44 ST(b) 23 STEN 15 TxC 63 TT(a) 65 TT(b) 6 TTEN MODE: RS-485 RECEIVERS DRIVERS STEN 1 0 ST TT SCTEN TTEN Disabled 1 Disabled 1 Enabled 0 Enabled 0 SCT Enabled Disabled Figure 24. Mode Diagram — RS-485 Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com SP504_02_2708 25 MODE: EIA-530 DRIVER RECEIVER TDEC 3 TDEC 2 TDEC 1 TDEC 0 RDEC 3 RDEC 2 RDEC 1 RDEC 0 1 1 0 1 1 1 0 1 RD(a) 70 RxD 1 RD(b) 71 RT(a) 37 RxC 20 RT (b) 38 CS(a) 66 CTS 80 CS(b) 67 DM(a) 68 DSR 78 DM(b) 69 RR(a) 35 DCD 19 RR(b) 36 IC(a) 39 RI 21 SCT(a) 76 SCT 79 SCTEN 7 SCT(b) 77 14 TxD 61 SD(a) 59 SD(b) 13 DTR 58 TR(a) 55 TR(b) 16 RT S 54 RS(a) 52 RS(b) 17 RL 47 RL(a) 24 LL 51 LL(a) 22 ST 42 ST(a) 44 ST(b) 23 STEN 15 TxC 63 TT(a) 65 TT(b) 6 TTEN RECEIVERS DRIVERS STEN 1 0 ST TT SCTEN TTEN Disabled 1 Disabled 1 Enabled 0 Enabled 0 SCT Enabled Disabled Figure 25. Mode Diagram — EIA-530 Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com SP504_02_2708 26 MODE: EIA-530A DRIVER RECEIVER TDEC 3 TDEC 2 TDEC 1 TDEC 0 RDEC 3 RDEC 2 RDEC 1 RDEC 0 1 1 1 1 1 1 1 1 RD(a) 70 RxD 1 RD(b) 71 RT(a) 37 RxC 20 RT (b) 38 CS(a) 66 CTS 80 CS(b) 67 DM(a) 68 DSR 78 RR(a) 35 DCD 19 RR(b) 36 IC(a) 39 RI 21 SCT(a) 76 SCT 79 SCTEN 7 SCT(b) 77 14 TxD 61 SD(a) 59 SD(b) 13 DTR 58 TR(a) 16 RT S 54 RS(a) 52 RS(b) 17 RL 47 RL(a) 45 RL(b) 24 LL 51 LL(a) 22 ST 42 ST(a) 44 ST(b) 23 STEN 15 TxC 63 TT(a) 65 TT(b) 6 TTEN RECEIVERS DRIVERS STEN 1 0 ST TT SCTEN TTEN Disabled 1 Disabled 1 Enabled 0 Enabled 0 SCT Enabled Disabled Figure 26. Mode Diagram — EIA-530A Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com SP504_02_2708 27 MODE: V .36 DRIVER RECEIVER TDEC 3 TDEC 2 TDEC 1 TDEC 0 RDEC 3 RDEC 2 RDEC 1 RDEC 0 0 1 1 0 0 1 1 0 RD(a) 70 RxD 1 RD(b) 71 RT (a) 37 RxC 20 RT(b) 38 CS(a) 66 CTS 80 DM(a) 68 DSR 78 RR(a) 35 DCD 19 IC(a) 39 RI 21 SCT(a) 76 SCT 79 SCTEN 7 SCT(b) 77 14 TxD 61 SD(a) 59 SD(b) 13 DTR 58 TR(a) 16 RT S 54 RS(a) 17 RL 47 RL(a) 24 LL 51 LL(a) 22 ST 42 ST(a) 44 ST(b) 23 STEN 15 TxC 63 TT(a) 65 TT(b) 6 TTEN RECEIVERS DRIVERS STEN 1 0 ST Disabled Enabled TTEN TT SCTEN SCT 1 Disabled 1 Enabled 0 Enabled 0 Disabled Figure 27. Mode Diagram — V.36 Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com SP504_02_2708 28 ADDITIONAL TRANSCEIVERS WITH THE SP504 Serial ports usually can have two data signals (SD, RD), three clock signals (TT, ST, RT), and at least eight control signals (CS, RS, etc.). EIA-RS-449 contains twenty six signal types for a DB-37 connector. A DB37 serial port design may require thirteen drivers and fourteen receivers. Although many applications do not use all these signals, some applications may need to support extra functions such as diagnostics. The SP504 supports enough transceivers for the primary channels of data, clock and control signals. Configuring LL, RL and TM would require two additional drivers and one receiver if designing for a DTE (one driver and two receivers for a DCE). A programmable transceiver such as the SP332 is a convenient solution in a design that requires extra single ended or differential drivers/receivers. As shown in Figure 28, the SP332 can be configured to four different variations. The SP332 in Figure 29 is configured for two single-ended drivers and one diffferential receiver. For a DTE design, the two drivers are used for LL and RL signals and the receiver is used for the TM signal. This configuration was selected because the two RS-232 drivers can be used for RS-423 by connecting a zener clamping diode to ground on the two driver outputs. The diodes will limit the voltage swing on the outputs so that the VOC = ±4V to ±6V adheres to the RS-423 specification. The differential receiver can be easily configured to RS-423 by grounding the non-inverting input. The receiver will adhere to the RS-423 specifications. CIRCUIT MNEMONIC SG SC RC IS IC TR DM SD RD TT ST RT RS CS RR SQ NS SF SR SI SSD SRD SRS SCS SRR LL RL TM SS SB  CIRCUIT NAME CIRCUIT DIRECTION CIRCUIT TYPE SIGNAL GROUND SEND COMMON RECEIVE COMMON TERMINAL IN SERVICE INCOMING CALL TERMINAL READY DATA MODE SEND DATA RECEIVE DATA TERMINAL TIMING SEND TIMING RECEIVE TIMING REQUEST TO SEND CLEAR TO SEND RECEIVER READY SIGNAL QUALITY NEW SIGNAL SELECT FREQUENCY SIGNAL RATE SELECTOR SIGNAL RATE INDICATOR SECONDARY SEND DATA SECONDARY RD SECONDARY RS SECONDARY CS SECONDARY RR LOCAL LOOPBACK REMOTE LOOPBACK TEST MODE SELECT STANDBY STANDBY INDICATOR -------------TO DCE FROM DCE TO DCE FROM DCE TO DCE FROM DCE TO DCE FROM DCE TO DCE FROM DCE FROM DCE TO DCE FROM DCE FROM DCE FROM DCE TO DCE TO DCE TO DCE FROM DCE TO DCE FROM DCE TO DCE FROM DCE FROM DCE TO DCE TO DCE FROM DCE TO DCE FROM DCE COMMON CONTROL DATA TIMING PRIMARY CHANNEL SECONDARY CHANNEL CONTROL DATA CONTROL CONTROL CONTROL SEL A SEL B LOOPBACK SHUTDOWN 0 0  0 0   0 RS-449 Interchange Circuits Table  0  0    0 Figure 28. Mode selection for the SP332 Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com SP504_02_2708 29 1N5819 +5V 10µF Drivers 22µF 25 22µF 27 26 VDD 22µF 28 31 22µF VCC 30 C1+ C1V C2+ C2- SS 32 61 59 58 56 54 52 63 65 42 44 47 45 51 49 70 71 37 38 66 67 68 69 35 36 39 40 76 77 DB-37 Connector TxD 14 DTR 13 RTS 16 TxC 15 ST 22 RL 17 LL 24 RxD 1 RxC 20 CTS 80 DSR 78 DC D 19 RI 21 SCT 79 4 22 12 30 7 25 17 35 16 34 Receivers 6 24 8 26 9 27 11 29 13 31 15 5 23 "1100" for RS-449 mode TDEC 3 —TDEC 0 (pins 9-12) SP504 see pinout diagram for various ground pins RDEC 3 —RDEC 0 (pins 5-2) +5V 0.1µF 0.1µF 9 C1+ 12 C111 C2+ 13 26 C2- 5 VCC V+ 10 0.1µF 0.1µF 10 µF V- 14 Note: The SP332 will require clamping diodes on the driver outputs to limit the voltage to +/-6V and comply with the RS-423 driver output specification of Voc = +/-4.0V to +/-6.0V and VOUT ≥ +/-3.6V with a 450Ω load. SP332 T1 T2 T3 R1 R2 R3 SEL A SEL B LOOPBACK 6 LL RL 10 14 27 28 19 20 7 3 4 15 16 18 17 23 8 21 TM 18 0 1 24 2 1 Figure 29. Adding extra differential and single-ended transceivers using the SP332 Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com SP504_02_2708 30 PACKAGE: 80 Pin LQFP Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com SP504_02_2708 3 Model Temperature Range Package Types SP504MCM-L...................................................................... 0°C to +70°C ............................................................................................... 80–pin LQFP ORDERING INFORMATION REVISION HISTORY DATE 0-27-04 7-7-08 REVISION A .0.0 DESCRIPTION Implemented tracking revision. SP504 is no longer available in MQFP package per PCN 07-02-06a. SP54 is now only available in LQFP package compliant to RoHS. Changed to Exar datasheet format and revision to .0.0. Added ESD rating of 500V HBM to electrical characteristics. Add new V.35 Driver output VOD vs. Temperature graph and update figure numbers. 0/28/08 2/7/08 .0. .0.2 Notice EXAR Corporation reserves the right to make changes to any products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no representation that the circuits are free of patent infringement. Charts and schedules contained herein are only for illustration purposes and may vary depending upon a user's specific application. While the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation receives, in writting, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized ; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances. Copyright 2008 EXAR Corporation Datasheet December 2008 Send your Interface technical inquiry with technical details to: uarttechsupport@exar.com Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited. Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com SP504_02_2708 32
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