SP6133EB

SP6133 (10A MAX.) Evaluation Board Manual
Easy Evaluation for the SP6133ER1 12V Input, 0 to 10A Output Synchronous Buck Converter
Precision 0.80V, ±1% High Accuracy Reference
Small form factor
Feature Rich: Single supply operation, Over-current protection with auto-restart, Power Good Output, Enable input, Fast transient response, Short Circuit Shutdown Protection, Programmable soft start. SP6133EB SCHEMATIC VIN DBST BAT54WS VCC 14 15 13 BST VIN VCC SWN ISP ISN R 3 Ohm 8 7 6 5 9 Cs R4 C6 Rs3 0.1uF NP QB 6.8nF EN 1 VOUT Rs1 C3 C4 100uF 100uF 6.3V 6.3V Rs2 J1 2 3 2.7uH, 15A, 4.1 mOhm 5.11K,1% R5 C5 L1 SC5018-2R7M 1 2 3 47nF 0.01uF Si4320DY 4mOhm 4 PWRGD 10.0k,1% 12V 10 CSS 10.0k,1% 16V C1, C2, C3, C4 CERAMIC 1210 X5R 1 2 3 11 SS R3 20.0k,1% UVIN 22uF 16V GND Si4394DY 9.75mOhm 4 0.1uF 12 8 VFB U1 SP6133 GND 5 4 PGND PWRGD 3 C2 22uF QT CBST GH 7 2 GND3 GL EN 1 COMP 10uF 0805 6 CVCC UVIN 16 8 7 6 5 C1 3.30V 0-10A GND2 PTC36SAAN 5.11K,1% CZ2 1,500pF RZ2 23.2K,1% CZ3 560pF RZ3 1k,1% CP1 CF1 39pF 22pF R1 68.1k,1% R2 21.5k,1% Notes: 1) All resistors & capacitors size 0603 unless other wise specified Rev 3/30/06 SP6133 Evaluation Manual Copyright 2006 Sipex Corporation USING THE EVALUATION BOARD 1) Powering Up the SP6133EB Circuit Connect the SP6133 Evaluation Board with an external +12V power supply. Connect with short leads and large diameter wire directly to the “VIN” and “GND” posts. Connect a Load between the “VOUT” and “GND2” posts, again using short leads with large diameter wire to minimize inductance and voltage drops. 2) Measuring Output Load Characteristics It’s best to GND reference scope and digital meters using the Star GND post in the center of the board. VOUT ripple can best be seen touching probe tip to the pad for COUT and scope GND collar touching Star GND post – avoid a GND lead on the scope which will increase noise pickup. 3) Using the Evaluation Board with Different Output Voltages While the SP6133 Evaluation Board has been tested and delivered with the output set to 3.30V, by simply changing one resistor, R2, the SP6133 can be set to other output voltages. The relationship in the following formula is based on a voltage divider from the output to the feedback pin VFB, which is set to an internal reference voltage of 0.80V. Standard 1% metal film resistors of surface mount size 0603 are recommended. Vout = 0.80V ( R1 / R2 + 1 ) => R2 = R1 / [ ( Vout / 0.80V ) – 1 ] Where R1 = 68.1KΩ and for Vout = 0.80V setting, simply remove R2 from the board. Furthermore, one could select the value of R1 and R2 combination to meet the exact output voltage setting by restricting R1 resistance range such that 50KΩ ≤ R1 ≤ 100KΩ for overall system loop stability. Note that since the SP6133 Evaluation Board design was optimized for 12V down conversion to 3.30V, changes of output voltage and/or input voltage will alter performance from the data given in the Power Supply Data section. POWER SUPPLY DATA The SP6133EB is designed with an accurate 1.5% reference over line, load and temperature. Figure 1 data shows a typical SP6133ER Evaluation Board efficiency plot, with efficiencies to 95% and output currents to 10A. SP6133ER Load Regulation in Figure 2 shows only 0.09% change in output voltage from no load to 10A load. Figures 3 and 4 show the fast transient response of the SP6133. Start-up response in Figures 5, 6 and 7 show a controlled start-up with different output load behavior when power is applied where the input current rises smoothly as the soft-start ramp increases. In Figure 8 the hiccup mode gets activated in response to an output dead short circuit condition and will soft-start until the over-load is removed. Figure 9 and 10 show output voltage ripple less than 30mV over complete load range. While data on individual power supply boards may vary, the capability of the SP6133ER of achieving high accuracy over a range of load conditions shown here is quite impressive and desirable for accurate power supply design. Rev 3/30/06 SP6133 Evaluation Manual Page 2 of 10 Copyright 2006 Sipex Corporation Output Voltage vs Load Current Efficiency vs Load Current 3.340 Output Voltage (V) 100 Efficiency (%) 90 80 70 60 Vin=12V Vout=3.3V 50 3.335 3.330 Vin=12V Vout=3.3V 3.325 3.320 40 0.0 2.0 4.0 6.0 8.0 0.0 10.0 2.0 4.0 6.0 8.0 10.0 Load current (A) Load current (A) Figure 1. Efficiency vs Load Figure 2. Load Regulation Vout (200mV/div) Vout (100mV/div) Vin=12V Vout=3.3V Vin=12V Vout=3.3V Iout(5A/div) Iout (5A/div) Figure 3. Load Step Response: 5->10A Figure 4. Load Step Response: 0->10A Vin Vin Vout Vin=12V Vout=3.3V SoftStart Iout (5A/div) Figure 5. Start-Up Response: No Load Vin Vout SoftStart Vin=12V Vout=3.3V Iout(5A/div) Figure 6. Start-Up Response: 5A Load Vout Vout SoftStart SoftStart Vin=12V Vout=3.3V Iout(5A/div) Vin=12V Vout=3.3V Ichoke(25A/div) Vout Figure 7. Start-Up Response: 10A Load Rev 3/30/06 SP6133 Evaluation Manual Page 3 of 10 Figure 8. Output Load Short Circuit Copyright 2006 Sipex Corporation Vout Ripple(20mV/div) Vout Ripple(20mV/div) Vin=12V Vout=3.3V Vin=12V Vout=3.3V SW Node SW Node Figure 9. Output Noise at No Load Inductance (uH) Manufacturer/Part No. 2.7 Inter-Technical SC5018-2R7 Capacitance( uF) Manufacturer/Part No. 22 TDK C4532X5R1C336M 100 TDK C3225X5R0J107M Figure 10. Output Noise at 10A Load INDUCTORS - SURFACE MOUNT Inductor Specification Size Inductor Type Series R Isat mOhms (A) LxW(mm) Ht.(mm) 4.1 15.00 12.6x12.6 4.50 Shielded Ferrite Core CAPACITORS - SURFACE MOUNT Capacitor Specification Size ESR Ripple Current Voltage Capacitor ohms (max) (A) @45C LxW(mm) Ht.(mm) (V) Type 0.005 4.00 3X2 2.00 16.0 X5R Ceramic 0.005 4.00 3X2 2.00 6.3 Manufacturer Website www.inter-technical.com Manufacturer Website www.TDK.com X5R Ceramic www.TDK.com Foot Print Manufacturer Website SO-8 www.vishay.com www.vishay.com MOSFETS - SURFACE MOUNT MOSFET Manufacturer/Part No. N-Ch N-Ch VISHAY Si4394DY VISHAY Si4320DY RDS(on) ohms (max) 9.75 4 MOSFET Specification Qg ID Current Voltage (A) nC (Typ) nC (Max) (V) 14.0 12.5 30.0 22.0 45.0 70.0 30.0 SO-8 Table 1: SP6133EB Suggested Components and Vendor Lists Rev 3/30/06 SP6133 Evaluation Manual Page 4 of 10 Copyright 2006 Sipex Corporation LOOP COMPENSATION DESIGN The open loop gain of the SP6133EB can be divided into the gain of the error amplifier Gamp(s), PWM modulator Gpwm, buck converter output stage Gout(s), and feedback resistor divider Gfbk. In order to cross over at the selected frequency fc, the gain of the error amplifier must compensate for the attenuation caused by the rest of the loop at this frequency. The goal of loop compensation is to manipulate the open loop frequency response such that its gain crosses over 0dB at a slope of –20dB/dec. The open loop crossover frequency should be higher than the ESR zero of the output capacitors but less than 1/5 of the switching frequency fs to insure proper operation. Since the SP6133EB is designed with ceramic type output capacitors, a Type III compensation circuit is required to give a phase boost of 180° in order to counteract the effects of the output LC under damped resonance double pole frequency. Figure 11. SP6133EB Voltage Mode Control Loop with Loop Dynamic Rev 3/30/06 SP6133 Evaluation Manual Page 5 of 10 Copyright 2006 Sipex Corporation The simple guidelines for positioning the poles and zeros and for calculating the component values for Type III compensation are as follows: R1 = 68.1K R2 = 0.8 × R1 Vout − 0.8 (sets output voltage) 1 CZ 3 = ZSF × R1 × ((6.28 × fc ) RZ 2 = (sets first zero) 1 LC ) 2 × L × Cout + 1 Vramp × (sets the cross-over frequency, fc) 6.28 × fc × CZ 3 Vin 1 CZ 2 = ZSF × RZ 2 × 1 (sets second zero) LC CP1 = 1 (sets first high-frequency pole) 6.28 × fs × RZ 2 RZ 3 = 1 (sets second high-frequency pole) 6.28 × fs × CZ 3 Where ZSF=(f compensation double zero)/(f circuit double pole) Here ZSF is set at 0.7. As a particular example, consider for the following SP6133EB, 10A MAX with component selections for a type III Voltage Loop Compensation: Vin = 12V Vout = 3.30V @ 0 to 10A load Select L = 2.7 uH => 30% current ripple. Select Cout = 200uF 2x100uF Ceramic capacitors (Resr ≈ 2.5mΩ) fs = 300KHz SP6133ER1 internal Oscillator Frequency Vramp_pp = 1.0V SP6133ER1 internal Ramp Peak to Peak Amplitude Rev 3/30/06 SP6133 Evaluation Manual Page 6 of 10 Copyright 2006 Sipex Corporation Step by step design procedures: a. R2 = 21.8Ω b. CZ3 = 487pF c. Let fc =40KHz then: d. RZ2 = 32.9kΩ e. CZ2 = 1390pF f. CP1 = 22pF g. RZ3 = 1.09KΩ h. CF1 = 22pF to stabilize SP6138ER1 internal Error Amplifier The above component values were used as a starting point for compensating the converter and after laboratory testing the values shown in circuit schematic of page 1 were used for optimum operation. Figure 12- Gain/Phase measurement of SP6133EB shown on page 1, cross-over frequency (fc) is 60KHz with a corresponding phase of 50 degrees Rev 3/30/06 SP6133 Evaluation Manual Page 7 of 10 Copyright 2006 Sipex Corporation PCB LAYOUT DRAWINGS Figure 13. SP6133EB Component Placement Figure 14. SP6133EB PCB Layout Top Side Rev 3/30/06 SP6133 Evaluation Manual Page 8 of 10 Copyright 2006 Sipex Corporation Figure 15. SP6133EB PCB Layout Bottom Side Figure 16. SP6133EB PCB Layout Inner Layer 1 & Inner Layer 2 Rev 3/30/06 SP6133 Evaluation Manual Page 9 of 10 Copyright 2006 Sipex Corporation Table 2: SP6133EB List of Materials Line No. Ref. Des. Qty. Manuf. Manuf. Part Number Layout Size Component Vendor Phone # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 PCB U1 QT QB DS DBST L1 C1, C2 C3, C4 C5 C6 CBST, CS CF1 CP1 CSS CVCC CZ2 CZ3 R1 R2 R3 R4,R5 RS1, RS2 RS3 RZ2 RZ3 J1 (J1) VIN, VOUT, VCC, GND, GND2, GND3, UVIN, PWRGD 1 1 1 1 0 1 1 2 2 1 1 2 1 1 1 1 1 1 1 1 1 2 2 0 1 1 1 1 Sipex Sipex Vishay Semi Vishay Semi 1.125"X1.875" QFN-16 SO-8 SO-8 SP6133EB Synchronous Buck Controller NFET 30V, 9.75mOhm NFET 30V, 4mOhm 978-667-7800 Vishay Semi Inter-Technical TDK TDK TDK TDK TDK TDK TDK TDK TDK TDK TDK Panasonic Panasonic Panasonic Panasonic Panasonic SOD-323 12.6X12.6mm 1812 1210 0603 0603 0603 0603 0603 0603 0805 0603 0603 0603 0603 0603 0603 0603 200mA-30V Schottky Diode 2.7uH Coil, 15A, 4.10 mOhm 22uF Ceramic X5R 16V 100uF Ceramic X5R 6.3V 0.01uF Ceramic X7R 50V 6.8nF Ceramic X5R 50V 0.1uF Ceramic X7R 16V 22pF Ceramic COG 50V 39pF Ceramic COG 50V 47,000pF Ceramic X7R 50V 10uF Ceramic X5R 6.3V 1,500pF Ceramic COG 50V 560pF Ceramic COG 50V 68.1K Ohm Thick Film Res 1% 21.5K Ohm Thick Film Res 1% 20.0K Ohm Thick Film Res 1% 10.0K Ohm Thick Film Res 1% 5.11K Ohm Thick Film Res 1% 800-344-4539 Panasonic Panasonic Sullins Sullins 146-6587-00 SP6133 Si4394DY Si4320DY Not populated BAT54WS SC5018-2R7M C4532X5R1C336M C3225X5R0J107M C1608X7R1H103K C1608JB1H682K C1608X7R1H104K C1608COG1H220J C1608COG1H390J C1608X7R1H473K C2012X5R0J106M C1608COG1H152J C1608COG1H561J ERJ-3EKF6812V ERJ-3EKF2152V ERJ-3EKF2002V ERJ-3EKF1002V ERJ-3EKF5111V Not populated ERJ-3EKF2322V ERJ-3EKF1001V PTC36SAAN STC02SYAN 0603 0603 .32x.12 .2x.1 23.2K Ohm Thick Film Res 1% 1K Ohm Thick Film Res 1% 36-Pin (3x12) Header Shunt 800-344-4539 8 Vector Electronic K24C/M .042 Dia Test Point Post 800-344-4539 29 978-667-7800 402-563-6866 402-563-6866 914-347-2474 978-779-3111 978-779-3111 978-779-3111 978-779-3111 978-779-3111 978-779-3111 978-779-3111 978-779-3111 978-779-3111 978-779-3111 978-779-3111 800-344-4539 800-344-4539 800-344-4539 800-344-4539 800-344-4540 800-344-4539 800-344-4539 800-344-4539 ORDERING INFORMATION Model Temperature Range Package Type SP6133EB ..….........................− 40°C to +85°C.............……..SP6133 Evaluation Board SP6133ER1............................ − 40°C to +85°C.....................................…….16-pin QFN Rev 3/30/06 SP6133 Evaluation Manual Page 10 of 10 Copyright 2006 Sipex Corporation