SP6201EM5-L-2-85

SP6200 / SP6201 100mA/200mA Micropower CMOS LDO Regulators January 2020 Rev. 2.1.1 GENERAL DESCRIPTION APPLICATIONS The SP6200 and SP6201 are CMOS Low Dropout (LDO) regulators designed to meet a broad range of applications that require accuracy, speed and ease of use. • Battery-Powered Systems These LDOs offer extremely low quiescent current which only increases slightly under load, thus providing advantages in ground current performance over bipolar LDOs. The LDOs handle an extremely wide load range and guarantee stability with a 1μF ceramic output capacitor. They have excellent low frequency Power Supply Rejection Ratio (PSRR), not found in other CMOS LDOs and thus offer exceptional Line Regulation. High frequency PSRR is better than 40dB up to 400kHz. Load Regulation is excellent and temperature stability is comparable to bipolar LDOs. An enable feature is provided on all versions. • Digital Cameras • Medical Equipments • MP3/CD Players FEATURES • 100mA/200mA Output Current − SP6200: 100mA – SP6201: 200mA − Low Dropout Voltage: 160mV @ 100mA • 2.5V to 6.0V Input Voltage − Fixed and Adjustable Output Voltage − 2% Output Voltage Accuracy • Ultra Low Ground Current: − 200μA @ 200mA & 28μA @ 100μA Load • Tight Load and Line Regulation Both LDOs are available in fixed & adjustable output voltage versions and come in an industry standard 5-pin SOT-23 and small 2X3mm 8-pin DFN packages. A VOUT good indicator is provided on all fixed output versions. • 78dB PSRR @ 1KHz • RESET/Power Good Output • Logic-Controlled Electronic Enable • Unconditionally Stable with 1μF Ceramic Capacitor • Current Limit and Thermal Protection • RoHS Compliant “Green”/Halogen Free 5-Pin SOT23 and 8-Pin DFN Packages SP6201 is available, SP6200 is obsolete TYPICAL APPLICATION DIAGRAM Fig. 1: SP6200 / SP6201 Application Diagram 1/17 Rev. 2.1.1 SP6200 / SP6201 100mA/200mA Micropower CMOS LDO Regulators ABSOLUTE MAXIMUM RATINGS OPERATING RATINGS These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. Input Voltage Range VIN ............................. +2.5V to +6V Enable Input Voltage (VEN) ................................ 0V to 6V Junction Temperature Range ....................-40°C to 125°C Thermal Resistance ...................................................... SOT-23-5 (θJA) .............................................191°C/W DFN-8 (θJA) ................................................... 59°C/W Supply Input Voltage (VIN) ............................... -2V to 7V Output Voltage (VOUT)............................ -0.6 to (VIN +1V) Enable Input Voltage (VEN) ............................... -2V to 7V Storage Temperature ............................ -65°C to +150°C Power Dissipation ............................... Internally Limited1 Lead Temperature (Soldering, 5 sec) ..................... 260°C Note 1: Maximum power dissipation can be calculated using the formula: PD = (TJ(max) - TA) / θJA, where TJ(max) is the junction temperature, TA is the ambient temperature and θJA is the junction-to-ambient thermal resistance. θJC is 6°C/W for this package. Exceeding the maximum allowable power dissipation will result in excessive die temperature and the regulator will go into thermal shutdown mode. ELECTRICAL SPECIFICATIONS Specifications with standard type are for an Operating Junction Temperature of TJ = 25°C only; limits applying over the full Operating Junction Temperature range are denoted by a “•”. Minimum and Maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise indicated, VIN = (VOUT + 1V), VOUT = 5V for Adjustable version, CIN = 1.0µF, COUT = 1.0µF and IL = 100µA, TJ= 25°C. Parameter Output Voltage Accuracy, (VO) Reference Voltage Min. -2 -3 1.213 Output Voltage Temperature Coefficient2 (∆ VO/∆T) Typ. Max. 1.250 2 3 1.287 60 Units % V Conditions • • Variation from specified VOUT Adjustable version only ppm/°C Minimum Supply Voltage 2.50 2.55 2.70 3.00 Line Regulation, (∆VO/VIN) 0.03 0.2 %/V • VIN = (VOUT + 1V) to 6V Load Regulation (∆VO/VO) 0.07 0.14 0.25 0.50 % % • • IL = 0.1mA to 100mA, SP6200 IL = 0.1mA to 200mA, SP6201 0.3 0.3 0.2 1 1 4 7 120 160 250 300 400 500 % % 3 SP6200-1.5V & 1.8 Load Reg. SP6201-1.5V & 1.8 Load Reg. 70 Dropout Voltage4 (VIN – VO) (Not applicable to voltage options below 2.7V) 160 320 Shutdown Quiescent Current (IGND) 1 28 40 45 200 250 400 500 200 78 Power Supply Rejection Ratio, (PSRR) Current Limit, (ICL) V V V V 0.01 110 Ground Pin Current5 (IGND) 2.70 2.80 2.95 3.50 140 mV mV mV µA µA µA µA IL = 0.1mA to 100mA, VIN = 2.95V IL = 0.1mA to 200mA, VIN = 3.5V • • • • • • 200 2/17 mA IL = 100µA IL = 50mA IL = 100mA IL = 200mA, SP6201 Only VEN ≥ 0.4V VEN ≥ 2.0V, IL = 100 µA • VEN ≥ 2.0V, IL = 100 mA, SP6200 only (for 1.5 & 1.8, VIN = 2.95) • VEN ≥ 2.0V, IL = 200mA, SP6201 Only (for 1.5 & 1.8, VIN = 3.5) Frequency = 100Hz, IL = 10mA dB 40 100 mV IL = 100µA IL = 50mA IL = 100mA IC = 200mA Frequency = 400Hz, IL = 10mA • SP6200 Rev. 2.1.1 SP6200 / SP6201 100mA/200mA Micropower CMOS LDO Regulators Parameter Min. Typ. Max. 300 420 600 162 Thermal Limit Units Thermal Regulation (ΔVO/ΔPD) 0.05 %/W Output Noise, (eNO) 150 µVrms ENABLE INPUT Enable Input Logic-Low Voltage, (VIL) Enable Input Logic-High Voltage, (VIH) 0.4 1.6 Enable Input Current, (IIL), (IIH) Reset Not Output -2 SP6201 Turns On °C 147 6 Conditions • Turns Off IL = 50mA, CL = 1µF 0.1µF from VOUT to Adj. 10Hz to 100kHz V • Regulator Shutdown V • Regulator Enabled 0.01 1 µA • VIL < 0.4V 0.01 1 µA • VIH > 2.0V -4 -6 % Threshold Note 2: Output voltage temperature coefficient is defined as the worst case voltage change divided by the totaltemperature range. Note 3: Load Regulation is measured at constant junction temperature using low duty cycle pulse testing. Parts are tested for load regulation in the load range; from 0.1mA to 100mA, SP6200; from 0.1mA to 200mA, SP6201. Changes in output voltage due to heating effects are covered by the thermal regulation specification. Not applicable to output voltages less than 2.5V. Note 4: Dropout Voltage is defined as the input to output differential at which the output voltage drops 2% below its nominal value measured at 1V differential. Not applicable to output voltages less than 2.7V. Note 5: Ground pin current is the regulator quiescent current. The total current drawn from the supply is the sum of the load current plus the ground pin current. Note 6: Thermal regulation is defined as the change in output voltage at a time ”t” after a change in power dissipation is applied, excluding load or line regulation effects. Specifications are for a 100mA load pulse at VIN = 6V for t = 10ms. BLOCK DIAGRAMS Fig. 2: Fixed Voltage and Adjustable Regulators Adjustable versions are obsolete 3/17 Rev. 2.1.1 SP6200 / SP6201 100mA/200mA Micropower CMOS LDO Regulators PIN ASSIGNMENT Fig. 3: SP6200 / SP6201 Pin Assignment DFN-8 version is obsolete PIN DESCRIPTION SOT 23-5 Name SOT-23-5 IN 1 Power Supply Input Description GND 2 Ground Terminal EN 3 Enable/Shutdown Input – CMOS or TTL compatible Input - Logic high = enable - Logic low = shutdown Reset/Power Good - Fixed voltage option: Open Drain indicating that VOUT is good. RST(Reset not)/ADJ 4 OUT 5 Adjustable Input – Adjustable voltage option: Adjustable regulator feedback input. Connect to a resistive voltageDivider network. Regulator Output Voltage 8 PIN DFN DFN-8 version is obsolete Name DFN-8 Description NC 1 No Connect VIN 2 Power Supply Input VOUT 3 Regulator Output Voltage NC 4 No Connect Reset/Power Good - Fixed voltage option: Open Drain indicating that VOUT is good. RESET/ADJ 5 NC 6 No Connect NC 7 No Connect EN 8 Enable/Shutdown Input – CMOS or TTL compatible Input - Logic high = enable Logic low = shutdown Adjustable Input – Adjustable voltage option: Adjustable regulator feedback input. Connect to a resistive voltageDivider network. 4/17 Rev. 2.1.1 SP6200 / SP6201 100mA/200mA Micropower CMOS LDO Regulators ORDERING INFORMATION(1), (2) Part Number SP6201EM5-L-1-8/TR Temperature Range Package Packing Method Voltage Option Lead Free(3) -40°C ≤ TJ ≤ +125°C SOT-23-5 Tape & Reel 1.8V Yes 3.0V Yes SP6201EM5-L-3-0/TR -40°C ≤ TJ ≤ +125°C SOT-23-5 Tape & Reel SP6201EM5-L-3-3/TR -40°C ≤ TJ ≤ +125°C SOT-23-5 Tape & Reel 3.3V Yes SP6201EM5-L-5-0/TR -40°C ≤ TJ ≤ +125°C SOT-23-5 Tape & Reel 5.0V Yes NOTES: 1. Refer to www.maxlinear.com/SP6201 for most up-to-date Ordering Information. 2. SP6200 (100mA), SP6201 adjustable versions and SP6201 DFN-8 versions are obsolete. 3. Visit www.maxlinear.com for additional information on Environmental Rating. 5/17 Rev. 2.1.1 SP6200 / SP6201 100mA/200mA Micropower CMOS LDO Regulators TYPICAL PERFORMANCE CHARACTERISTICS All data taken at 25°C, VIN = 5.5V, IO = 0.1mA, CIN = COUT = 1μF, unless otherwise specified - Schematic and BOM from Application Information section of this datasheet. Fig. 4: Dropout vs. Io (SP6201 fixed 3.0V) Fig. 5: Dropout vs. Temp (SP6201 fixed 3.0V) Fig. 6: Dropout vs. Temp (SP6201 fixed 3.0V) Fig. 7: Iq vs. Vin (fixed 3.0V, IO=0µA) Fig. 8: Iq vs. Temp (SP6201 fixed 3.0V, EN=Vin, IO=0uA) Fig. 9: Iq vs. Temp (SP6201 fixed 3.0V, EN=0V, IO=0uA) 6/17 Rev. 2.1.1 SP6200 / SP6201 100mA/200mA Micropower CMOS LDO Regulators Fig. 10: IGND vs. VIN (SP6201 fixed 3.0V) Fig. 11: IGND vs. IO (SP6201 fixed 3.0V) Fig. 12: VOUT vs. Temp (fixed 3.0V) Fig. 13: VOUT vs. Temp (fixed 3.3V) Fig. 14: VOUT vs. Temp (adjustable) Fig. 15: VOUT vs. Temp (adjustable) 7/17 Rev. 2.1.1 SP6200 / SP6201 100mA/200mA Micropower CMOS LDO Regulators Fig. 16: VOUT vs. Temp (adjustable) Fig. 17: VOUT vs. Temp (adjustable) Fig. 18: Line Regulation (SP6201 fixed 3.0V) Fig. 19: Load Regulation (SP6201 fixed 3.0V) Fig. 20: Current Limit vs. Temp (fixed 3.3V, VIN=4V) Fig. 21: Current Limit vs. Temp (fixed 3.3V, VIN=4V) 8/17 Rev. 2.1.1 SP6200 / SP6201 100mA/200mA Micropower CMOS LDO Regulators Fig. 22: Turn on time, IO=1mA, 4VIN Fig. 23: Turn on time, IO=100mA, 4VIN Fig. 24: Turn on time, IO=300mA, 4VIN Fig. 25: Turn on time, IO=100mA, 7VIN Fig. 26: Turn off time, IO=1mA, 4VIN Fig. 27: Turn off time, IO=50mA, 4VIN 9/17 Rev. 2.1.1 SP6200 / SP6201 100mA/200mA Micropower CMOS LDO Regulators Fig. 28: Turn off time, IO=100mA, 4VIN Fig. 29: Turn off time, IO=100mA, 7VIN Fig. 30: Inrush Current, IO=100mA Fig. 31: Inrush Current, IO=100µA Fig. 32: Load Transient Response, 100mA step, 4VIN Fig. 33: Load Transient Response, 100mA step, 7VIN 10/17 Rev. 2.1.1 SP6200 / SP6201 100mA/200mA Micropower CMOS LDO Regulators Fig. 34: Load Transient Response, 200mA step, 4VIN Fig. 35: Load Transient Response, 300mA step, 4VIN Fig. 36: Line Transient Response Fig. 37: Line Transient Response Fig. 38: Power Supply Rejection Ratio Fig. 39: Power Supply Rejection Ratio 11/17 Rev. 2.1.1 SP6200 / SP6201 100mA/200mA Micropower CMOS LDO Regulators Fig. 40: Power Supply Rejection Ratio Fig. 41: Power Supply Rejection Ratio THEORY OF OPERATION LDOs have a two stage amplifier which handles an extremely wide load range (10μA to 300mA) and guarantees stability with a 1μF ceramic load capacitor. The LDO amplifier has excellent gain and thus touts PSRR performance not found in other CMOS LDOs. The amplifier guarantees no overshoot on power up or while enabled through the EN pin. The amplifier also contains an active pull down, so that when the load is removed quickly the output voltage transient is minimal; thus output deviation due to load transient is small and fairly well matched when connecting and disconnecting the load. GENERAL OVERVIEW The SP6200 and SP6201 are CMOS LDOs designed to meet a broad range of applications that require accuracy, speed and ease of use. These LDOs offer extremely low quiescent current which only increases slightly under load, thus providing advantages in ground current performance over bipolar LDOs. The LDOs handle an extremely wide load range and guarantee stability with a 1μF ceramic output capacitor. They have excellent low frequency PSRR, not found in other CMOS LDOs and thus offer exceptional Line Regulation. High frequency PSRR is better than 40dB up to 400kHz. Load Regulation is excellent and temperature stability is comparable to bipolar LDOs. Thus, overall system accuracy is maintained under all DC and AC conditions. Enable feature is provided on all versions. A Vout good indicator (RSN pin) is provided in all the fixed output voltage devices. An adjustable output version is also available. Current Limit and Thermal protection is provided internally and is well controlled. An accurate 1.250V bandgap reference is bootstrapped to the output in fixed output versions of 2.7V and higher. This increases both the low frequency and high frequency PSRR. The adjustable version also has the bandgap reference bootstrapped to the output, thus the lowest externally programmable output voltage is 2.7V. The 2.5V fixed output version has the bandgap always connected to the Vin pin. Unlike many LDOs, the bandgap reference is not brought out for filtering by the user. This tradeoff was made to maintain good PSRR at high frequency (PSRR can be degraded in a system due to switching noise coupling into this pin). Also, often leakages of the bypass capacitor or other components cause an error on this high impedance bandgap node. Thus, this tradeoff has been made with "ease of use" in mind. ARCHITECTURE The SP6200 and SP6201 are only different in their current limit threshold. The SP6200 has a current limit of 140mA, while the SP6201 current limit is 420mA. The SP6201 can provide pulsed load current of 300mA. The 12/17 Rev. 2.1.1 SP6200 / SP6201 100mA/200mA Micropower CMOS LDO Regulators PROTECTION bootstrapped to the output, the output voltage must be above the minimum bandgap supply voltage. The bandgap requires 2.7V or greater at -40°C and requires 2.5V or greater at 0°C. The regulator's output can be adjusted to a specific output voltage by using two external resistors, see block diagram. The resistor's set the output voltage based on the following equation: Current limit behavior is very well controlled, providing less than 10% variation in the current limit threshold over the entire temperature range for both SP6200 and SP6201. The SP6200 has a current limit of 140mA, while the SP6201 has a current limit of 420mA. Thermal shutdown activates at 162°C and deactivates at 147°C. Thermal shutdown is very repeatable with only a 2 to 3 degree variation from device to device. Thermal shutdown changes by only 1 to 2 degrees with Vin change from 4V to 7V. 𝑉𝑉𝑂𝑂𝑂𝑂𝑂𝑂 = 1.25 × �1 + 𝑅𝑅2 � 𝑅𝑅1 Resistor values are not critical because the ADJ node has a high input impedance, but for best results use resistors of 470kΩ or less. A capacitor from ADJ to VOUT pin provides improved noise performance as is shown in the following plot. ENABLE (SHUTDOWN NOT) INPUT The LDOs are turned off by pulling the EN pin low and turned on by pulling it high. If it is not necessary to shut down the LDO, the EN (pin 3) should be tied to IN (pin 1) to keep the regulator output on at all time. The enable threshold is 0.9V and does not change more than 100mV over the entire temperature and VIN voltage range. The lot to lot variations in Enable Threshold are also within 100mV. Shutdown current is guaranteed to be