SP706REU-L

SP706R / SP706S / SP706T, SP708S / SP708T Data Sheet 3.0V / 3.3V Low Power Microprocessor Supervisory Circuits General Description Features The SP706R / SP706S / SP706T and SP708S / SP708T series is a family of microprocessor (µP) supervisory circuits that integrate a myriad of components involved in discrete solutions which monitor power-supplies and batteries in µP and digital systems. ■ The SP706R / SP706S / SP706T and SP708S / SP708T series will significantly improve system reliability and operational efficiency when compared to solutions using discrete components. The features of the SP706R / SP706S / SP706T and SP708S / SP708T series include a watchdog timer, a µP reset, a power fail comparator, and a manualreset input. ■ The SP706R / SP706S / SP706T and SP708S / SP708T series is ideal for 3.0V or 3.3V applications in automotive systems, computers, controllers and intelligent instruments. The SP706R / SP706S / SP706T and SP708S / SP708T series is an ideal solution for systems in which critical monitoring of the power supply to the µP and related digital components is demanded. ■ ■ ■ ■ ■ ■ ■ ■ Precision low voltage monitor  SP706R: +2.63V  SP706S / SP708S: +2.93V  SP706T / SP708T: +3.08V 200ms RESET pulse width  SP706R / SP706S / SP706T: active low  SP708S / SP708T: active high and active low Independent watchdog timer  1.6s timeout (SP706R / SP706S / SP706T)  Enable / disable function 40µA maximum supply current Debounced TTL / CMOS manual reset input RESET asserted down to VCC = 1V VCC glitch immunity Voltage monitor for power failure or low battery warning 8-Pin NSOIC and MSOP packages Pin compatible with industry standards 706R/S/T and 708S/T Applications ■ ■ Processors & DSPs based systems Industrial & medical instruments Ordering Information - page 16 Selection Table Table 1: Selection Table for SP706R / SP706S / SP706T and SP708S / SP708T Part Number RESET Threshold RESET Active Manual RESET Watchdog PFI Accuracy SP706R 2.63V Low Yes Yes 4% SP706S 2.93V Low Yes Yes 4% SP706T 3.08V Low Yes Yes 4% SP708S 2.93V Low and High Yes No 4% SP70ST 3.08V Low and High Yes No 4% • www.maxlinear.com• Rev 3.0.2 SP706R / SP706S / SP706T, SP708S / SP708T Data Sheet Revision History Revision History Revision Release Date Change Description 2.0.0 6/4/10 Reformat of datasheet 3.0.0 4/14/15 Change of specs to match industry standards [ECN 1517-08] 3.0.1 4/12/19 Updated to MaxLinear format. Updated ordering information and moved to end. Added Note 1 to Absolute Maxmimum Ratings and Note 2 to Electrical Characteristics table. Corrected active low pin names. Obsolete SP708R removed. 3.0.2 9/10/19 Corrected typo in PFO pin description. 9/10/19 Rev 3.0.2 ii SP706R / SP706S / SP706T, SP708S / SP708T Data Sheet Table of Contents Table of Contents General Description............................................................................................................................................. i Features............................................................................................................................................................... i Applications ......................................................................................................................................................... i Selection Table..................................................................................................................................................... i Specifications ..................................................................................................................................................... 1 Absolute Maximum Ratings...........................................................................................................................................1 ESD Ratings ..................................................................................................................................................................1 Electrical Characteristics ...............................................................................................................................................2 Block Diagrams................................................................................................................................................... 3 Pin Information ................................................................................................................................................... 4 Pin Configurations .........................................................................................................................................................4 Typical Performance Characteristics................................................................................................................ 6 Features............................................................................................................................................................... 9 Theory of Operation .......................................................................................................................................... 9 RESET Output.............................................................................................................................................................. 9 Watchdog Timer ........................................................................................................................................................... 9 Power-Fail Comparator .............................................................................................................................................. 10 Manual Reset ............................................................................................................................................................. 10 Ensuring a Valid Reset Output Down to VCC = 0V.............................................................................................10 Monitoring Voltages Other Than the Unregulated DC Input....................................................................................... 10 Monitoring a Negative Voltage Supply ....................................................................................................................... 10 Interfacing to µPs with Bidirectional Reset Pins .................................................................................................11 Negative-Going VCC Transient ................................................................................................................................... 11 Applications ..................................................................................................................................................... 12 Mechanical Dimensions ................................................................................................................................... 13 NSOIC8 ....................................................................................................................................................................... 13 Mechanical Dimensions ................................................................................................................................... 14 MSOP8 ........................................................................................................................................................................14 Recommended Land Pattern and Stencil....................................................................................................... 15 MSOP8 ........................................................................................................................................................................15 Ordering Information........................................................................................................................................ 16 9/10/19 Rev 3.0.2 iii SP706R / SP706S / SP706T, SP708S / SP708T Data Sheet List of Figures List of Figures Figure 1: SP706R / SP706S / SP706T Block Diagram......................................................................................... 3 Figure 2: SP708S / SP708T Block Diagram ......................................................................................................... 3 Figure 3: SP706R, SP706S, SP706T, SP708S and SP708T Pin Assignments ................................................... 4 Figure 4: Power-Fail Comparator De-Assertion Response Time ......................................................................... 6 Figure 5: Power-Fail Comparator De-Assertion Response Time Circuit .............................................................. 6 Figure 6: Power-Fail Comparator Assertion Response Time ............................................................................... 6 Figure 7: Power-Fail Comparator Assertion Response Time Circuit .................................................................... 6 Figure 8: SP706 RESET Output Voltage vs. Supply Voltage ............................................................................... 6 Figure 9: SP706 RESET Output Voltage vs. Supply Voltage Circuit.................................................................... 6 Figure 10: SP706 RESET Response Time........................................................................................................... 7 Figure 11: SP706 RESET Response Time Circuit ............................................................................................... 7 Figure 12: SP708 RESET and RESET Assertion................................................................................................. 7 Figure 13: SP708 RESET and RESET De-Assertion ........................................................................................... 7 Figure 14: SP708 RESET and RESET Assertion and De-Assertion Circuit......................................................... 7 Figure 15: SP708 RESET Output Voltage vs. Supply Voltage ............................................................................. 8 Figure 16: SP708 RESET Response Time........................................................................................................... 8 Figure 17: SP708 RESET Output Voltage vs. Supply Voltage and RESET Response Time Circuit.................... 8 Figure 18: Watchdog Timing Waveforms ............................................................................................................. 9 Figure 19: Timing Diagrams with WDI tri-stated ................................................................................................. 10 Figure 20: Typical Operating Circuit ................................................................................................................... 10 Figure 21: Monitoring +3.3V / +3.0V and +12V Power Supplies ........................................................................ 11 Figure 22: Monitoring a Negative Voltage Supply .............................................................................................. 11 Figure 23: Interfacing to Microprocessors with Bidirectional RESET I/O (SP706) ............................................. 11 Figure 24: Maximum Transient Duration without Causing a Reset Pulse vs. Reset Comparator Overdrive...... 12 Figure 25: Supply Current vs. Temperature ....................................................................................................... 12 Figure 26: Supply Current vs. Supply Voltage.................................................................................................... 12 Figure 27: Mechanical Dimensions, NSOIC8 ..................................................................................................... 13 Figure 28: Mechanical Dimensions, MSOP8 ...................................................................................................... 14 Figure 29: Recommended Land Pattern and Stencil, MSOP8 ........................................................................... 15 9/10/19 Rev 3.0.2 iv SP706R / SP706S / SP706T, SP708S / SP708T Data Sheet List of Tables List of Tables Table 1: Selection Table for SP706R / SP706S / SP706T and SP708S / SP708T ............................................... i Table 1: Absolute Maximum Ratings .................................................................................................................... 1 Table 2: ESD Ratings ........................................................................................................................................... 1 Table 3: Electrical Characteristics ........................................................................................................................ 2 Table 4: Pin Description........................................................................................................................................ 5 Table 5: Ordering Information............................................................................................................................. 16 9/10/19 Rev 3.0.2 v SP706R / SP706S / SP706T, SP708S / SP708T Data Sheet Specifications Specifications Absolute Maximum Ratings Important: These are stress rating only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum ratings conditions for extended periods of time may affect reliability. Table 1: Absolute Maximum Ratings Parameter Minimum Maximum Units VCC -0.3 6.0 V All Other Inputs(1) -0.3 VCC + 0.3V V VCC 20 mA GND 20 mA 20 mA SO (derate 5.88mW/°C above 70°C) 471 mW Mini SO (derate 4.10mW/°C above 70°C) 330 mW 160 °C 300 °C Input Current Output Current All Outputs Continuous Power Dissipation Storage temperature -65 Lead temperature (soldering, 10 sec) 1. The input voltage limits on PFI, WDI and MR can be exceeded if the input current is less than 10mA. ESD Ratings Table 2: ESD Ratings Parameter Value Units HBM (Human Body Model) 2 kV 9/10/19 Rev 3.0.2 1 SP706R / SP706S / SP706T, SP708S / SP708T Data Sheet Electrical Characteristics Electrical Characteristics Unless otherwise noted, VCC = 2.7V to 5.5V (SP706R), VCC = 3.15V to 5.5V (SP70xS), VCC = 3.0V to 5.5V (SP70xT), TA = TMIN to TMAX, typical at 25°C. Table 3: Electrical Characteristics Parameter Test Condition Operating voltage range Supply current ISUPPLY Reset threshold Minimum Typical Maximum Units 1.0 5.5 MR = VCC or floating, WDI floating, VCC = 3.3V 25 40 MR = VCC or floating, VCC = 5.5V 40 80 SP706R 2.55 2.63 2.70 SP706S, SP708S 2.85 2.93 3.00 SP706T, SP708T 3.00 3.08 3.15 (2) 20 Reset threshold hysteresis Reset pulse width tRS 140 (2) RESET Output Voltage RESET Output Voltage VOH VRST(MAX) < VCC < 3.6V, ISOURCE = 500µA VOL VRST(MAX) < VCC < 3.6V, ISINK = 1.2mA VOH 4.5V < VCC < 5.5V, ISOURCE = 800µA VOL 4.5V < VCC < 5.5V, ISINK = 3.2mA VOH VRST(MAX) < VCC < 3.6V, ISOURCE = 215µA VOL VRST(MAX) < VCC < 3.6V, ISINK = 1.2mA VOH 4.5V < VCC < 5.5V, ISOURCE = 800µA VOL 4.5V < VCC < 5.5V, ISINK = 3.2mA 0.3 VCC - 1.5 VIL VRST(MAX) < VCC < 3.6V VIH VRST(MAX) < VCC < 3.6V VIL VCC = 5V VIH VCC = 5V 3.5 WDI = 0V or WDI = VCC -1 VIL VRST(MAX) < VCC < 3.6V, ISOURCE = 500µA 0.8 x VCC VIH VRST(MAX) < VCC < 3.6V, ISINK = 1.2mA VIL 4.5V < VCC < 5.5V, ISOURCE = 800µA VIH 4.5V < VCC < 5.5V, ISINK = 3.2mA 1.60 2.25 s ns 0.6 0.7 x VCC 0.8 0.02 1 0.3 VCC - 1.5 V µA V 0.4 MR = 0V, VRST(MAX) < VCC < 3.6V 25 70 250 MR = 0V, 4.5V < VCC < 5.5V 100 250 600 VRST(MAX) < VCC < 3.6V 500 4.5V < VCC < 5.5V 150 Rev 3.0.2 V 0.4 50 9/10/19 V VCC - 0.6 VIL = 0.4V, VIH = 0.8 x VCC MR pulse width tMR ms 0.4 WDI pulse width tWP(1) MR Pull-up current 280 VCC - 1.5 1.00 WDO Output Voltage V mV 0.3 VCC < 3.6V WDI input current µA 0.8 x VCC Watchdog timeout period tWD WDI Input Threshold 200 V µA ns 2 SP706R / SP706S / SP706T, SP708S / SP708T Data Sheet Block Diagrams Table 3: Electrical Characteristics Parameter Test Condition MR input threshold Minimum Typical VIL VRST(MAX) < VCC < 3.6V VIH VRST(MAX) < VCC < 3.6V VIL 4.5V < VCC < 5.5V VIH 4.5V < VCC < 5.5V MR to reset out delay tMD Maximum Units 0.6 0.7 x VCC 0.8 V 2.0 VRST(MAX) < VCC < 3.6V 750 4.5V < VCC < 5.5V 250 ns VCC = 3.0V - SP706R, PFI falling 1.20 1.25 1.30 V VPFI = 1.36V -200.00 0.01 200.00 nA VIL VRST(MAX) < VCC < 3.6V, ISOURCE = 500uA 0.8 x VCC VIH VRST(MAX) < VCC < 3.6V, ISINK = 1.2mA VIL 4.5V < VCC < 5.5V, ISOURCE = 800µA VIH 4.5V < VCC < 5.5V, ISINK = 3.2mA PFI Input Threshold VCC = 3.3V - SP70xS/T, PFI falling PFI input current PFO Output Voltage 0.3 VCC - 1.5 V 0.4 1. WDI minimum rise / fall time is 1us. 2. Applies to both RESET in the SP706R, SP706S and SP706T and RESET in the SP708S and SP708T. Block Diagrams Watchdog Transition Detector WDI Watchdog Timer WDO VCC RESET VCC Timebase for Reset and Watchdog 70μA 250μA MR MR Reset Generator + – VCC Reset Generator RESET – + 2.63V for the SP706R 2.93V for the SP706S 3.08V for the SP706T – + – PFI + – VCC + PFO 2.93V for the SP708S 3.08V for the SP708T + – PFI + PFO + 1.25V 1.25V – – SP706R/S/T SP708S/T GND GND Figure 1: SP706R / SP706S / SP706T Block Diagram 9/10/19 RESET Rev 3.0.2 Figure 2: SP708S / SP708T Block Diagram 3 SP706R / SP706S / SP706T, SP708S / SP708T Data Sheet Pin Information Pin Information Pin Configurations Figure 3: SP706R, SP706S, SP706T, SP708S and SP708T Pin Assignments 9/10/19 Rev 3.0.2 4 SP706R / SP706S / SP706T, SP708S / SP708T Data Sheet Pin Configurations Table 4: Pin Description Pin Number Name SP706R, SP706S, SP706T SP708S, SP708T SOIC SOIC MSOP Description MSOP MR 1 3 1 3 Manual Reset This input triggers a reset pulse when pulled below 0.8V. This active LOW input has an internal 70µA pull-up current. It can be driven from a TTL or CMOS logic line or shorted to ground with a switch. VCC 2 4 2 4 Voltage input GND 3 5 3 5 Ground reference for all signals PFI 4 6 4 6 Power-Fail Input When this voltage monitor input is less than 1.25V, PFO goes LOW. Connect PFI to ground or VCC when not in use. PFO 5 7 5 7 Power-Fail Output This output is HIGH until PFI is less than 1.25V. WDI 6 8 - - Watchdog Input If this input remains HIGH or LOW for 1.6s, the internal watchdog timer times out and WDO goes LOW. Floating WDI or connecting WDI to a high-impedance tri-state buffer disables the watchdog feature. The internal watchdog timer clears whenever RESET is asserted, WDI is tri-stated, or whenever WDI sees a rising or falling edge. N.C. - - 6 8 No Connect 1 Active-LOW RESET Output This output pulses LOW for 200ms when triggered and stays LOW whenever VCC is below the reset threshold. It remains LOW for 200ms after VCC rises above the reset threshold or MR goes from LOW to HIGH. A watchdog timeout will not trigger RESET unless WDO is connected to MR. - Watchdog Output This output pulls LOW when the internal watchdog timer finishes its 1.6s count and does not go HIGH again until the watchdog is cleared. WDO also goes LOW during low-line conditions. Whenever VCC is below the reset threshold, WDO stays LOW. However, unlike RESET, WDO does not have a minimum pulse width. As soon as VCC is above the reset threshold, WDO goes HIGH with no delay. 2 Active-HIGH RESET Output This output is the complement of RESET. Whenever RESET is HIGH, RESET is LOW and vice-versa. Note that the SP708S / SP708T has a reset output only. RESET WDO RESET 9/10/19 7 8 - 1 2 - 7 - 8 Rev 3.0.2 5 SP706R / SP706S / SP706T, SP708S / SP708T Data Sheet Typical Performance Characteristics Typical Performance Characteristics All data taken at VCC = 2.7V to 5.5V (SP706R), VCC = 3.15V to 5.5V (SP70xS), VCC = 3.0V to 5.5V (SP70xT), TA = 25°C, unless otherwise indicated. 9/10/19 Figure 4: Power-Fail Comparator De-Assertion Response Time Figure 5: Power-Fail Comparator De-Assertion Response Time Circuit Figure 6: Power-Fail Comparator Assertion Response Time Figure 7: Power-Fail Comparator Assertion Response Time Circuit Figure 8: SP706 RESET Output Voltage vs. Supply Voltage Figure 9: SP706 RESET Output Voltage vs. Supply Voltage Circuit Rev 3.0.2 6 SP706R / SP706S / SP706T, SP708S / SP708T Data Sheet Typical Performance Characteristics Figure 10: SP706 RESET Response Time Figure 11: SP706 RESET Response Time Circuit Figure 12: SP708 RESET and RESET Assertion Figure 13: SP708 RESET and RESET De-Assertion Figure 14: SP708 RESET and RESET Assertion and De-Assertion Circuit 9/10/19 Rev 3.0.2 7 SP706R / SP706S / SP706T, SP708S / SP708T Data Sheet Figure 15: SP708 RESET Output Voltage vs. Supply Voltage Typical Performance Characteristics Figure 16: SP708 RESET Response Time Figure 17: SP708 RESET Output Voltage vs. Supply Voltage and RESET Response Time Circuit 9/10/19 Rev 3.0.2 8 SP706R / SP706S / SP706T, SP708S / SP708T Data Sheet Features Features be 0.4V or less until VCC drops below 1V. The active-HIGH RESET output is simply the complement of the RESET output and is guaranteed to be valid with VCC down to 1.1V. Some µPs, such as Intel's 80C51, require an active-HIGH reset pulse. The SP706R/S/T and SP708S/T series provides four key functions: 1. A reset output during power-up, power-down and brownout conditions. 2. An independent watchdog output that goes LOW if the watchdog input has not been toggled within 1.6 seconds. Watchdog Timer 3. A 1.25V threshold detector for power-fail warning, low battery detection, or monitoring a power supply other than +3.3V / +3.0V. The SP706R/S/T - SP708S/T watchdog circuit monitors the µP's activity. If the µP does not toggle the watchdog input (WDI) within 1.6 seconds and WDI is not tri-stated, WDO goes LOW. As long as RESET is asserted or the WDI input is tri-stated, the watchdog timer will stay cleared and will not count. As soon as RESET is released and WDI is driven HIGH or LOW, the timer will start counting. Pulses as short as 50ns can be detected. 4. An active-LOW manual-reset that allows RESET to be triggered by a pushbutton switch. The SP706S/T devices are the same as the SP708S/T devices except for the active-HIGH RESET substitution of the watchdog timer. Theory of Operation The SP706R/S/T - SP708S/T series is a microprocessor (µP) supervisory circuit that monitors the power supplied to digital circuits such as microprocessors, microcontrollers or memory. The series is an ideal solution for portable, battery-powered equipment that requires power supply monitoring. Implementing this series will reduce the number of components and overall complexity. The watchdog functions of this product family will continuously oversee the operational status of a system. The operational features and benefits of the SP706R/S/T - SP708S/T series are described in more detail below. Typically, WDO will be connected to the non-maskable interrupt input (NMI) of a µP. When VCC drops below the reset threshold, WDO will go LOW whether or not the watchdog timer had timed out. Normally this would trigger an NMI but RESET goes LOW simultaneously and thus overrides the NMI. If WDI is left unconnected, WDO can be used as a low-line output. Since floating WDI disables the internal timer, WDO goes LOW only when VCC falls below the reset threshold, thus functioning as a low-line output. RESET Output A microprocessor's reset input starts the µP in a known state. The SP706R/S/T - SP708S/T series asserts reset during power-up and prevents code execution errors during power down or brownout conditions. On power-up, once VCC reaches 1V, RESET is a guaranteed logic LOW of 0.4V or less. As VCC rises, RESET stays LOW. When VCC rises above the reset threshold, an internal timer releases RESET after 200ms. RESET pulses LOW whenever VCC dips below the reset threshold, such as in a brownout condition. When a brownout condition occurs in the middle of a previously initiated reset pulse, the pulse continues for at least another 140ms. On power down, once VCC falls below the reset threshold, RESET stays LOW and is guaranteed to 9/10/19 Rev 3.0.2 Figure 18: Watchdog Timing Waveforms 9 SP706R / SP706S / SP706T, SP708S / SP708T Data Sheet Power-Fail Comparator Manual Reset The manual-reset input (MR) allows RESET to be triggered by a pushbutton switch. The switch is effectively debounced by the 140ms minimum RESET pulse width. MR is TTL/CMOS logic compatible, so it can be driven by an external logic line. MR can be used to force a watchdog timeout to generate a RESET pulse in the SP706R/S/TSP708S/T. Simply connect WDO to MR. Ensuring a Valid Reset Output Down to VCC = 0V Figure 19: Timing Diagrams with WDI tri-stated Power-Fail Comparator The power-fail comparator can be used for various purposes because its output and non inverting input are not internally connected. The inverting input is internally connected to a 1.25V reference. To build an early-warning circuit for power failure, connect the PFI pin to a voltage divider as shown in Figure 20. Choose the voltage divider ratio so that the voltage at PFI falls below 1.25V just before the +5V regulator drops out. Use PFO to interrupt the µP so it can prepare for an orderly power-down. When VCC falls below 1V, the RESET output no longer sinks current, it becomes an open circuit. High-impedance CMOS logic inputs can drift to undetermined voltages if left undriven. If a pull-down resistor is added to the RESET pin, any stray charge or leakage currents will be shunted to ground, holding RESET LOW. The resistor value is not critical. It should be about 100kΩ, large enough not to load RESET and small enough to pull RESET to ground. Monitoring Voltages Other Than the Unregulated DC Input Monitor voltages other than the unregulated DC by connecting a voltage divider to PFI and adjusting the ratio appropriately. If required, add hysteresis by connecting a resistor (with a value approximately 10 times the sum of the two resistors in the potential divider network) between PFI and PFO. A capacitor between PFI and GND will reduce the power-fail circuit's sensitivity to high-frequency noise on the line being monitored. RESET can be used to monitor voltages other than the +3.3V / +3.0V VCC line. Connect PFO to MR to initiate a RESET pulse when PFI drops below 1.25V. Figure 21 shows the SP706R/S/T - SP708S/T series configured to assert RESET when the +3.3V / 3.0V supply falls below the RESET threshold, or when the +12V supply falls below approximately 11V. Monitoring a Negative Voltage Supply Figure 20: Typical Operating Circuit 9/10/19 The power-fail comparator can also monitor a negative supply rail, shown in Figure 22. When the negative rail is good (a negative voltage of large magnitude), PFO is LOW. By adding the resistors and transistor as shown, a HIGH PFO triggers RESET. As long as PFO remains HIGH, the Rev 3.0.2 10 SP706R / SP706S / SP706T, SP708S / SP708T Data Sheet SP706R/S/T - SP708S/T series will keep RESET asserted (where RESET = LOW and RESET = HIGH). Note that this circuit's accuracy depends on the PFI threshold tolerance, the VCC line, and the resistors. Negative-Going VCC Transient Interfacing to µPs with Bidirectional Reset Pins µPs with bidirectional RESET pins, such as the Motorola 68HC11 series, can contend with the SP706/708 RESET output. If, for example, the RESET output is driven HIGH and the µP wants to pull it LOW, indeterminate logic levels may result. To correct this, connect a 4.7kΩ resistor between the RESET output and the µP reset I/O, as shown if Figure 23. Buffer the RESET output to other system components. Figure 21: Monitoring +3.3V / +3.0V and +12V Power Supplies Figure 23: Interfacing to Microprocessors with Bidirectional RESET I/O (SP706) Negative-Going VCC Transient While issuing resets to the μP during power-up, powerdown and brownout conditions, these supervisors are relatively immune to short duration negative-going VCC transients (glitches). It is usually undesirable to reset the μP when VCC experiences only small glitches. Figure 22: Monitoring a Negative Voltage Supply 9/10/19 Figure 24 shows maximum transient duration vs. resetcomparator overdrive, for which reset pulses are not generated. The data was generated using negative-going VCC pulses, starting at 3.3V and ending below the reset threshold by the magnitude indicated (reset comparator overdrive). The graph shows the maximum pulse width a negative-going VCC transient may typically have without causing a reset pulse to be issued. As the amplitude of the transient increases (i.e. goes farther below the reset threshold), the maximum allowable pulse width decreases. Typically, a VCC transient that goes 100mV below the reset threshold and lasts for 40μs or less will not cause a reset pulse to be issued. A 100nF bypass capacitor mounted close to the VCC pin provides additional transient immunity. Rev 3.0.2 11 SP706R / SP706S / SP706T, SP708S / SP708T Data Sheet Figure 24: Maximum Transient Duration without Causing a Reset Pulse vs. Reset Comparator Overdrive Negative-Going VCC Transient Figure 25: Supply Current vs. Temperature Applications The SP706R/S/T - SP708S/T series offers unmatched performance and the lowest power consumption for these industry standard devices. Refer to Figure 25 and Figure 26 for supply current performance characteristics rated against temperature and supply voltages. Figure 26: Supply Current vs. Supply Voltage 9/10/19 Rev 3.0.2 12 SP706R / SP706S / SP706T, SP708S / SP708T Data Sheet Mechanical Dimensions Mechanical Dimensions NSOIC8 Top View Front View Side View Drawing No: Revision: POD-00000108 A Figure 27: Mechanical Dimensions, NSOIC8 9/10/19 Rev 3.0.2 13 SP706R / SP706S / SP706T, SP708S / SP708T Data Sheet Mechanical Dimensions Mechanical Dimensions MSOP8 BOTTOM VIEW TOP VIEW SIDE VIEW TERMINAL DETAILS Drawing No.: POD-00000127 Revision: B Figure 28: Mechanical Dimensions, MSOP8 9/10/19 Rev 3.0.2 14 SP706R / SP706S / SP706T, SP708S / SP708T Data Sheet Recommended Land Pattern and Stencil Recommended Land Pattern and Stencil MSOP8 TYPICAL RECOMMENDED LAND PATTERN TYPICAL RECOMMENDED STENCIL Drawing No.: POD-00000127 Revision: B Figure 29: Recommended Land Pattern and Stencil, MSOP8 9/10/19 Rev 3.0.2 15 SP706R / SP706S / SP706T, SP708S / SP708T Data Sheet Ordering Information Ordering Information Table 5: Ordering Information(1) Ordering Part Number Operating Temperature Range Lead-Free Package Packaging Method SP706R/S/T SP706RCN-L/TR 0°C ≤ TA ≤ 70°C SP706REN-L/TR -40°C ≤ TA ≤ 85°C SP706SCU-L/TR 0°C ≤ TA ≤ 70°C SP706SEN-L/TR -40°C ≤ TA ≤ 85°C SP706TCN-L/TR 0°C ≤ TA ≤ 70°C SP706TEN-L/TR SP706TEU-L/TR NSOIC8 MSOP8 (2) Tape and Reel Yes NSOIC8 -40°C ≤ TA ≤ 85°C MSOP8 SP708S/T SP708SEN-L/TR SP708TEN-L/TR Yes(2) -40°C ≤ TA ≤ 85°C NSOIC8 Tape and Reel 1. Refer to www.maxlinearar.com/SP706R, www.maxlinearar.com/SP706S, www.maxlinearar.com/SP706T, www.maxlinearar.com/SP708S, and www.maxlinearar.com/SP708T for most up-to-date Ordering Information. 2. Visit www.maxlinear.com for additional information on Environmental Rating. 9/10/19 Rev 3.0.2 16 SP706R / SP706S / SP706T, SP708S / SP708T Data Sheet Disclaimer MaxLinear, Inc. 5966 La Place Court, Suite 100 Carlsbad, CA 92008 760.692.0711 p. 760.444.8598 f. www.maxlinear.com The content of this document is furnished for informational use only, is subject to change without notice, and should not be construed as a commitment by MaxLinear, Inc. MaxLinear, Inc. assumes no responsibility or liability for any errors or inaccuracies that may appear in the informational content contained in this guide. Complying with all applicable copyright laws is the responsibility of the user. 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