XR28V382 / XR28V384
Evaluation Board
User Manual
MaxLinear Confidential
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XR28V382 / XR28V384 Evaluation Board User Manual
Revision History
Revision History
Document No.
Release Date
Change Description
1.0.0
1/27/14
Legacy Exar Manual
023UMR00
8/19/20
Corrected jumper number in Tables 11 and 12, corrected Tables 10 and 15.
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XR28V382 / XR28V384 Evaluation Board User Manual
Table of Contents
Table of Contents
1.0 Introduction................................................................................................................................................... 1
2.0 Evaluation Board Overview ......................................................................................................................... 1
3.0 Hardware Configurations............................................................................................................................. 3
3.1 Power Requirements ...............................................................................................................................................3
3.2 LPC Bus Interface ...................................................................................................................................................3
3.3 XR28V384 Configuration Jumper Settings..............................................................................................................4
3.3.1 Reset ...........................................................................................................................................................4
3.3.2 Configuration Port Selection........................................................................................................................4
3.3.3 Configuration Entry Key Selection...............................................................................................................4
3.3.4 Base Address Selection ..............................................................................................................................4
3.4 XR28V382 Configuration Jumper Settings..............................................................................................................5
3.4.1 Reset ...........................................................................................................................................................5
3.4.2 Configuration Port Selection........................................................................................................................5
3.4.3 Configuration Entry Key Selection...............................................................................................................5
3.4.4 Base Address Selection ..............................................................................................................................5
4.0 Software......................................................................................................................................................... 6
4.1 BIOS Support ..........................................................................................................................................................6
4.2 Software Drivers ......................................................................................................................................................6
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List of Figures
List of Figures
Figure 1: Evaluation Board Block Diagram.............................................................................................................................1
Figure 2: Top View of Evaluation Board .................................................................................................................................2
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List of Tables
List of Tables
Table 1: Evaluation Board Ordering Part Numbers .............................................................................................. 1
Table 2: Power Requirements .............................................................................................................................. 3
Table 3: LPC Bus Interface Signals...................................................................................................................... 3
Table 4: Configuration Port Selection ................................................................................................................... 4
Table 5: Configuration Entry Key Selection .......................................................................................................... 4
Table 6: UART Channel A Base Address Selection ............................................................................................. 4
Table 7: UART Channel B Base Address Selection ............................................................................................. 4
Table 8: UART Channel C Base Address............................................................................................................. 4
Table 9: UART Channel D Base Address............................................................................................................. 4
Table 10: Watchdog Timer Base Address ............................................................................................................ 4
Table 11: Configuration Port Selection ................................................................................................................. 5
Table 12: Configuration Entry Key Selection ........................................................................................................ 5
Table 13: UART Channel A Base Address Selection ........................................................................................... 5
Table 14: UART Channel B Base Address Selection ........................................................................................... 5
Table 15: Watchdog Timer Base Address ............................................................................................................ 5
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Introduction
1.0 Introduction
This user’s manual is for the XR28V382 and XR28V384 evaluation board. The XR28V384 is a 4-channel UART witha Low
Pin Count (LPC) bus interface in a 48-pin TQFP package. The XR28V382 is the 2-channel version available in a smaller
32-pin QFN package.
Table 1: Evaluation Board Ordering Part Numbers
Device Ordering
Part Number
Evaluation Board Ordering
Part Number
Device Package
Device Location
XR28V382IL32-F
XR28V382IL32TR-F
XR28V382IL32-0A-EB
32-pin QFN
U2
XR28V384IM48-F
XR28V384IM48TR-F
XR28V384IM48-0A-EB
48-pin TQFP
U3
2.0 Evaluation Board Overview
A block diagram of the evaluation board is shown in Figure 1 below.
TP2
3.3V
J1
Signal
Header
SP339
DB9
Connector
SP339
DB9
Connector
SP339
DB9
Connector
SP339
DB9
Connector
XR28V384
XR28V382
TP7
GND
Figure 1: Evaluation Board Block Diagram
In addition to the XR28V384 or XR28V382, there is a
MaxLinear SP339 Multiprotocol transceiver on this
evaluation board. The SP339 can be configured for
Loopback, RS-232, Half-Duplex RS-485 or Full-Duplex RS485 / RS-422 Modes. The default setting when shipped
from the factory is RS-232 mode.
Figure 2 on the next page shows the top view of the
evaluation board with all of the components, connectors
and headers labeled.
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Evaluation Board Overview
Figure 2: Top View of Evaluation Board
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Hardware Configurations
3.0 Hardware Configurations
This sections describes the default settings when shipped from the factory and what jumper setting changes are required
when changing modes.
3.1 Power Requirements
External power is required for this board to function properly.
Table 2: Power Requirements
Test Point
Description
TP2
Apply an external +3.3V supply to this test point (or any other +3.3V test point).
TP7
Connect GND of external power supply to this test point (or any other GND test point).
3.2 LPC Bus Interface
All of the LPC interface signals are located on connector J1. These signals will need to be connected to an external LPC
host controller. Table 3 below provides a brief description of each signal.
Table 3: LPC Bus Interface Signals
Pin Number
Signal Name
Input / Output
Description
J1.1
LPC_LAD0
I/O
LPC Bus address / data bit-0
J1.3
LPC_LAD1
I/O
LPC Bus address / data bit-1
J1.5
LPC_LAD2
I/O
LPC Bus address / data bit-2
J1.7
LPC_LAD3
I/O
LPC Bus address / data bit-3
J1.11
PCI_RST#
Input
LPC Bus reset
J1.15
LPC_FRAME#
Input
LPC frame signal
J1.19
CLK_33MC
Input
33MHz PCI / LPC clock
J1.12
SERIRQ
Open-Drain Output
Serial IRQ
Refer to the datasheet for complete details and descriptions of each signal.
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XR28V384 Configuration Jumper Settings
3.3 XR28V384 Configuration Jumper Settings
3.3.1 Reset
3.3.4.2 UART Channel B Base Address Selection
For normal operation, a jumper should be installed
between J18.1 and J18.2. If a jumper is installed between
J18.2 and J18.3, the XR28V384 will be in reset mode.
Table 7: UART Channel B Base Address Selection
Jumper1 (J17)
3.3.2 Configuration Port Selection
Table 4: Configuration Port Selection
Jumper (J16)
Index Port Address
Data Port Address
Yes
0x4E
0x4F
No
0x2E
0x2F
Jumper2 (J19)
Base Address
No
No
0x2F8
No
Yes
0x2F8
Yes
No
0x2E0
Yes
Yes
0x000 (disabled)
3.3.4.3 UART Channel C Base Address
There are no selections for channel C. The channel C base
address defaults to 0x3E8, if enabled. Channel C is
enabled if there is no jumper installed on J21.
3.3.3 Configuration Entry Key Selection
Table 8: UART Channel C Base Address
Table 5: Configuration Entry Key Selection
Jumper1 (J21)
Base Address
No
0x3E8
Yes
0x000 (disabled)
Jumper1 (J20)
Jumper2 (J23)
Entry Key
Yes
Yes
0x77
Yes
No
0xA0
No
Yes
0x87
3.3.4.4 UART Channel D Base Address
No
No
0x67
There are no selections for channel D. The channel D base
address defaults to 0x2E8, if enabled. Channel C is
enabled if there is no jumper installed on J24.
3.3.4 Base Address Selection
The XR28V384 has weak internal pull-up resistors for the
configuration pins. On the evaluation board, there are pulldown resistors for selecting the base address and to
enable / disable the different functions. "Yes" in the tables
in the following sections indicate that the jumpers are
installed.
3.3.4.1 UART Channel A Base Address Selection
Table 9: UART Channel D Base Address
Jumper1 (J24)
Base Address
No
0x2E8
Yes
0x000 (disabled)
3.3.4.5 Watchdog Timer Base Address
The watchdog timer base address defaults to 0x442. The
watchdog timer is enabled if there is no jumper installed on
J22.
Table 6: UART Channel A Base Address Selection
Jumper1 (J14)
Jumper2 (J15)
Base Address
No
No
0x3F8
No
Yes
0x3F8
Jumper1 (J22)
Base Address
Yes
No
0x3E0
No
0x442
Yes
Yes
0x000 (disabled)
Yes
0x000 (disabled)
Table 10: Watchdog Timer Base Address
Note: All base address registers can be overwritten
after power-up. See the datasheet for details.
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XR28V382 Configuration Jumper Settings
3.4 XR28V382 Configuration Jumper Settings
3.4.1 Reset
3.4.4.1 UART Channel A Base Address Selection
For normal operation, a jumper should be installed
between J18.1 and J18.2. If a jumper is installed between
J18.2 and J18.3, the XR28V382 will be in reset mode.
Table 13: UART Channel A Base Address Selection
Jumper1 (J6)
3.4.2 Configuration Port Selection
Table 11: Configuration Port Selection
Jumper (J9)
Index Port Address
Data Port Address
Yes
0x4E
0x4F
No
0x2E
0x2F
Jumper2 (J8)
Base Address
No
No
0x3F8
No
Yes
0x3F8
Yes
No
0x3E0
Yes
Yes
0x000 (disabled)
3.4.4.2 UART Channel B Base Address Selection
Table 14: UART Channel B Base Address Selection
Jumper1 (J7)
Jumper2 (J10)
Base Address
3.4.3 Configuration Entry Key Selection
No
No
0x2F8
No
Yes
0x2F8
Table 12: Configuration Entry Key Selection
Yes
No
0x2E0
Yes
Yes
0x000 (disabled)
Jumper1 (J11)
Jumper2 (J5)
Entry Key
Yes
Yes
0x77
Yes
No
0xA0
3.4.4.3 Watchdog Timer Base Address
No
Yes
0x87
No
No
0x67
The watchdog timer base address defaults to 0x442. The
watchdog timer is enabled if there is no jumper installed on
J22.
3.4.4 Base Address Selection
Table 15: Watchdog Timer Base Address
The XR28V382 has weak internal pull-up resistors for the
configuration pins. On the evaluation board, there are pulldown resistors for selecting the base address and to
enable / disable the different functions. "Yes" in the tables
in the following sections indicate that the jumpers are
installed.
Jumper1 (J12)
Base Address
Pins 1 & 2
0x442
Pins 2 & 3
0x000 (disabled)
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Software
4.0 Software
4.1 BIOS Support
4.2 Software Drivers
The BIOS needs to have support for detecting and / or
configuring devices on the LPC bus. If the BIOS does not
support this function and this function is not added to the
BIOS, then the operating system may not be able to access
some or all of these ports.
The XR28V384 and XR28V382 are software compatible
with the industry standard 16550 UARTs. Hence, they will
work with any OS that has a standard serial port drivers
such as Windows and Linux.
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