XR76115
15A Synchronous Step Down COT Regulator
General Description
FEATURES
The XR76115 is a synchronous step-down regulator combining
the controller, drivers, bootstrap diode and MOSFETs in a single
package for point-of-load supplies. The XR76115 has a load
current rating of 15A. A wide 5V to 22V input voltage range allows
for single supply operation from industry standard 5V, 12V and
19.6V rails.
• 15A capable step down regulator
− 4.5V to 5.5V low VIN operation
− 5V to 22V wide single input voltage
− ≥0.6V adjustable output voltage
• Controller, drivers, bootstrap diode and
MOSFETs integrated in one package
With a proprietary emulated current mode Constant On-Time
(COT) control scheme, the XR76115 provides extremely fast line
and load transient response using ceramic output capacitors. It
requires no loop compensation, simplifying circuit implementation
and reducing overall component count. The control loop also
provides 0.25% load and 0.12% line regulation and maintains
constant operating frequency. A selectable power saving mode
allows the user to operate in discontinuous mode (DCM) at light
current loads, thereby significantly increasing the converter
efficiency.
• Proprietary Constant On-Time control
− No loop compensation required
− Ceramic output capacitor stable
operation
− Programmable 200ns - 2µs on-time
− Quasi constant 200kHz - 800kHz
frequency
− Selectable CCM or CCM / DCM
operation
• Precision enable and Power-Good flag
A host of protection features, including over-current, overtemperature, short-circuit and UVLO, help achieve safe operation
under abnormal operating conditions.
• Programmable soft-start
• 6x6mm 37-pin QFN package
The XR76115 is available in a RoHS-compliant, green / halogenfree, space-saving QFN 6x6mm package.
APPLICATIONS
• Distributed power architecture
• Point-of-Load converters
• Power supply modules
• FPGA, DSP, and processor supplies
• Base stations, switches / routers, and
server
Typical Application
1.220
1.215
VOUT (V)
1.210
1.205
1.200
1.195
1.190
1.185
1.180
5
10
15
20
VIN (V)
Figure 1: XR76115 Application Diagram
Figure 2: XR76115 Line Regulation
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Rev 1D
XR76115
Absolute Maximum Ratings
Operating Ratings
These are stress ratings only and functional operation of the device
at these ratings or any other above those indicated in the operation
sections of the specifications below is not implied. Stresses beyond
those listed under Absolute Maximum Ratings may cause
permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
PVIN ................................................................................. 3V to 22V
VIN ................................................................................ 4.5V to 22V
VCC .............................................................................. 4.5V to 5.5V
SW, ILIM ....................................................................... -1V to 22V(2)
PGOOD, VCC, TON, SS, EN.......................................... -0.3V to 5.5V
Switching Frequency ......................................... 200kHz - 800kHz(3)
Junction Temperature Range (TJ) ............................-40°C to 125°C
XR76115 Package Power Dissipation max at 25°C ................ 5.2W
XR76115 JEDEC51 Package Thermal Resistance θJA ........ 19°C/W
PVIN, VIN ...................................................................... -0.3V to 25V
VCC ............................................................................. -0.3V to 6.0V
BST .......................................................................... -0.3V to 31V(1)
BST-SW ........................................................................ -0.3V to 6V
SW, ILIM ..................................................................... -1V to 25V(1,2)
All other pins....................................................... -0.3V to VCC+0.3V
Storage temperature................................................ -65°C to 150°C
Junction temperature .............................................................150°C
Power dissipation ................................................. Internally Limited
Lead temperature (soldering, 10 sec) .................................... 300°C
ESD rating (HBM - Human Body Model) ................................... 2kV
Note 1: No external voltage applied
Note 2: SW pin’s DC range is -1V, transient is -5V for less than 50ns
Note 3: Recommended
Ordering Information(1)
Part Number
Operating Temperature Range
XR76115EL-F
XR76115ELTR-F
XR76115EVB
Package
6x6mm QFN
6x6mm QFN
XR76115 Evaluation Board
-40°C≤TJ≤+125°C
-40°C≤TJ≤+125°C
Packing Method
Lead-Free(2)
Bulk
Tape & Reel
Yes
Yes
NOTES:
1.
Refer to www.maxlinear.com/XR76115 for most up-to-date Ordering Information.
2.
Visit www.maxlinear.com for additional information on Environmental Rating.
Electrical Characteristics
Specifications are for the operating junction temperature of TJ = 25°C only; limits applying over the full operating junction temperature range are
denoted by a “•”. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless
otherwise indicated, VIN=12V.
Parameter
Min.
Typ.
Max.
Units
Conditions
5
4.5
12
5.0
0.7
0.7
11
0.5
22
5.5
1.3
1.3
1.9
50
2.0
V
mV
•
3.0
3.1
V
•
100
4.25
200
4.50
mV
V
mV
•
Power Supply Characteristics
VIN, input voltage range
IVIN, VIN supply current
IVCC, VCC quiescent current
IVIN, VIN supply current
IOFF, shutdown current
Enable and Under-Voltage Lock-Out UVLO
VIH_EN, EN pin rising threshold
1.8
VEN_HYS, EN pin hysteresis
VIH_EN, EN pin rising threshold for
2.8
DCM / CCM operation
VEN_HYS, EN pin hysteresis
VCC UVLO start threshold, rising edge
4.00
VCC UVLO hysteresis
2/15
V
mA
mA
mA
μA
VCC regulating
VCC tied to VIN
• Not switching, VIN = 12V, VFB = 0.7V
• Not switching, VCC = VIN = 5V, VFB = 0.7V
f = 300kHz, RON = 107k, VFB = 0.58V
Enable = 0V, VIN = 12V, VIN = PVIN
•
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Rev. 1D
XR76115
Parameter
Min.
Typ.
Max.
Units
Conditions
0.597
0.600
0.603
V
VIN = 5V - 22V VCC regulating
0.596
0.600
0.604
V
VIN = 4.5V - 5.5V VCC tied to VIN
0.594
0.600
0.606
V
• VIN = 5V - 22V VCC regulating,
VIN = 4.5V - 5.5V VCC tied to VIN
Reference Voltage
VREF, reference voltage
DC load regulation
DC line regulation
Programmable Constant On-Time
On-time 1
f corresponding to on-time 1
Minimum programmable on-time
On-time 2
f corresponding to on-time 2
On-time 3
Minimum off-time
Diode Emulation Mode
Zero crossing threshold
Soft-Start
SS charge current
SS discharge current
VCC Linear Regulator
VCC output voltage
Dropout voltage
Power Good Output
Power Good threshold
Power Good hysteresis
Power Good sink current
Protection: OCP, OTP, Short-Circuit
Hiccup timeout
ILIM pin source current
ILIM current temperature coefficient
ILIM comparator offset
Current limit blanking
Thermal shutdown threshold
Thermal hysteresis
Feedback pin short-circuit threshold
Output Power Stage
High-side MOSFET RDSON
Low-side MOSFET RDSON
Maximum output current
±0.25
±0.12
1.66
243
170
362
365
1.95
280
109
200
417
430
250
%
%
2.24
329
µs
kHz
ns
ns
kHz
ns
ns
230
490
495
350
-2
-10
3
-6
4.8
4.51
100
5.0
4.7
300
5.2
-10
-7.5
2
15
45
-8
50
• RON = 140kΩ, VIN = 22V
VIN = 22V, VOUT = 12V
RON = 6.98kΩ, VIN = 22V
• RON = 6.98kΩ, VIN = 12V
VOUT = 1.0V
• RON = 16.2kΩ, VIN = 12V
•
mV
-14
1
1
CCM operation, closed loop, applies to any COUT
µA
mA
V
490
mV
-5
4
%
%
mA
110
50
0.4
0
100
150
15
+8
60
7
4
DC value measured during test
•
• Fault present
• VIN = 6V to 22V, Iload = 0 to 30mA
• VIN = 5V, Iload = 0 to 20mA
• IVCC = 30mA
ms
µA
%/°C
mV
ns
°C
°C
•
70
%
•
10
4.6
mΩ
mΩ
A
55
15
3/15
Rising temperature
Percent of VREF, short circuit is active
After PGOOD is up
VGS = 4.5V, IDS = 2A
VGS = 4.5V, IDS = 2A
•
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Rev. 1D
XR76115
Block Diagram
Figure 3: XR76115 Block Diagram
4/15
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Rev. 1D
XR76115
Pin Assignment
Figure 4: XR76115 Pin Assignment, Top View
5/15
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Rev. 1D
XR76115
Pin Description
Name
Pin Number
NC
ILIM
1,9
2
EN/MODE
3
TON
4
SS
5
PGOOD
6
FB
7
AGND
VIN
VCC
SW
PGND
PVIN
BST
8, 12,
AGND Pad
10
11
13-18, 25, 36, SW
Pad
19-24,
PGND Pad
26-35,
PVIN Pad
37
Description
Not connected.
Over-current protection programming. Connect with a resistor to SW.
Precision enable pin. Pulling this pin above 1.9V will turn the regulator on and it will operate in CCM. If
the voltage is raised above 3.0V then the regulator will operate in DCM / CCM depending on load.
Constant on-time programming pin. Connect with a resistor to AGND.
Soft-start pin. Connect an external capacitor between SS and AGND to program the soft-start rate based
on the 10µA internal source current.
Power-good output. This open-drain output is pulled low when VOUT is outside the regulation.
Feedback input to feedback comparator. Connect with a set of resistors to VOUT and AGND in order to
program VOUT.
Signal ground for control circuitry. Connect AGND Pad with a short trace to pins 8 and 12.
Supply input for the regulator’s LDO. Normally it is connected to PVIN.
The output of regulator’s LDO. For operation using a 5V rail, VCC should be shorted to VIN.
Switch node. The drain of the low-side N-channel MOSFET. The source of the high-side MOSFET is
wire-bonded to the SW pad.
Ground of the power stage. Should be connected to the system’s power ground plane. The source of the
low-side MOSFET is wire-bonded to PGND Pad.
Input voltage for the power stage. The drain of the high-side N-channel MOSFET.
High-side driver supply pin. Connect a 1µF bootstrap capacitor between BST and SW.
6/15
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Rev. 1D
XR76115
Typical Performance Characteristics
All data taken at VIN = 12V, VOUT = 1.2V, f = 600kHz, TA = 25°C, no air flow, Forced CCM, unless otherwise specified. The schematic and BOM
are from the Applications Circuit section of this datasheet.
1.220
1.220
1.215
1.215
1.210
1.210
1.205
1.205
VOUT (V)
VOUT (V)
REGULATION
1.200
1.195
1.200
1.195
1.190
1.190
1.185
1.185
1.180
0
2
4
6
8
10
12
14
1.180
16
5
10
15
IOUT (A)
20
VIN (V)
Figure 5: Load Regulation, VIN=12V
Figure 6: Line Regulation, IOUT=15A
SW
SW
VOUT
AC coupled
20MHz Filter
VOUT
AC coupled
20MHz Filter
IL
IL
1us/d
4ms/d
Figure 8: VOUT Ripple is 23mV at 0A, DCM
Figure 7: VOUT Ripple is 14mV at 15A
700
610
600
605
VREF (mV)
f (kHz)
500
400
300
200
600
595
100
0
590
0
5
10
15
-40
-20
0
20
40
60
80
100
120
Tj (°C)
IOUT (A)
Figure 10: VREF vs. Temperature
Figure 9: Frequency vs. IOUT, Forced CCM
7/15
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Rev. 1D
XR76115
Typical Performance Characteristics
All data taken at VIN = 12V, VOUT = 1.2V, f = 600kHz, TA = 25°C, no air flow, Forced CCM, unless otherwise specified. The schematic and BOM
are from the Applications Circuit section of this datasheet.
70
500
490
480
60
460
ILIM (uA)
TON (ns)
470
450
440
430
50
40
420
410
400
-40
-20
0
20
40
60
80
30
100 120
-40
-20
0
Tj (°C)
20
40
60
80
100 120
Tj (°C)
Figure 11: On-Time vs. Temperature
Figure 12: ILIM vs. Temperature
SW
SW
VOUT
AC coupled
20MHz Filter
VOUT
AC coupled
20MHz Filter
50mV
60mV
-60mV
-84mV
∆IOUT/∆t
=2.5A/us
IL
∆IOUT/∆t
=2.5A/us
IL
20us/d
20us/d
Figure 13: Load Step, DCM / CCM, 0A - 7.5A - 0A
Figure 14: Load Step, Forced CCM, 0A - 7.5 - 0A
26
24
SW
VOUT
AC coupled
20MHz Filter
IOCP (A)
22
60mV
-50mV
20
18
16
14
12
∆IOUT/∆t
=2.5A/us
IL
10
20us/d
1.5
1.75
2
2.25
2.5
RLIM (k)
Figure 16: Typical IOCP versus RLIM
Figure 15: Load Step, Forced CCM, 7.5A - 15A - 7.5A
8/15
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Rev. 1D
XR76115
Power-up
VIN
VIN
VOUT
VOUT
SW
SW
IL
IL
1ms/d
1ms/d
Figure 17: Power-up, Forced CCM, IOUT = 0A
Figure 18: Power-up, Forced CCM, IOUT = 15A
VIN
VIN
VOUT
VOUT
SW
SW
IL
IL
1ms/d
1ms/d
Figure 20: Power-up, DCM / CCM, IOUT =15A
Figure 19: Power-up, DCM / CCM, IOUT = 0A
EN
VOUT
SW
IL
20ms/d
Figure 21: Enable Turn On / Turn Off, 1.2VOUT, 15A
9/15
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Rev. 1D
XR76115
Efficiency and Thermal Characteristics
TAMBIENT = 25°C, no air flow, inductor losses are included.
100
100
95
95
90
90
Efficiency (%)
Efficiency (%)
1uH
85
80
75
70
65
60
0.1
3.3V_CCM
3.3V_DCM
2.5V_CCM
2.5V_DCM
1.8V_CCM
1.8V_DCM
1.5V_CCM
1.5V_DCM
1.2V_CCM
1.2V_DCM
1.0V_CCM
1.0V_DCM
1
85
80
0.56uH
75
5.0V_CCM
3.3V_CCM
2.5V_CCM
1.8V_CCM
1.5V_CCM
1.2V_CCM
1.0V_CCM
70
65
60
10
IOUT (A)
0.1
1
5.0V_DCM
3.3V_DCM
2.5V_DCM
1.8V_DCM
1.5V_DCM
1.2V_DCM
1.0V_DCM
10
IOUT (A)
Figure 22: 5VIN, 600kHz, 0.47µH
Figure 23: 12VIN, 600kHz
100
1.8uH
95
Efficiency (%)
90
1.5uH
85
80
75
70
65
60
0.1
5.0V_CCM
5.0V_DCM
3.3V_CCM
3.3V_DCM
2.5V_CCM
2.5V_DCM
1
10
IOUT (A)
Figure 24: 22VIN, 400kHz
TAMBIENT vs IOUT
130
120
120
110
110
TAMBIENT (°C)
TAMBIENT (°C)
TAMBIENT vs IOUT
130
100
90
80
1.2
70
1.8
60
50
2
3
4
90
1.2
80
1.8
70
60
3.3
1
100
5
6
7
8
50
9 10 11 12 13 14 15
3.3
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
IOUT (A)
IOUT (A)
Figure 26: Package Thermal Derating, 5VIN
Figure 25: Package Thermal Derating, 12VIN
10/15
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Rev. 1D
XR76115
Detailed Operation
The XR76115 uses a synchronous step-down, proprietary
emulated current-mode Constant On-Time (COT) control
scheme. The on-time, which is programmed via RON, is
inversely proportional to VIN and maintains a nearly
constant frequency. The emulated current-mode control
allows the use of ceramic output capacitors.
Each switching cycle begins with the high-side (switching)
FET turning on for a pre-programmed time. At the end of
the on-time, the high-side FET is turned off and the low-side
(synchronous) FET is turned on for a preset minimum time
(250ns nominal). This parameter is termed the Minimum
Off-Time. After the Minimum Off-Time, the voltage at the
feedback pin FB is compared to an internal voltage ramp at
the feedback comparator. When VFB drops below the ramp
voltage, the high-side FET is turned on and the cycle
repeats. This voltage ramp constitutes an emulated current
ramp and allows for the use of ceramic capacitors, in
addition to other capacitor types, for output filtering.
Figure 27: Selecting Forced CCM by deriving EN/MODE from VIN
Enable / Mode
The EN/MODE pin accepts a tri-level signal that is used to
control channel turn-on and turn-off. It also selects between
two modes of operation: ‘Forced CCM’ and ‘DCM / CCM’. If
EN is pulled below 1.9V, the regulator shuts down. A
voltage between 1.9V and 3V selects the Forced CCM
mode, which will run the converter in continuous conduction
for all load currents. A voltage higher than 3V selects the
DCM / CCM mode, which will run the converter in
discontinuous conduction mode at light loads.
Selecting the Forced CCM Mode
In order to set the controller to operate in Forced CCM, a
voltage between 1.9V and 3.0V must be applied to the
EN/MODE pin. This can be achieved with an external
control signal that meets the above voltage requirement.
Where an external control is not available, the EN/MODE
signal can be derived from VIN. If VIN is well regulated, use a
resistor divider and set the voltage to 2.5V. If VIN varies over
a wide range, the circuit shown in Figure 27 can be used to
generate the required voltage. Note that at VIN of 5.5V to
22V, the nominal Zener voltage is respectively 4.0V to 5.0V.
Therefore, for VIN in the range of 5.5V to 22V, the circuit
shown in Figure 27 will generate voltage at the EN/MODE
pin required for Forced CCM.
Figure 28: Selecting DCM/CCM by Deriving EN/MODE from VIN
Programming the On-Time
The on-time TON is programmed via resistor RON according
to following equation:
Selecting the DCM / CCM Mode
𝑅𝑅𝑂𝑂𝑂𝑂 =
In order to set the controller operation to DCM / CCM, a
voltage between 3.1V and 5.5V must be applied to the
EN/MODE pin. If an external control signal is available, it
can be directly connected to the EN/MODE pin. In
applications where an external control signal is not
available, the EN/MODE input can be derived from VIN. If
VIN is well regulated, use a resistor divider and set the
voltage to 4.0V. If VIN varies over a wide range, the circuit
shown in Figure 28 can be used to generate the required
voltage.
𝑉𝑉𝐼𝐼𝐼𝐼 × [𝑇𝑇𝑂𝑂𝑂𝑂 − (2.5 × 10−8 )]
3 × 10−10
TON is calculated from:
where:
𝑇𝑇𝑂𝑂𝑂𝑂 =
𝑉𝑉𝑂𝑂𝑂𝑂𝑂𝑂
𝑉𝑉𝐼𝐼𝐼𝐼 × 𝑓𝑓 × 𝐸𝐸𝐸𝐸𝐸𝐸.
f is the desired switching frequency at nominal IOUT
Eff. is the converter efficiency corresponding to nominal
IOUT
11/15
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Rev. 1D
XR76115
Substituting for TON in the first equation we get:
𝑅𝑅𝑂𝑂𝑂𝑂
Programming the Output Voltage
𝑉𝑉
� 𝑂𝑂𝑂𝑂𝑂𝑂 � − [(2.5 × 10−8 ) × 𝑉𝑉𝐼𝐼𝐼𝐼 ]
𝑓𝑓 × 𝐸𝐸𝐸𝐸𝐸𝐸.
=
(3 × 10−10 )
Use an external voltage divider as shown in Figure 1 to
program the output voltage VOUT.
𝑉𝑉𝑂𝑂𝑂𝑂𝑂𝑂
𝑅𝑅1 = 𝑅𝑅2 × �
− 1�
0.6
Over-Current Protection (OCP)
If the load current exceeds the programmed over-current
IOCP for four consecutive switching cycles, then the regulator
enters the hiccup mode of operation. In hiccup mode, the
MOSFET gates are turned off for 110ms (hiccup timeout).
Following the hiccup timeout, a soft-start is attempted. If
OCP persists, the hiccup timeout will repeat. The regulator
will remain in hiccup mode until load current is reduced
below the programmed IOCP. In order to program overcurrent protection, use the following equation:
where:
𝑅𝑅𝐼𝐼𝐼𝐼𝐼𝐼𝐼𝐼 =
The recommended value for R2 is 2kΩ.
Programming the Soft-start
Place a capacitor CSS between the SS and GND pins to
program the soft-start. In order to program a soft-start time
of TSS, calculate the required capacitance CSS from the
following equation:
𝐶𝐶𝑆𝑆𝑆𝑆 = 𝑇𝑇𝑆𝑆𝑆𝑆 ×
(𝐼𝐼𝑂𝑂𝑂𝑂𝑂𝑂 × 𝑅𝑅𝐷𝐷𝐷𝐷𝐷𝐷𝐷𝐷 ) + 8𝑚𝑚𝑚𝑚
𝐼𝐼𝐿𝐿𝐿𝐿𝐿𝐿
10𝑢𝑢𝑢𝑢
0.6𝑉𝑉
Feed-Forward Capacitor CFF
A feed-forward capacitor CFF may be necessary, depending
on the Equivalent Series Resistance (ESR) of COUT. If only
ceramic output capacitors are used, then a CFF is
necessary. Calculate CFF from:
RLIM is resistor value for programming IOCP
IOCP is the over-current value to be programmed
RDSON = 4.6mΩ (maximum specification)
8mV is the OCP comparator offset
where:
ILIM is the internal current that generates the
necessary OCP comparator threshold (use 45µA)
𝐶𝐶𝐹𝐹𝐹𝐹 =
1
2 𝑥𝑥 𝜋𝜋 𝑥𝑥 𝑅𝑅1 𝑥𝑥 7 𝑥𝑥 𝑓𝑓𝐿𝐿𝐿𝐿
R1 is the resistor that CFF is placed in parallel with
Note that ILIM has a positive temperature coefficient of
0.4%/°C. This is meant to approximately match and
compensate for positive temperature coefficient of the
synchronous FET.
fLC is the frequency of the output filter double pole
fLC must be less than 15kHz when using ceramic COUT. If
necessary, increase COUT and / or L in order to meet this
constraint.
The above equation is for worst-case analysis and
safeguards against premature OCP. The actual value of
IOCP, for a given RLIM, will be higher than that predicted by
the above equation. Typical IOCP versus RLIM is shown in
Figure 16.
When using capacitors with higher ESR, such as the
Panasonic TPE series, a CFF is not required provided
following conditions are met:
1.
Short-Circuit Protection (SCP)
2.
If the output voltage drops below 60% of its programmed
value, the regulator will enter hiccup mode. Hiccup mode
will persist until the short-circuit is removed. The SCP circuit
becomes active after PGOOD asserts high.
The frequency of the output LC double pole fLC
should be less than 10kHz
The frequency of ESR zero fZERO,ESR should be at
least five times larger than fLC
Note that if fZERO,ESR is less than 5 x fLC, then it is
recommended to set the fLC at less than 2kHz. CFF is still not
required.
Over-Temperature Protection (OTP)
Feed-Forward Resistor RFF
OTP triggers at a nominal controller temperature of 150°C.
The gates of the switching FET and the synchronous FET
are turned off. When die temperature cools down to 135°C,
soft-start is initiated and operation resumes.
Poor PCB layout and / or extremely fast switching FETs can
cause switching noise at the output and may couple to the
FB pin via CFF. Excessive noise at FB will cause poor load
regulation. To solve this problem, place a resistor RFF in
series with CFF. An RFF value up to 2% of R1 is acceptable.
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Rev. 1D
XR76115
Maximum Allowable Voltage Ripple at FB Pin
The thermal resistance of the XR76115 is specified in the
“Operating Ratings” section of this datasheet. The JEDEC
θJA thermal resistance provided is based on tests that
comply with the JESD51-2A “Integrated Circuit Thermal
Test Method Environmental Conditions – Natural
Convection” standard. JESD51-xx are a group of standards
whose intent is to provide comparative data based on a
standard test condition which includes a defined board
construction. Since the actual board design in the final
application will be different from the board defined in the
standard, the thermal resistances in the final design may be
different from those shown.
Note that the steady-state voltage ripple at the feedback pin
(VFB,RIPPLE) must not exceed 50mV in order for the controller
to function correctly. If VFB,RIPPLE is larger than 50mV, then
COUT should be increased as necessary in order to keep the
VFB,RIPPLE below 50mV.
Thermal Design
Proper thermal design is critical in controlling device
temperatures and in achieving robust designs. There are a
number of factors that affect the thermal performance. One
key factor is the temperature rise of the devices in the
package, which is a function of the thermal resistances of
the devices inside the package and the power being
dissipated.
The package thermal derating curves for the XR76115 are
shown in Figures 25 and 26. These correspond to input
voltage of 12V and 5V, respectively.
Applications Circuit
CBST
1uF
MMSZ4687=4.3V --> DCM/CCM
MMSZ4681=2.4V --> Forced CCM
PVIN PAD
30
29
PVIN
PVIN
31
PVIN
32
PVIN
34
35
33
PVIN
PVIN
PVIN
36
NC
PGND
PGND
AGND PAD
SW PAD
9
PGND
SW
FB
PGND
AGND
SW
8
10k
PGND
FB
18
R4
PGOOD
SW
7
17
VCC
PGND
SW
PWRGD
SW
XR76115
SS
16
6
TON
15
5
47nF
PVIN
SW
4
EN
14
CSS
6k
PVIN
PVIN
SW
RON
22uF
ILIM
AGND
3
NC
13
2
VCC
2.5k
12
EN/MODE
RLIM
VIN
1
SW
SW
37
BST
PVIN
11
R3 10k,
10
D1 MMSZXXXX
12VIN
PVIN
22uF
28
27
26
25
24
23
22
21
L1 IHLP-5050FD
0.56uH @ 37A, 1.2mOhm
20
680uF 47uF
CVCC
0.1uF
4.7uF
47uF
47uF
PGND PAD
Rsnb
1 Ohm
Csnb
3.3nF
CFF
1nF
RFF
10 Ohm
CIN
600kHz 1.2V 15A
19
R1
2k,1%
PVIN
FB
R2
2k,1%
VCC
Figure 29: XR76115 Application Circuit Schematic
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Rev. 1D
XR76115
Mechanical Dimensions
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Rev. 1D
XR76115
Revision History
Revision
Date
1A
March 2014
1B
August 2015
1C
June 2018
1D
10/18/19
Description
Initial release: ECN 1413-14 03-26-2014
Changed “On-Time 2” specification to: Min=170ns, Typ=200ns, Max= 230ns
Changed “On-Time 3” specification to: Min=365ns, Typ=430ns, Max= 495ns
Changed “f corresponding to On-Time 2” specification to: Min=362 kHz, Typ=417 kHz, Max= 490
kHz
removed “f corresponding to On-Time 2” specifications for VOUT=3.3V, removed Diode Emulation
Mode write up, modified Functional Block Diagram, modified Feed-Forward Capacitor write up,
modified Programming the On-Time write up; added “Selecting the Forced CCM Mode”, “Selecting
the DCM/CCM Mode”, “Feed-Forward Resistor”, “Maximum Allowable Voltage Ripple at FB Pin”
sections
Updated to MaxLinear logo. Updated format and Ordering Information table.
Correct block diagram by changing the input gate into the Hiccup Mode from an AND gate to an OR
gate. Update ordering information.
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