XRP7724EVB-DEMO-2P-KIT

XRP7720/7724/7725EVB-DEMO-1 Quad Channel Digital PWM/PFM Demo Board Programmable Power Management System January 2014 GENERAL DESCRIPTION The XRP7720/7724/7725EVB-DEMO-1 board is a complete, four channel, power system. It provides 3.3V, 2.5V 1.5V and 1V at a maximum of 3A, 3A, 5A and 10A loads respectively. The 1.5V and 1V supplies can be adjusted in 2.5mV increments, the 2.5V supply in 5mV increments, and the 3.3V supply is adjustable in 10mV increments. The order and ramp rates for each supply can be programmed to accommodate any sequencing requirement. All power supply operations can be controlled over an I2C interface. Faults, output voltages and currents can also be monitored. Two GPIO and three PSIO signals are available and can be programmed to provide a variety of functions. Unused GPIO/PSIO pins can be programmed as I/O expansion for a microcontroller. The board is supported by PowerArchitectTM 5.1 and plugs directly onto the Exar Communications Module (XRP77xxEVB-XCM). Rev. 2.0.0 EVALUATION BOARD MANUAL XRP7724EVB-DEMO-1 FEATURES • XRP7720/XRP7724/XRP7725 Programmable Controller • 4 Channel Power System • Wide Input Voltage Range: 5.5V-18V • I2C Interface − Programming − Monitoring − Control Exar Corporation 48720 Kato Road, Fremont CA 94538, USA www.exar.com Tel. +1 510 668-7000 – Fax. +1 510 668-7001 XRP7720/7724/7725EVB-DEMO-1 Quad Channel Digital PWM/PFM Demo Board Programmable Power Management System January 2014 Rev. 2.0.0 EVALUATION BOARD SCHEMATICS T14 VIN P10 1 3 2 1 2 1888687 C45 35V 10UF 1210 P11 GND 50V C21 BST1 T15 LX1 0603 0.1UF VIN R10 DNS GH1 1 2 3 4 T16 GL1 R9 V5EXT CH1_OUT 4.9uH C8 50V 1UF R21 DNS 0603 C1 6.3V 47uF 1210 1210 DNS 0603 VIN C5 6.3V 47uF C46 DNS P1 1 2 1888687 VOUT1 R20 DNS 0603 DNS 3.3V- 5.0V 3A T1 L1 744314490 R28 DNS 0805 GND 0603 R1 CH1_OUT Q1 FDMC8200 C13 35V 10UF 8 7 6 5 0603 GND 0603 C29 50V 0.01UF 1210 GND C40 50V 0.01UF 0603 0805 C39 16V 4.7UF 0805 AVDD D2 D3 D4 DNS R43 R44 DNS 1 2 3 4 C31 ENABLE ENABLE_IC GND GND LDO5 LDO3V3 PS2 T7 1210 35V 10UF C30 0603 0805 0603 1210 0603 1210 0805 G 1,2,3 0.1UF R14 DNS GL4 4 G 0603 35V 10UF FDMS7560S GPIO1 R42 1206 DNS EX1 GPIO2 R40 1206 DNS EX2 J2 PS1 R32 1206 DNS EX3 1 2 3 4 Header 2X2 PS2 R33 1206 DNS EX4 PS3 R34 1206 DNS EX5 J1 1 2 3 4 5 6 Header 3X2 PS3 PS1 VPP GND GND 0603 R4 DNS P6 1 2 3 4 Header 2X2 T5 R30 DNS T12 EX5 T9 GND P5 1 2 3 4 5 6 Header 3X2 R3 DNS R2 DNS 0603 VIN R18 DNS 0603 ENABLE 0603 GPIO1 GPIO2 LDO5 EX1 EX2 0603 T8 0603 PS1 0603 0805 1210 1210 0805 R25 DNS VOUT3 R24 DNS P3 1 2 1888687 D S SIR474DP Q6 T4 D 7443551130 L4 LX4 S Q5 1.0V 10A CH4_OUT 1.3uH R37 DNS C49 DNS C15 6.3V 100uF C12 6.3V 100uF C4 6.3V 100uF C11 6.3V 100uF C16 50V 1UF R27 DNS VOUT4 R26 DNS P4 1 2 1888687 R19 DNS R17 4.7K R16 4.7K SDA SCL T6 T11 GND GND JP1 C36 PS2 GND EX4 EX3 VPP 0603 SDA SCL PS1 PS2 PS3 ENABLE 1 2 3 4 5 6 7 8 9 10 Header 5X2 P7 1 2 3 4 5 6 7 8 9 10 Header 5X2 PS3 R6 DNS GND DNS GND DNS GND R5 0603 GND SCL SDA LDO5 C10 50V 1UF LDO5 SCL SDA J3 0603 GPIO1 GPIO2 50V GPIO2 D13 GND AREF DNS T13 4 0603 0603 0603 26 27 28 R15 DNS GH4 GPIO1 DNS C3 6.3V 100uF VIN 0603 IO3 C48 DNS C7 6.3V 100uF 0603 15 16 17 R45 S CH3_OUT T3 0603 C43 0.1UF 50V 0603 BST4 C25 IO2 1.5V 5A L3 744314200 2.0uH R31 DNS VOUT4_VPP 0603 AVDD FDMC7660 GND IO4 P9 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Header 15 35V 10UF 1,2,3 IO2 IO3 IO4 A3 A4 A5 D 0603 0603 10 11 12 Q3 R7 DNS 4 G 0603 R41 GL4 GND LX4 DNS FDMC8882 LX3 0.1UF GL3 GND SDA SCL LDO5 LDO3V3 C20 S 0603 GND C18 0805 16V 4.7UF BST4 GH4 50V 0603 GND C22 BST3 C44 0.1UF 50V D G 0603 0603 CH3_OUT 18 19 20 21 22 8 P2 1 2 1888687 R22 DNS 0805 GND GND VIN LX3 DNS 4 1210 VIN R39 GL3 Q4 R8 DNS GH3 1210 P8 4 5 6 GND BST3 GH3 VCCD C9 50V 1UF 1 2 3 GND BST4 GH4 LX4 GL4 PGND4 VOUT4 23 C2 6.3V 47uF T2 VIN 0.1UF 50V 0603 C23 50V 0.01UF VCCD3-4 AGND/EXPOSED PAD GND ENABLE C6 6.3V 47uF LX2 0603 0603 45 C17 50V 0.01UF 0603 0603 0603 PS1 PS2 PS3 CH2_OUT R23 DNS VOUT2 0603 CH2_OUT C42 24 25 26 27 28 7 C47 DNS 1210 40 BST3 GH3 LX3 GL3 PGND3 VOUT3 DNS 0603 1210 DNS ENABLE_IC SDA SCL R36 DNS GL2 R11 GL2 GND 5,6,7,8 13 14 15 16V 4.7UF BST2 GH2 29 30 31 32 33 6 2.5V 3A 744314330 L2 3.3uH R29 DNS 1,2,3 PS1 PS2 PS3 GPIO1 GPIO2 C14 35V 10UF 5,6,7,8 11 12 BST2 GH2 LX2 GL2 PGND2 VOUT2 GND 8 7 6 5 SDA SCL 0.1UF 50V 0805 V5EXT AVDD DVDD FDMC8200 Q2 0603 C24 1,2,3 ENABLE R13 9 10 VCCD 34 0.1UF 0603 GND VCCD GPIO1 GPIO2 0603 C41 CH1_OUT LX2 0603 0603 0603 GND C35 50V 0.01UF 4 16 VCCD1-2 LX1 1210 16V 2.2UF 0603 0805 C38 43 AVDD LDO5 LDO3.3 GL1 DNS DNS SL1,SL2,MB LDO3V3 V5EXT BFB R38 GH2 R12 0805 GND CPLL BST1 GH1 SL1,SL2,MB GND GND 44 1 AGND 0603 0603 0805 GND LDO5 LDO3V3 DGND 3 42 C33 50V 0.1UF 50V C19 VIN GND 2 CPLL VCCD 0603 C34 50V 0.01UF 35 36 37 38 39 5 1210 VIN BST1 GH1 LX1 GL1 PGND1 VOUT1 1210 U1 17 R35 DNS C37 16V 4.7UF C27 50V 0.01UF BST2 GND LDO5 C26 50V 2200pF 0603 1210 C32 35V 10UF 0603 C28 50V 0.01UF 41 0603 0603 T10 CH4_OUT VOUT4_VPP VPP GND GND Figure 1: XRP7720 /7724/7725 Evaluation Board Schematics Exar Corporation 48720 Kato Road, Fremont CA 94538, USA www.exar.com Tel. +1 510 668-7000 – Fax. +1 510 668-7001 XRP7720/7724/7725EVB-DEMO-1 Quad Channel Digital PWM/PFM Demo Board Programmable Power Management System XRP7720-DEV PIN ASSIGNMENT LDO5 5VEXT NC VCC ENABLE GL_RTN1 GL1 LX1 GH1 BST1 VCCD1-2 44 43 42 41 40 39 38 37 36 35 34 NC 1 33 GL_RTN2 AGND 2 32 GL2 NC 3 31 LX2 AVDD 4 30 GH2 VOUT1 5 29 BST2 VOUT2 6 28 GL_RTN3 VOUT3 7 27 GL3 VOUT4 8 26 LX3 GPIO0 9 25 GH3 GPIO1 10 24 BST3 SDA 11 23 VCCD3-4 XRP7720-DEV TQFN 7mm X 7mm Exposed Pad: AGND 15 16 17 18 19 20 21 22 PSIO2 DVDD DGND BST4 GH4 LX4 GL4 GL_RTN4 PSIO0 PSIO1 13 SCL 14 12 Figure 2: XRP7720-DEV Pin Assignment XRP7720-DEV PIN DESCRIPTION Name Pin Number Description VCC 41 Input voltage. Place a decoupling capacitor close to the pin. This input is used in UVLO fault generation. DVDD 16 1.8V supply for digital circuitry. Connect pin to AVDD. Place a decoupling capacitor close to the pin. VCCD1-2 VCCD3-4 23,34 AGND 2 © 2014 Exar Corporation Gate Drive supply. Two independent gate drive supply pins where pin 34 supplies drivers 1 and 2 and pin 23 supplies drivers 3 & 5. One of the two pins must be connected to the LDO5 pin to enable two power rails initially. It is recommended that the other VCCD pin be connected to the output of a 5V switching rail(for improved efficiency or for driving larger external FETs), if available, otherwise this pin may also be connected to the LDO5 pin. A bypass capacitor (>1uF) to PAD is recommended for each VCCD pin with the pin(s) connected to LDO5 with shortest possible etch. Analog ground pin. This is the small signal ground connection. 3/16 Rev. 2.0.0 XRP7720/7724/7725EVB-DEMO-1 Quad Channel Digital PWM/PFM Demo Board Programmable Power Management System Name Pin Number Description GL_RTN1-4 39,33, 28,22 Ground connection for the low side gate driver. This should be routed as a signal trace with GL. Connect to the source of the low side MOSFET. GL1-GL4 38,32, 27,21 Output pin of the low side gate driver. Connect directly to the gate of an external Nchannel MOSFET. GH1-GH4 36,30, 25,19 Output pin of the high side gate driver. Connect directly to the gate of an external Nchannel MOSFET. LX1-LX4 37,31, 26,20 Lower supply rail for the GH high-side gate driver. Connect this pin to the switching node at the junction between the two external power MOSFETs and the inductor. These pins are also used to measure voltage drop across bottom MOSFETs in order to provide output current information to the control engine. BST1-BST4 35,29, 24,18 High side driver supply pin(s). Connect BST to the external capacitor as shown in the Typical Application Circuit on page 5. The high side driver is connected between the BST pin and LX pin and delivers the BST pin voltage to the high side FET gate each cycle. GPI0-GPIO1 9,10 These pins can be configured as inputs or outputs to implement custom flags, power good signals, enable/disable controls and synchronization to an external clock. PSIO0-PSIO2 13,14,15 SDA, SCL 11,12 VOUT1-VOUT4 5,6,7,8 Connect to the output of the corresponding power stage. The output is sampled at least once every switching cycle LDO5 44 Output of a 5V LDO. This is a micro power LDO that can remain active while the rest of the IC is in the stand-by mode. This LDO is also used to power the internal Analog Blocks. ENABLE 40 If ENABLE is pulled high or allowed to float high, the chip is powered up (logic is reset, registers configuration loaded, etc.). The pin must be held low for the XRP7724 to be placed into shutdown. Active channels will automatically be ramped down, if desired, prior to the disabling of the chip. DGND 17 Digital ground pin. This is the logic ground connection, and should be connected to the ground plane close to the PAD. NC 1,3,42 © 2014 Exar Corporation Open drain, these pins can be used to control external power MOSFETs to switch loads on and off, shedding the load for fine grained power management. They can also be configures as standard logic outputs or inputs just as any of the GPIOs can be configured, but as open drains require an external pull-up when configured as outputs. SMBus/I2C serial interface communication pins. These pins can be configured open drain or pseudo-TTL requiring a pull-up resistor. No Connect 4/16 Rev. 2.0.0 XRP7720/7724/7725EVB-DEMO-1 Quad Channel Digital PWM/PFM Demo Board Programmable Power Management System XRP7724/XRP7725 PIN ASSIGNMENT LDO5 5VEXT BFB VCC ENABLE GL_RTN1 GL1 LX1 GH1 BST1 VCCD1-2 44 43 42 41 40 39 38 37 36 35 34 LDO3_3 1 33 GL_RTN2 AGND 2 32 GL2 CPLL 3 31 LX2 AVDD 4 30 GH2 VOUT1 5 29 BST2 VOUT2 6 28 GL_RTN3 VOUT3 7 27 GL3 VOUT4 8 26 LX3 GPIO0 9 25 GH3 GPIO1 10 24 BST3 SDA 11 23 VCCD3-4 XRP7724/XRP7725 TQFN 7mm X 7mm Exposed Pad: AGND 12 13 14 15 16 17 18 19 20 21 22 SCL PSIO0 PSIO1 PSIO2 DVDD DGND BST4 GH4 LX4 GL4 GL_RTN4 Figure 3: XRP7724/XRP7725 Pin Assignment XRP7724/XRP7725 PIN DESCRIPTION Name Pin Number Description VCC 41 Input voltage. Place a decoupling capacitor close to the pin. This input is used in UVLO fault generation. DVDD 16 1.8V supply for digital circuitry. Connect pin to AVDD. Place a decoupling capacitor close to the pin. VCCD1-2 VCCD3-4 23,34 AGND 2 GL_RTN1-4 39,33, 28,22 © 2014 Exar Corporation Gate Drive supply. Two independent gate drive supply pins where pin 34 supplies drivers 1 and 2 and pin 23 supplies drivers 3 & 5. One of the two pins must be connected to the LDO5 pin to enable two power rails initially. It is recommended that the other VCCD pin be connected to the output of a 5V switching rail(for improved efficiency or for driving larger external FETs), if available, otherwise this pin may also be connected to the LDO5 pin. A bypass capacitor (>1uF) to PAD is recommended for each VCCD pin with the pin(s) connected to LDO5 with shortest possible etch. Analog ground pin. This is the small signal ground connection. Ground connection for the low side gate driver. This should be routed as a signal trace with GL. Connect to the source of the low side MOSFET. 5/16 Rev. 2.0.0 XRP7720/7724/7725EVB-DEMO-1 Quad Channel Digital PWM/PFM Demo Board Programmable Power Management System Name Pin Number Description GL1-GL4 38,32, 27,21 Output pin of the low side gate driver. Connect directly to the gate of an external Nchannel MOSFET. GH1-GH4 36,30, 25,19 Output pin of the high side gate driver. Connect directly to the gate of an external Nchannel MOSFET. 37,31, 26,20 Lower supply rail for the GH high-side gate driver. Connect this pin to the switching node at the junction between the two external power MOSFETs and the inductor. These pins are also used to measure voltage drop across bottom MOSFETs in order to provide output current information to the control engine. BST1-BST4 35,29, 24,18 High side driver supply pin(s). Connect BST to the external capacitor as shown in the Typical Application Circuit on page 5. The high side driver is connected between the BST pin and LX pin and delivers the BST pin voltage to the high side FET gate each cycle. GPI0-GPIO1 9,10 These pins can be configured as inputs or outputs to implement custom flags, power good signals, enable/disable controls and synchronization to an external clock. LX1-LX4 Open drain, these pins can be used to control external power MOSFETs to switch loads on and off, shedding the load for fine grained power management. They can also be configures as standard logic outputs or inputs just as any of the GPIOs can be configured, but as open drains require an external pull-up when configured as outputs. PSIO0-PSIO2 13,14,15 SDA, SCL 11,12 VOUT1-VOUT4 5,6,7,8 Connect to the output of the corresponding power stage. The output is sampled at least once every switching cycle LDO5 44 Output of a 5V LDO. This is a micro power LDO that can remain active while the rest of the IC is in the stand-by mode. This LDO is also used to power the internal Analog Blocks. LDO3_3 1 SMBus/I2C serial interface communication pins. These pins can be configured open drain or pseudo-TTL requiring a pull-up resistor. Output of the 3.3V standby LDO. This is a micro power LDO that can remain active while the rest of the IC is in shutdown. ENABLE 40 If ENABLE is pulled high or allowed to float high, the chip is powered up (logic is reset, registers configuration loaded, etc.). The pin must be held low for the XRP7724 to be placed into shutdown. Active channels will automatically be ramped down, if desired, prior to the disabling of the chip. BFB 42 Input from the 15V output created by the external boost supply. When this pin goes below a pre-defined threshold, a pulse is created on the low side drive to charge this output back to the original level. If not used, this pin should be connected to GND. DGND 17 Digital ground pin. This is the logic ground connection, and should be connected to the ground plane close to the PAD. CPLL 3 PLL compensation capacitor ORDERING INFORMATION Refer to XRP7720/XRP7724/XRP7725 datasheets and/or www.exar.com for exact and up to date ordering information. © 2014 Exar Corporation 6/16 Rev. 2.0.0 XRP7720/7724/7725EVB-DEMO-1 Quad Channel Digital PWM/PFM Demo Board Programmable Power Management System Load the PowerArchitectTM 5.1 software and run it. USING THE EVALUATION BOARD INPUT VOLTAGE RANGE After selecting the proper family (Chips) and the device (XRP7720, XRP7724, or XRP7725), select the “Get Started with the EVB-DEMO-1” option when prompted as shown below. The input voltage range of these boards is from 5.5V to 18V. The power components have been optimized for a 12V input rail. When running the board at an input voltage other than 12V, use PowerArchitectTM 5.1 to evaluate the system performance. I2C INTERFACE The controller employs a standard I2C interface. Pull-ups for the I2C signals are included on the demo board. OPERATING THE EVALUATION BOARD The demo board is designed to be powered from either an AC/DC wall wart (the output voltage must be in the range of the controller VCC specification – 5.5V to 18V) connected to the barrel connector, or a test bench DC power supply (the voltage must be in the range of the controller VCC specification – 5.5V to 18V) connected to the Vin phoenix connector (the positive side is indicated with VIN text in silkscreen. The proper connection is indicated in the evaluation board connections section below). When done, click “Create”. PowerArchitectTM 5.1 will load the default configuration automatically. Apply Power to the board. Please refer to the sections above on how to properly supply power to the board and what voltage range to use. Turn on the Power supply. BRING UP PROCEDURE Insert the USB cable into the computer and the XCM board. Plug the demo board to the XCM as shown below. Go to the Tools tab in PowerArchitectTM 5.1 and select Boards. The software will identify communication ports where it found the XCM board. Select the port. PowerArchitectTM 5.1 is now communicating with XCM which is indicated in the lower left corner. © 2014 Exar Corporation 7/16 Rev. 2.0.0 XRP7720/7724/7725EVB-DEMO-1 Quad Channel Digital PWM/PFM Demo Board Programmable Power Management System PowerArchitectTM 5.1 will go through the process of loading configuration in the flash. Once it has successfully completed the task, it will report the outcome as seen above and reset the device if “Automatically Reset After Flashing” box checked (default option). Programming the Configuration onto XRP7720-DEV/XRP7724/XRP7725 To program a configuration go to the Tools tab in PowerArchitectTM 5.1 and select Program Flash. Close the window. Note that the boards will be pre-loaded with the default configuration. Regulation To enable channel regulation go to the Tools tab in PowerArchitectTM 5.1 and select Dashboard. The program Flash window will appear. In Dashboard turn Group 1 and Group 2 on. The configuration groups channel 1, channel 2, and LDO3.3* into Group 1, and channels 3 and 4 into Group 2. The channels are now in regulation as indicated by Vout readings as well as the in-regulation indicators. Click the Flash button. Note*: Not available in XRP7720EVB-DEMO-1 © 2014 Exar Corporation 8/16 Rev. 2.0.0 XRP7720/7724/7725EVB-DEMO-1 Quad Channel Digital PWM/PFM Demo Board Programmable Power Management System EVALUATION BOARD CONNECTIONS The following picture illustrates how Vin supplied from a test bench DC power supply and instruments attached to the outputs would be connected to the demo board. GND1 OUT1 GND2 OUT2 GND3 OUT3 GND4 OUT4 VIN GND VIN BARREL CONNECTOR Channels can be turned on/off individually if desired. Note: Make sure there is a jumper shorting JP1 pins 1 and 2 installed on your board. Channel 4 will not regulate without it. JP1 JUMPER © 2014 Exar Corporation 9/16 Rev. 2.0.0 2 P10 P0P1101 1 3 P0P1102 2 P0P1103 1 2 4 5 6 N0VIN VIN P0T1500 P0C4502 P0C4501 P11 3 T14 P0P1001 P0P1002 1888687 1210 P0T1400 1 C45 35V 10UF Evaluation Board Schematic GND 50V 0603 C21P0C2101 P0C2102 0.1UF N0BST1 BST1 T15 N0LX1 LX1 N0VIN VIN 1 2 3 4 A Q1 0603 P0C2702 P0C2701 0603 P0U1041 R41 P0R4101 0603 C43 0.1UF 50V P0C4301 P0C4302 N0GH4 GH4 R15 DNS P0R1501 Header 15 GND T7 P0J103 1206 P0R3202 DNS P0R3201 N0EX3 EX3 1206 DNS R33 P0R3302 P0R3301 N0EX4 EX4 N0PS3 PS3 R34 N0EX5 EX5 P0J102 P0J104 1206 P0R3402 DNS P0R3401 DNS N0PS3 PS3 N0PS1 PS1 N0VPP VPP GND 1 P0P503 3 P0P505 5 T9 P0T900 2 4 6 P0P502 P0P504 P0P506 P0R2101 0603 P0R2001 P0R2102 P0T100 0603 P0R2002 1210 P0C102 P0C101 P0T200 P0R2301 P0R2201 P0R2302 0603 0603 0805 1210 P0C902 P0C901 0603 0805 P0C302 P0C301 C3 6.3V 100uF C10 50V 1UF C48 DNS P0R2401 P0R2502 P0R2501 P0T300 1210 C7 6.3V 100uF R25 DNS P3 N0VOUT3 VOUT3 1 2 P0P301 P0P302 R24 DNS 1888687 N0PS3 PS3 N0EX4 EX4 N0EX3 EX3 N0VPP VPP R6 DNS P0R2701 0603 C16 50V 1UF P0R2601 P0R2702 0805 C11 6.3V 100uF P0C1602 P0C1601 P0C1102 P0C1101 1210 C4 6.3V 100uF C49 DNS N0CH40OUT CH4_OUT R27 DNS N0VOUT4 VOUT4 R26 DNS P4 P0P401 P0P402 1 2 1888687 T11 GND JP1 1 P0JP102 2 P0JP103 3 R16 4.7K N0SDA SDA N0SCL SCL T6 GND C36 DNS D N0CH40OUT CH4_OUT GND R5 DNS C12 6.3V 100uF P0C402 C15 6.3V 100uF 1210 R37 DNS P0C401 1.3uH 0603 Q5 P0L402 P0R2602 P0L401 1.0V 10A P0R1901 0603 0603 R17 4.7K P0R1601 P0R1902 R19 DNS S 7443551130 L4 N0LX4 LX4 D C T4 P0T400 Q6 1210 SL1,SL2,MB P0Q50SL2 P0Q50SL1 P0Q50MB S N0VOUT40VPP VOUT4_VPP T10 N0VPP VPP Header 3X2 P0J106 GND Header 3X2 GND GND GND GND 10/16 1 P0C202 P0C201 R31 DNS SIR474DP G 4P0Q504 P0R1602 P0R1801 0603 0603 P0R201 N0PS2 PS2 P5 P0P501 0603 P0R301 N0PS1 PS1 P0P604 T5 N0EX5 EX5 T3 N0CH30OUT CH3_OUT P0JP101 P0P602 Header 2X2 R30 1.5V 5A 0603 R32 2 4 P0C3602 P0C3601 1 P0P603 3 DNS P0T1000 N0EX2 EX2 R2 P0R501 DNS P0R4001 DNS 0603 DNS P6 P0J204 GND 2 4 6 GND R3 P0R502 1 3 P0J105 5 P0J101 1206 R4 0603 N0PS2 PS2 P0J202 J1 P0T700 N0EX1 EX1 P0P601 Header 2X2 N0PS2 PS2 R40 P0R4002 N0PS1 PS1 2 4 DNS P0R4201 T12 P0R202 N0GPIO2 GPIO2 J2 N0LDO5 LDO5 P0J201 1 N0LDO3V3 LDO3V3 P0J203 3 1206 P0R4202 P0P7010 P0T1200 Header 5X2 P0J3010 Header 5X2 GND R42 P0P708 P0R302 N0GPIO1 GPIO1 N0VIN VIN P0P706 P0R601 P0J308 DNS 0603 P0J306 N0GPIO1 GPIO1 N0GPIO2 GPIO2 N0EX1 EX1 N0EX2 EX2 P0R602 P0J304 P0P704 R18 N0LDO5 LDO5 P0R401 P0J302 P0R3001 P0T500 P0T800 T8 2 4 6 8 10 0603 GND P0P901 P0J301 P0R3002 D 1 P0P902 2 P0P903 3 N0AVDD AVDD P0P904 4 P0P905 5 N0GPIO1 GPIO1 P0P906 6 N0GPIO2 GPIO2 P0P907 7 P0P908 8 N0SDA SDA P0P909 9 N0SCL SCL P0P901010 PS1 N0PS1 P0P901111 N0PS2 PS2 P0P901212 N0PS3 PS3 P0P901313 P0P901414 N0ENABLE0IC ENABLE_IC P0P901515 1 P0J303 3 P0J305 5 P0J307 7 N0ENABLE ENABLE P0J309 9 P0T1300 N0LDO5 LDO5 N0LDO3V3 LDO3V3 N0SCL SCL N0SDA SDA N0LDO5 LDO5 T13 P0P702 0603 J3 2 4 6 8 10 P0R402 1 P0P703 3 P0P705 5 P0P707 7 N0ENABLE ENABLE P0P709 9 P0R1701 P0R1802 P7 P0P701 D P0R1402 FDMS7560S N0LDO5 LDO5 N0SCL SCL N0SDA SDA P9 0603 35V 10UF 26 P0P8026 D13 27 P0P8027 GND 28 P0P8028 AREF DNS 2.0uH P0C1202 P0C1201 C30 R14 DNS P0R1401 P0R1702 35V 10UF N0GL4 GL4 1210 C31 P0C3002 P0C3001 N0ENABLE ENABLE 0603 1210 P0C3102 P0C3101 R44 DNS P0R4401 P0R4402 P0L302 G 4P0Q604 N0GPIO2 GPIO2 0603 N0IO4 IO4 P0L301 P0R1502 N0GPIO1 GPIO1 R43 DNS P0R4301 P0R4302 S 744314200 0603 0603 N0IO3 IO3 B N0VIN VIN N0BST4 C25 BST4 P0C2501 P0C2502 0.1UF 15P0P8015 D2 16P0P8016 D3 17P0P8017 D4 1888687 N0VOUT40VPP VOUT4_VPP 0603 N0IO2 IO2 N0IO3 IO3 N0IO4 IO4 R22 DNS 0603 50V R45 DNS P0R4501 P0R4502 P0P202 P0C1002 P0C1001 FDMC7660 N0LX4 LX4 P0R4102 L3 P0C702 P0C701 1210 35V 10UF GND N0IO2 IO2 D 0603 1,2,3 P0Q603 P0Q602 P0Q601 C Q3 R7 DNS G 4 P0Q304 P0R701 P0R702 N0GL3 GL3 GND 10P0P8010 A3 11P0P8011 A4 12P0P8012 A5 1 2 P0P201 0603 DNS C20 GND N0SDA SDA N0SCL SCL N0VOUT2 VOUT2 P0R2402 GND N0GL4 GL4 P2 FDMC8882 P0C1502 P0C1501 P0P805 1210 0805 C18 P0C1801 P0C1802 S N0LX3 LX3 GND N0BST4 BST4 N0GH4 GH4 R23 DNS D 1210 C44 0.1UF 50V T2 G 4P0Q404 50V 0603 C22P0C2201 P0C2202 0.1UF N0BST3 BST3 SL1,SL2,MB P0Q60SL2 P0Q60SL1 P0Q60MB AGND P0U102 GND GND P0P806 VIN 2 N0VIN VIN P0P804 DGND 4 5 6 P0U1017 P8 P0U101818 BST4P0U1019 19 GH4 P0U1020 20 LX4 P0U1021 21 GL4 P0U1022 22 PGND4 P0U108 8 VOUT4 P0R802 0603 16V 4.7UF 17 GND N0VCCD VCCD C9 50V 1UF N0CH20OUT CH2_OUT 0603 N0CH30OUT CH3_OUT 23 P0R801 N0LX3 LX3 P0C2002 P0C2001 P0U1023 VCCD3-4 P0U1045 AGND/EXPOSED PAD 0603 ENABLE R8 DNS P0R3101 R39 DNS P0R3901 P0R3902 P0C4401 P0C4402 C23 50V 0.01UF P0C502 P0C501 P0R2801 0805 Q4 N0GH3 GH3 N0GL3 GL3 P0U1040 45 GND P0C2302 P0C2301 0603 P0C1702 P0C1701 C17 50V 0.01UF 0603 1888687 N0VIN VIN GND N0BST3 BST3 N0GH3 GH3 VCCD C2 6.3V 47uF 0603 24 BST3P0U1025 25 GH3 P0U1026 26 LX3 P0U1027 27 GL3 P0U1028 28 PGND3 P0U107 7 VOUT3 C6 6.3V 47uF 0603 0603 40 R20 DNS 1 2 3 4 N0LX2 LX2 P0R3602 0603 N0CH20OUT CH2_OUT P0C4201 P0C4202 C42 0.1UF 50V N0VCCD N0ENABLE N0ENABLE0IC ENABLE R13 DNS ENABLE_IC P0R1301 P0R1302 C47 DNS P0R2202 P0R3601 N0GL2 GL2 P0U1024 13 P0U1013 PS1 14 P0U1014 PS2 15 P0U1015 PS3 R36 DNS P0R1102 0603 0805 11 P0U1011 SDA 12 P0U1012 SCL GPIO1 P0U1010 GPIO2 P0R1101 GND 1210 N0SDA SDA N0SCL SCL P0U109 N0BST2 BST2 N0GH2 GH2 P0C4802 P0C4801 P0R3102 AVDD P0U1016 DVDD DNS R29 DNS P0Q40MB P0U102929 BST2P0U1030 30 GH2 P0U1031 31 LX2 P0U1032 32 GL2 P0U1033 33 PGND2 P0U106 6 VOUT2 P0U104 R11 N0GL2 GL2 P0L202 3.3uH 1210 16V 4.7UF V5EXT 9 10 GND 2.5V 3A P0C602 P0C601 0805 C24 P0C2401 P0C2402 N0VCCD VCCD P0R2901 34 P0L201 5,6,7,8 0603 P0U1034 VCCD1-2 P0U1043 N0GPIO1 GPIO1 N0GPIO2 GPIO2 N0PS1 PS1 N0PS2 PS2 N0PS3 PS3 GND LDO5 LDO3.3 P0U101 P0Q20MB1 P0Q403 P0Q402 P0Q401 GND C35 50V 0.01UF P0U1044 C14 35V 10UF 1,2,3 16V 2.2UF P0C3502 P0C3501 0805 C38 P0C3802 P0C3801 N0LDO3V3 LDO3V3 BFB 744314330 L2 P0Q30MB B P0U1042 P0Q20MB2 FDMC8200 Q2 5,6,7,8 4 16 0603 C41P0C4101 P0C4102 0.1UF 50V N0CH10OUT CH1_OUT P0Q303 P0Q302 P0Q301 N0AVDD AVDD P0P102 P0Q201 P0Q202 P0Q203 P0Q204 0603 1,2,3 GND 1 2 N0VOUT1 VOUT1 P0R1202 0603 P0T1100 GND 43 GND P1 P0P101 N0LX2 LX2 0603 N0V5EXT V5EXT GND LX1 0805 44 1 CPLL N0GL1 GL1 P0R3802 P0R3701 N0LDO5 LDO5 N0LDO3V3 LDO3V3 C8 50V 1UF 0603 C33 50V 0.1UF C1 6.3V 47uF R21 DNS DNS P0R1201 N0LX1 0805 C34 50V 0.01UF 42 P0U103 P0R3801 R12 N0GH2 GH2 DNS P0C4902 P0C4901 P0R3702 P0C3302 P0C3301 0603 P0C3402 P0C3401 C37 16V 4.7UF 3 R38 8P0Q208 7P0Q207 6P0Q206 5P0Q205 CPLL N0BST1 BST1 N0GH1 GH1 1,2,3 P0Q503 P0Q502 P0Q501 VCCD C5 6.3V 47uF C46 DNS 50V 0603 C19 P0C1901 P0C1902 0.1UF N0VIN VIN 1210 P0R3502 0603 0805 P0C3702 P0C3701 P0R3501 N0CPLL R28 DNS N0CH10OUT CH1_OUT GND 35 BST1P0U1036 36 GH1 P0U1037 37 LX1 P0U1038 38 GL1 P0U1039 39 PGND1 P0U105 5 VOUT1 P0U1035 P0C1402 P0C1401 LDO5 N0VCCD 0603 R35 DNS C27 50V 0.01UF N0BST2 BST2 VIN U1 N0LDO5 C26 50V 2200pF 41 GND C32 35V 10UF P0C2602 P0C2601 C28 50V 0.01UF 1210 N0VIN VIN P0C3202 P0C3201 0603 4.9uH P0T600 N0V5EXT V5EXT P0C2802 P0C2801 P0R102 T16 P0R902 0603 0603 DNS P0T1600 R1 P0R101 DNS P0R901 P0L102 T1 0603 R9 744314490 P0L101 P0C4602 P0C4601 P0R2802 C13 35V 10UF 8P0Q108 7P0Q107 6P0Q106 5P0Q105 GND L1 P0Q10MB1 N0GL1 GL1 N0CH10OUT CH1_OUT 3.3V- 5.0V 3A P0Q10MB2 FDMC8200 0805 C29 50V 0.01UF P0C802 P0C801 P0Q101 P0Q102 P0Q103 P0Q104 1210 0603 0603 P0C4702 P0C4701 P0R2902 GND P0C2902 P0C2901 C40 50V 0.01UF R10 DNS N0GH1 GH1 P0R1001 P0R1002 P0C1302 P0C1301 GND 0603 C39 16V 4.7UF P0C4002 P0C4001 A 0805 P0C3902 P0C3901 N0AVDD AVDD 2 3 Title XRP7724EVB-DEMO-1 Size: C Name:XRP7724.SchDoc Rev: 1.0 EXAR 48720 Kato Road Fremont, CA 94538 www.exar.com Date: 1/17/2013 Time: 3:02:06 PM Sheet 1 of 1 File: C:\XRP7724EVB-DEMO-1\Board\XRP7724.SchDoc 4 5 6 XRP7720/7724/7725EVB-DEMO-1 Quad Channel Digital PWM/PFM Demo Board Programmable Power Management System BILL OF MATERIAL Ref. Qty Manufacturer Part Number Size Component U1 1 Exar Corp. XRP7720-DEV /XRP7724/XRP7725 TQFN44 2nd Generation 4Ch. Sw. Controller Q1,Q2 2 FAIRCHILD FDMC8200 Power 33 Dual N-Channel Power Trench MOSFET Q3 1 FAIRCHILD FDMC7660 Power 33 N-Channel Power Trench MOSFET Q4 1 FAIRCHILD FDMC8882 MLP 3.3X3.3 N-Channel Power Trench MOSFET Q5 1 FAIRCHILD FDMS7560S Power 56 N-Channel Power Trench SyncFET Q6 1 Vishay Siliconix SIR474DP PowerPAK SO8 N-Ch. 30-V (D-S) MOSFET L1 1 WURTH ELEKTRONIK 744314490 7.0x6.9mm Inductor 4.9uH, 14.5mΩ, 6.5A L2 1 WURTH ELEKTRONIK 744314330 7.0x6.9mm Inductor 3.3uH, 9.0mΩ, 9.0A L3 1 WURTH ELEKTRONIK 744314200 7.0x6.9mm Inductor 2.0uH, 5.85mΩ, 11.5A L4 1 WURTH ELEKTRONIK 7443551130 13.2X12.8mm Inductor 1.3uH, 1.8mΩ, 25A C1,C2,C5,C6 4 MURATA CORP. GRM32ER70J476KE20L 1210 CAP CER 47uF, 6.3V, X7R, 10% C3,C4,C7,C11,C12,C15 6 MURATA CORP. 1210 CAP CER 100uF, 6.3V, X5R, 20% C8,C9,C10,C16 4 MURATA CORP. GRM21BR71H105KA12L 0805 CAP CER 1.0uF, 50V, X7R, 10% C13,C14,C20,C30,C31,C32,C45 7 MURATA CORP. GRM32ER7YA106KA12L 1210 CAP CER 10uF, 35V,X7R, 10% C17,C23,C27-C29,C34,C35**,C40 8 MURATA CORP. GRM188R71H103KA01D 0603 CAP CER 0.01uF,50V,X7R,10% C18,C24,C37,C39 4 MURATA CORP. GRM21BR71C475KA73 0805 CAP CER 4.7uF, 16V,X7R,10% C19,C21,C22,C25,C33,C41-C44 9 MURATA CORP. GRM188R71H104KA93D 0603 CAP CER 0.1uF, 50V,X7R,10% C26 1 MURATA CORP. GRM188R71H222KA01D 0603 CAP CER 2200pF,50V,X7R,10% © 2014 Exar Corporation GRM32ER60J107M20L 11/16 Rev. 2.0.0 XRP7720/7724/7725EVB-DEMO-1 Quad Channel Digital PWM/PFM Demo Board Programmable Power Management System Ref. Qty Manufacturer Part Number MURATA CORP. GRM21BR71C225KA12L Size Component 0805 CAP CER 2.2uF, 16V,X7R,10% C38** 1 R16,R17 2 PANASONIC ERJ-3EKF4701V 0603 RES 4.7K OHM, 1/10W, 1%, SMD J1 1 WURTH ELEKTRONIK 61300624321 2.54mm Angled Dual Socket 2.54mm dual Pin Socket Header WRPHD J3 1 WURTH ELEKTRONIK 613 010 243 121 2.54mm Angled Dual Socket 2.54mm dual Pin Socket Header WRPHD JP1 1 WURTH ELEKTRONIK 61300311121 2.54mm Pin Header 2.54mm Pin Header WR-PHD, 3 Pins JP1(jumper) 1 609 002 115 121 2.54mm Pin Jumper 2.54mm Pin Jumper w/Test Point P1, P2,P3,P4,P10 5 691 216 510 002 9.5x5.08mm CONN.TERM. BLOCK 2POS P5 1 61300621021 2.54mm Dual Pin Header 2.54mm Dual Pin Header Wr-PHD P7 1 61301021021 2.54mm Dual Pin Header 2.54mm Dual Pin Header Wr-PHD P9 1 61301511121 2.54mm Pin Header 2.54mm Pin Header WR-PHD, 15 Pins P11 1 RAPC722X 2.1mmID, 5.5mmOD Conn. Powerjack Mini R/A, T/H T6,T8,T10,T11 4 61304011121 2.54mm Pin Header 2.54mm Pin Header WR-PHD, 40 Pins WURTH ELEKTRONIK WURTH ELEKTRONIK WURTH ELEKTRONIK WURTH ELEKTRONIK WURTH ELEKTRONIK Switchceaft Corp. WURTH ELEKTRONIK Note**: Not loaded on XRP7720EVB-DEMO-1 © 2014 Exar Corporation 12/16 Rev. 2.0.0 XRP7720/7724/7725EVB-DEMO-1 Quad Channel Digital PWM/PFM Demo Board Programmable Power Management System EVALUATION BOARD LAYOUT Figure 4: Component Placement – Top Side Figure 5: Layout – Top Side © 2014 Exar Corporation 13/16 Rev. 2.0.0 XRP7720/7724/7725EVB-DEMO-1 Quad Channel Digital PWM/PFM Demo Board Programmable Power Management System Figure 6: Layout - Bottom Figure 7: Layout – Middle Layer 1 © 2014 Exar Corporation 14/16 Rev. 2.0.0 XRP7720/7724/7725EVB-DEMO-1 Quad Channel Digital PWM/PFM Demo Board Programmable Power Management System Figure 8: Layout – Internal Plane © 2014 Exar Corporation 15/16 Rev. 2.0.0 XRP7720/7724/7725EVB-DEMO-1 Quad Channel Digital PWM/PFM Demo Board Programmable Power Management System DOCUMENT REVISION HISTORY Revision Date Description 1.0.0 09/28/12 1.1.0 06/18/2013 BOM- Change of Manufacturer P1,P2,P3,P4,P10. 1.1.1 10/14/2013 Deleted C36 from the bill of materials 2.0.0 01/31/2014 Added XRP7720-DEV and XRP7725 information Initial release of document BOARD REVISION HISTORY Board Revision Date XRP7724EVBDEMO-1-01 10/01/12 Description Initial release of evaluation board FOR FURTHER ASSISTANCE Email: customersupport@exar.com Exar Technical Documentation: http://www.exar.com/TechDoc/default.aspx? EXAR CORPORATION HEADQUARTERS AND SALES OFFICES 48720 Kato Road Fremont, CA 94538 – USA Tel.: +1 (510) 668-7000 Fax: +1 (510) 668-7030 www.exar.com NOTICE EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained here in are only for illustration purposes and may vary depending upon a user’s specific application. While the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. EXAR Corporation does not recommend the use of any of its products in life support applications where the failure malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation receives, writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances. or its in all Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited. © 2014 Exar Corporation 16/16 Rev. 2.0.0