1000307QC

100307 Low Power Quint Exclusive OR/NOR Gate August 1989 Revised August 2000 100307 Low Power Quint Exclusive OR/NOR Gate General Description The 100307 is monolithic quint exclusive-OR/NOR gate. The Function output is the wire-OR of all five exclusive-OR outputs. All inputs have 50 kΩ pull-down resistors. Features s Low Power Operation s 2000V ESD protection s Pin/function compatible with 100107 s Voltage compensated operating range = −4.2V to −5.7V s Available to industrial grade temperature range (PLCC package only) Ordering Code: Order Number 1000307PC 1000307QC 1000307QI Package Number N24E V28A V28A Package Description 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Industrial Temperature Range (−40°C to +85°C) Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagrams 24-Pin DIP Pin Descriptions Pin Names Dna–Dne F Oa–Oe Oa–Oe Description Data Inputs Function Output Data Outputs Complementary Data Outputs 28-Pin PLCC Logic Equation F = (D1a ⊕ D2a) + (D1b ⊕ D2b) + (D1c ⊕ D2c) + (D1d ⊕ D2d) + (D1e ⊕ D2e). © 2000 Fairchild Semiconductor Corporation DS010582 www.fairchildsemi.com 100307 Absolute Maximum Ratings(Note 1) Storage Temperature (TSTG) Maximum Junction Temperature (TJ) VEE Pin Potential to Ground Pin Input Voltage (DC) Output Current (DC Output HIGH) ESD (Note 2) −65°C to +150 °C +150 °C −7.0V to +0.5V VEE to +0.5V Recommended Operating Conditions Case Temperature (TC) Commercial Industrial Supply Voltage (VEE) 0°C to +85°C −40°C to +85°C −5.7V to −4.2V −50 mA ≥2000V Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. the parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2: ESD testing conforms to MIL-STD-883, Method 3015. Commercial Version DC Electrical Characteristics (Note 3) VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = 0°C to +85°C Symbol VOH VOL VOHC VOLC VIH VIL IIL IIH Parameter Output HIGH Voltage Output LOW Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input LOW Current Input HIGH Current D2a–D2e D1a–D1e IEE Power Supply Current −69 −43 250 350 −30 mA Inputs Open µA VIN = VIH (Max) −1165 −1830 0.50 Min −1025 −1830 −1035 −1610 −870 −1475 Typ −955 −1705 Max −870 −1620 Units mV mV mV mV mV mV µA VIN =VIH (Max) or VIL (Min) VIN = VIH (Min) or VIL (Max) Guaranteed HIGH Signal for All Inputs Guaranteed LOW Signal for All Inputs VIN = VIL (Min) Conditions Loading with 50Ω to −2.0V Loading with 50Ω to −2.0V Note 3: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under “worst case” conditions. DIP AC Electrical Characteristics VEE = −4.2V to −5.7V, VCC = VCCA = GND Symbol tPLH tPHL tPLH tPHL tPLH tPHL tTLH tTHL Parameter Propagation Delay D2a–D2e to O, O Propagation Delay D1a–D1e to O, O Propagation Delay Data to F Transition Time 20% to 80%, 80% to 20% TC = 0°C Min 0.55 0.55 1.15 0.35 Max 1.90 1.70 2.75 1.20 TC = +25°C Min 0.55 0.55 1.15 0.35 Max 1.80 1.60 2.75 1.20 TC = +85°C Min 0.55 0.55 1.15 0.35 Max 1.90 1.70 3.00 1.20 Units ns ns ns ns Conditions Figures 1, 2 www.fairchildsemi.com 2 100307 Commercial Version (Continued) PLCC AC Electrical Characteristics VEE = −4.2V to −5.7V, VCC = VCCA = GND Symbol tPLH tPHL tPLH tPHL tPLH tPHL tTLH tTHL Parameter Propagation Delay D2a–D2e to O, O Propagation Delay D1a–D1e to O, O Propagation Delay Data to F Transition Time 20% to 80%, 80% to 20% TC = 0°C Min 0.55 0.55 1.15 0.35 Max 1.70 1.50 2.55 1.10 TC = +25°C Min 0.55 0.55 1.15 0.35 Max 1.60 1.40 2.55 1.10 TC = +85°C Min 0.55 0.55 1.15 0.35 Max 1.70 1.50 2.80 1.10 Units ns ns Figures 1, 2 ns ns Conditions Industrial Version PLCC DC Electrical Characteristics (Note 4) VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = −40°C to +85°C Symbol VOH VOL VOHC VOLC VIH VIL IIL IIH Parameter Output HIGH Voltage Output LOW Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input LOW Current Input HIGH Current D2a–D2e D1a–D1e IEE Power Supply Current −69 250 350 −30 −69 250 350 −30 mA Inputs Open µA VIN = VIH(Max) −1170 −1830 0.50 TC = −40°C Min −1085 −1830 −1095 −1565 −870 −1480 −1165 −1830 0.50 Max −870 −1575 TC = 0°C to +85°C Min −1025 −1830 −1035 −1610 −870 −1475 Max −870 −1620 Units mV mV mV mV mV mV µA VIN = VIH(Max) or VIL(Min) VIN = VIH(Min) or VIL(Max) Conditions Loading with 50Ω to −2.0V Loading with 50Ω to −2.0V Guaranteed HIGH Signal for All Inputs Guaranteed LOW Signal for All Inputs VIN = VIL(Min) Note 4: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under “worst case” conditions. PLCC AC Electrical Characteristics VEE = −4.2V to −5.7V, VCC = VCCA = GND Symbol tPLH tPHL tPLH tPHL tPLH tPHL tTLH tTHL Parameter Propagation Delay D2a–D2e to O, O Propagation Delay D1a–D1e to O, O Propagation Delay Data to F Transition Time 20% to 80%, 80% to 20% TC = −40°C Min 0.45 0.45 1.05 0.35 Max 1.70 1.50 2.55 1.10 TC = +25°C Min 0.55 0.55 1.15 0.35 Max 1.60 1.40 2.55 1.10 TC = +85°C Min 0.55 0.55 1.15 0.35 Max 1.70 1.50 2.80 1.10 ns ns Figures 1, 2 ns ns Units Conditions 3 www.fairchildsemi.com 100307 Test Circuitry Notes: VCC, VCCA = +2V, VEE = −2.5V L1 and L2 = equal length 50Ω impedance lines RT = 50Ω terminator internal to scope Decoupling 0.1 µF from GND to VCC and VEE All unused outputs are loaded with 50Ω to GND CL = Fixture and stray capacitance ≤ 3 pF FIGURE 1. AC Test Circuit Switching Waveforms FIGURE 2. Propagation Delay and Transition Times www.fairchildsemi.com 4 100307 Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide Package Number N24E 5 www.fairchildsemi.com 100307 Low Power Quint Exclusive OR/NOR Gate Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Package Number V28A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 6 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com