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100314

100314

  • 厂商:

    FAIRCHILD(仙童半导体)

  • 封装:

  • 描述:

    100314 - Low Power Quint Differential Line Receiver - Fairchild Semiconductor

  • 数据手册
  • 价格&库存
100314 数据手册
100314 Low Power Quint Differential Line Receiver February 1990 Revised August 2000 100314 Low Power Quint Differential Line Receiver General Description The 100314 is a monolithic quint differential line receiver with emitter-follower outputs. An internal reference supply (VBB) is available for single-ended reception. When used in single-ended operation the apparent input threshold of the true inputs is 25 mV to 30 mV higher (positive) than the threshold of the complementary inputs. Unlike other F100K ECL devices, the inputs do not have input pull-down resistors. Active current sources provide common-mode rejection of 1.0V in either the positive or negative direction. A defined output state exists if both inverting and non-inverting inputs are at the same potential between VEE and VCC. The defined state is logic HIGH on the Oa–Oe outputs. Features s 35% power reduction of the 100114 s 2000V ESD protection s Pin/function compatible with 100114 s Voltage compensated operating range = −4.2V to −5.7V s Available to industrial grade temperature range (PLCC package only) Ordering Code: Order Number 100314SC 100314PC 100314QC 100314QI Package Number M24B N24E V28A V28A Package Description 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Industrial Temperature Range (−40°C to +85°C) Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagrams 24-Pin DIP/SOIC 28-Pin PLCC Pin Descriptions Pin Names Da–De Da–De Oa–Oe Oa–Oe Data Inputs Inverting Data Inputs Data Outputs Complementary Data Outputs Description © 2000 Fairchild Semiconductor Corporation DS010260 www.fairchildsemi.com 100314 Absolute Maximum Ratings(Note 1) Storage Temperature (TSTG) Maximum Junction Temperature (TJ) Pin Potential to Ground Pin (VEE) Input Voltage (DC) Output Current (DC Output HIGH) ESD (Note 2) −65°C to +150 °C +150 °C −7.0V to +0.5V VEE to +0.5V Recommended Operating Conditions Case Temperature (TC) Commercial Industrial Supply Voltage (VEE) 0°C to +85°C −40°C to +85°C −5.7V to −4.2V −50 mA ≥2000V Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2: ESD testing conforms to MIL-STD-883, Method 3015. Commercial Version DC Electrical Characteristics (Note 3) VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = 0°C to +85°C Symbol VOH VOL VOHC VOLC VBB VDIFF VCM VIH Parameter Output HIGH Voltage Output LOW Voltage Output HIGH Voltage Output LOW Voltage Output Reference Voltage Input Voltage Differential Common Mode Voltage Single-Ended Input HIGH Voltage VIL Single-Ended Input LOW Voltage IIL IIH ICBO Input LOW Current Input HIGH Current Input Leakage Current −10 −60 −30 −1830 0.50 240 −1530 mV µA µA µA −1110 −870 mV −1380 150 VCC − 2.0 VCC − 0.5 −1320 Min −1025 −1830 −1035 −1610 −1260 Typ −955 −1705 Max −870 −1620 Units mV mV mV mV mV mV V Guaranteed HIGH Signal for All Inputs (with one input tied to VBB) VBB (Max) + V DIFF Guaranteed LOW Signal for All Inputs (with one input tied to VBB) VBB (Min) − VDIFF VIN = VIL (Min) VIN = VIH (Max), Da–De = VBB, Da–De = VIL(Min) VIN = VEE, Da–De = V BB, Da–De = VIL (Min) IEE Power Supply Current mA Da–De = VBB, Da–De = VIL (Min) VIN = VIH (Max) or VIL (Min) VIN = VIH or VIL (Max) IVBB = −250 µA Required for Full Output Swing Conditions Loading with 50Ω to −2.0V Loading with 50Ω to −2.0V Note 3: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under “worst case” conditions. www.fairchildsemi.com 2 100314 Commercial Version (Continued) DIP AC Electrical Characteristics VEE = −4.2V to −5.7V, VCC = VCCA = GND Symbol fMAXFS fMAXRS tPLH tPHL tTLH tTHL Parameter Toggle Frequency (Full Swing) Toggle Frequency (Reduced Swing) Propagation Delay Data to Output Transition Time 20% to 80%, 80% to 20% TC = 0°C Min 250 700 0.65 0.35 1.90 1.20 Max TC = +25°C Min 250 700 0.65 0.35 2.00 1.20 Max TC = +85°C Min 250 700 0.70 0.35 2.00 1.20 Max MHz MHz ns Figures 1, 2 ns (Note 2) (Note 3) Units Conditions SOIC and PLCC AC Electrical Characteristics VEE = −4.2V to −5.7V, VCC = VCCA = GND Symbol fMAXFS fMAXRS tPLH tPHL tTLH tTHL tPLH tPHL tOSHL Parameter Toggle Frequency (Full Swing) Toggle Frequency (Reduced Swing) Propagation Delay Data to Output Transition Time 20% to 80%, 80% to 20% Propagation Delay Data to Output Maximum Skew Common Edge Output-to-Output Variation Data to Output Path tOSLH Maximum Skew Common Edge Output-to-Output Variation Data to Output Path tOST Maximum Skew Opposite Edge Output-to-Output Variation Data to Output Path tPS Maximum Skew Pin (Signal) Transition Variation Data to Output Path Note 4: M aximum toggle frequency at which VOH and VOL DC specifications are maintained. Note 5: M aximum toggle frequency at which outputs maintain 150 mV swing. Note 6: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same packaged device. The specifications apply to any outputs switching in the same direction either HIGH-to-LOW (tOSHL), or LOW-to-HIGH (tOSLH), or in opposite directions both HL and LH (tOST ). Parameters tOST and tPS guaranteed by design. Note 7: All skews calculated using input crossing point to output crossing point propagation delays. TC = 0°C Min 250 700 0.65 0.35 0.70 1.70 1.10 1.50 Max TC = +25°C Min 250 700 0.65 0.35 0.80 1.80 1.10 1.60 Max TC = +85°C Min 250 700 0.70 0.35 0.90 1.80 1.10 1.80 Max Units Conditions MHz MHz ns (Note 4) (Note 5) Figures 1, 2 ns ns PLCC only PLCC only 280 280 280 ps (Note 6)(Note 7) PLCC only 330 330 330 ps (Note 6)(Note 7) PLCC only 330 330 330 ps (Note 6)(Note 7) PLCC only 320 320 320 ps (Note 6)(Note 7) 3 www.fairchildsemi.com 100314 Industrial Version PLCC DC Electrical Characteristics (Note 8) VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = −40°C to +85°C TC = −40°C Symbol Parameter Min Max VOH VOL VOHC VOLC VBB VDIFF VCM VIH Output HIGH Voltage Output LOW Voltage Output HIGH Voltage Output LOW Voltage Output Reference Voltage Input Voltage Differential Common Mode Voltage Single-Ended Input HIGH Voltage VIL Single-Ended Input LOW Voltage IIL IIH ICBO Input LOW Current Input HIGH Current Input Leakage Current −10 −60 −30 −1830 0.50 240 −10 −60 −30 −1535 −1830 0.50 240 −1530 mV µA µA µA −1115 −870 −1110 −870 mV −1395 150 −1085 −1830 −1095 −1565 −1255 −1380 150 −870 −1575 TC = 0°C to +85°C Min −1025 −1830 −1035 −1610 −1260 Max −870 −1620 Units mV mV mV mV mV mV V Guaranteed HIGH Signal for All Inputs (with one input tied to VBB) VBB (Max) + VDIFF Guaranteed LOW Signal for All Inputs (with one input tied to VBB) VBB (Min) − VDIFF VIN = VIL (Min) VIN = VIH (Max), Da–De = VBB, Da–De = VIL (Min) VIN = VEE, Da–De = VBB Da–De = VIL (Min) IEE Power Supply Current mA Da–De = VBB, Da–De = VIL (Min) Conditions VIN = VIH (Max) or VIL (Min) VIN = VIH or VIL (Min) IVBB = −250 µA Required for Full Output Swing Loading with 50Ω to −2.0V Loading with 50Ω to −2.0V VCC − 2.0 VCC − 0.5 VCC − 2.0 VCC − 0.5 Note 8: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under “worst case” conditions. PLCC AC Electrical Characteristics VEE = −4.2V to −5.7V, VCC = VCCA = GND Symbol fMAXFS fMAXRS tPLH tPHL tTLH tTHL Parameter Toggle Frequency (Full Swing) Toggle Frequency (Reduced Swing) Propagation Delay Data to Output Transition Time 20% to 80%, 80% to 20% TC = −40°C Min 250 700 0.65 0.20 1.70 1.40 Max TC = +25°C Min 250 700 0.65 0.35 1.80 1.10 Max TC = +85°C Min 250 700 0.70 0.35 1.80 1.10 Max Units MHz MHz ns Figures 1, 2 ns Conditions (Note 9) (Note 10) Note 9: Maximum toggle frequency at which VOH and VOL DC specifications are maintained. Note 10: Maximum toggle frequency at which outputs maintain 150 mV swing. www.fairchildsemi.com 4 100314 Test Circuit Note: • • • • • • VCC, VCCA = +2V, VEE = −2.5V L1 and L2 = equal length 50Ω impedance lines RT = 50Ω terminator internal to scope Decoupling 0.1 µF from GND to VCC and VEE All unused outputs are loaded with 50Ω to GND CL = Fixture and stray capacitance ≤ 3 pF FIGURE 1. AC Test Circuit Switching Waveforms FIGURE 2. Propagation Delay and Transition Times 5 www.fairchildsemi.com 100314 Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M24B 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide Package Number N24E www.fairchildsemi.com 6 100314 Low Power Quint Differential Line Receiver Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Package Number V28A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 7 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com www.fairchildsemi.com
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