100315

100315 Low Skew Quad Clock Driver September 1991 Revised November 1999 100315 Low Skew Quad Clock Driver General Description The 100315 contains four low skew differential drivers, designed for generation of multiple, minimum skew differential clocks from a single differential input. This device also has the capability to select a secondary single-ended clock source for use in lower frequency system level testing. The 100315 is a 300 Series redesign of the 100115 clock driver. Features s Low output-to-output skew (≤50 ps) s Differential inputs and outputs s Secondary clock available for system level testing s 2000V ESD protection s Voltage compensated operating range: −4.2V to −5.7V Ordering Code: Order Number 100315SC Package Number M16A Package Descriptions 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Diagram Connection Diagram Pin Descriptions Pin Names CLKIN, CLKIN CLK1–4, CLK1–4 TCLK CLKSEL Description Differential Clock Inputs Differential Clock Outputs Test Clock Input (Note 1) Clock Input Select (Note 1) Truth Table CLKSEL L L H H CLKIN L H X X CLKIN H L X X TCLK X X L H CLKn L H L H CLKn H L H L Note 1: TCLK and CLKSEL are single-ended inputs, with internal 50 kΩ pull-down resistors. L = LOW Voltage Level H = HIGH Voltage Level X = Don't Care © 1999 Fairchild Semiconductor Corporation DS010960 www.fairchildsemi.com 100315 Absolute Maximum Ratings(Note 2) Storage Temperature Maximum Junction Temperature (TJ) Case Temperature under Bias (TC) VEE Pin Potential to Ground Pin Input Voltage (DC) Output Current (DC Output HIGH) Operating Range (Note 2) ESD (Note 3) −65°C to +150 °C +150 °C 0°C to +85°C −7.0V to +0.5V VCC to +0.5V −50 mA −5.7V to −4.2V ≥2000V Recommended Operating Conditions Case Temperature (TC) Supply Voltage (VEE) 0°C to +85°C −5.7V to −4.2V Note 2: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 3: ESD testing conforms to MIL-STD-883, Method 3015. DC Electrical Characteristics (Note 4) VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = 0°C to +85°C Symbol VOH VOL VOHC VOLC VIH VIL IIL IIH Parameter Output HIGH Voltage Output LOW Voltage Output HIGH Voltage Output LOW Voltage Single-Ended Input HIGH Voltage Single-Ended Input LOW Voltage Input LOW Current Input HIGH Current CLKIN, CLKIN TCLK CLKSEL VDIFF VCM ICBO IEE Input Voltage Differential Common Mode Voltage Input Leakage Current Power Supply Current 150 VCC − 2V −10 −67 −35 VCC − 0.5V 150 250 250 µA µA µA mV V µA mA VIN = VEE Required for Full Output Swing VIN = VIH(Max) −1165 −1830 0.50 Min −1025 −1830 −1035 −1610 −870 −1475 mV mV µA Typ −955 −1705 Max −870 −1620 mV Units mV VIN = VIH(Max) or VIL(Min) VIN = VIH(Min) or VIL(Max) Conditions Loading with 50Ω to −2.0V Loading with 50Ω to −2.0V Guaranteed HIGH Signal for All Inputs Guaranteed LOW Signal for All Inputs VIN = VIL(Min) Note 4: The specified limits represent the “worst case” value for the parameter. Since these “worst case” values normally occur at the temperature extremes, additional noise immunity and guard banding can be achieved by decreasing the allowable system operating ranges. AC Electrical Characteristics VEE = −4.2V to −4.8, VCC = VCCA = GND Symbol fMAX tPLH tPHL Parameter Maximum Clock Frequency Propagation Delay CLKIN, CLKIN to CLK(1–4), CLK(1–4) Differential Single-Ended tPLH tPHL tPLH tPHL tTLH tTHL tOST DIFF Propagation Delay, TCLK to CLK(1–4), CLK(1–4) Propagation Delay, CLKSEL to CLK(1–4), CLK(1–4) Transition Time 20% to 80%, 80% to 20% Maximum Skew Opposite Edge Output-to-Output Variation Data to Output Path Note 5: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same packaged device. The specifications apply to any outputs switching in the same direction either HIGH-to-LOW (tOSHL), or LOW-to-HIGH (tOSLH), or in opposite directions both HL and LH (tOST). Parameters tOST and tPS guaranteed by design. TC = 0°C Min 750 Max TC = +25°C Min 750 Max TC = +85°C Min 750 Max Units MHz Conditions 0.59 0.59 0.50 0.80 0.30 0.79 0.99 1.20 1.60 0.80 0.62 0.62 0.50 0.80 0.30 0.82 1.02 1.20 1.60 0.80 0.67 0.67 0.50 0.80 0.30 0.87 1.07 1.20 1.60 0.80 ns Figures 1, 3 ns ns ns Figures 1, 2 Figures 1, 2 Figures 1, 4 50 50 50 ps (Note 5) www.fairchildsemi.com 2 100315 Test Circuit Note: Shown for testing CLKIN to CLK1 in the differential mode. L1, L2, L3 and L4 = equal length 50Ω impedance lines. All unused inputs and outputs are loaded with 50Ω in parallel with ≤3 pF to GND. Scope should have 50Ω input terminator internally. FIGURE 1. AC Test Circuit Switching Waveforms FIGURE 2. Propagation Delay, TCLK, CLKSEL to Outputs FIGURE 3. Propagation Delay, CLKIN/CLKIN to Outputs FIGURE 4. Transition Times 3 www.fairchildsemi.com 100315 Low Skew Quad Clock Driver Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 4 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com