100360 Low Power Dual Parity Checker/Generator
March 1998 Revised August 2000
100360 Low Power Dual Parity Checker/Generator
General Description
The 100360 is a dual parity checker/generator. Each half has nine inputs; the output is HIGH when an even number of inputs are HIGH. One of the nine inputs (Ia or Ib) has the shorter through-put delay and is therefore preferred as the expansion input for generating parity for 16 or more bits. The 100360 also has a Compare (C) output which allows the circuit to compare two 8-bit words. The C output is LOW when the two words match, bit for bit. All inputs have 50 kΩ pull-down resistors.
Features
s Lower power than 100160 s 2000V ESD protection s Pin/function compatible with 100160 s Voltage compensated operating range = −4.2V to −5.7V s Min to Max propagation delay 35% tighter than 100160 s Available to industrial grade temperature range
Ordering Code:
Order Number 100360PC 100360QC 100360QI Package Number N24E V28A V28A Package Description 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Industrial Temperature Range (−40°C to +85°C)
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagrams
24-Pin DIP
Pin Descriptions
Pin Names Ia, Ib, Ina, Inb Za, Zb C Description Data Inputs Parity Odd Outputs Compare Output
Truth Table
(Each Half) Sum of HIGH Inputs Even Odd Output Z HIGH LOW 28-Pin PLCC
Comparator Function
C = (I0a ⊕ I1a) + (I2a ⊕ I3a) + (I4a ⊕ I5a) + (I6a ⊕ I7a) + (I0b ⊕ I1b) + (I2b ⊕ I3b) + (I4b ⊕ I5b) + (I6b ⊕ I7b)
© 2000 Fairchild Semiconductor Corporation
DS010611
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100360
Logic Diagram
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100360
Absolute Maximum Ratings(Note 1)
Storage Temperature (TSTG) Maximum Junction Temperature (TJ) VEE Pin Potential to Ground Pin Input Voltage (DC) Output Current (DC Output HIGH) ESD (Note 2)
−65°C to +150°C +150°C −7.0V to +0.5V
VEE to +0.5V
Recommended Operating Conditions
Case Temperature (TC) Commercial Industrial Supply Voltage (VEE) 0°C to +85°C
−40°C to +85°C −5.7V to −4.2V
−50 mA ≥2000V
Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2: ESD testing conforms to MIL-STD-883, Method 3015.
Commercial Version DC Electrical Characteristics (Note 3)
VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = 0°C to +85°C Symbol VOH VOL VOHC VOLC VIH VIL IIL IIH Parameter Output HIGH Voltage Output LOW Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input LOW Current Input HIGH Current Ia, Ib Ina, Inb IEE Power Supply Current −100 340 240 −50 mA Inputs OPEN µA VIN = VIH (Max) −1165 −1830 0.50 Min −1025 −1830 −1035 −1610 −870 −1475 Typ −955 −1705 Max −870 −1620 Units mV mV mV mV µA VIN = VIH (Max) or VIL (Min) VIN = VIH (Min) or VIL (Max) Guaranteed HIGH Signal for All Inputs Guaranteed LOW Signal for All Inputs VIN = VIL (Min) Conditions Loading with 50Ω to −2.0V Loading with 50Ω to −2.0V
Note 3: The specified limits represent the ''worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under “worst case” conditions.
DIP AC Electrical Characteristics
VEE = −4.2V to −5.7V, VCC = VCCA = GND Symbol tPLH tPHL tPLH tPHL tPLH tPHL tTLH tTHL Parameter Propagation Delay Ina, Inb to Za, Zb Propagation Delay Ina, Inb to C Propagation Delay Ia, Ib to Za, Zb Transition Time 20% to 80%, 80% to 20% TC = 0°C Min 1.10 1.10 0.50 0.35 Max 2.75 2.80 1.20 1.10 TC = +25°C Min 1.10 1.10 0.60 0.35 Max 2.75 2.80 1.30 1.10 TC = +85°C Min 1.10 1.10 0.60 0.35 Max 2.75 2.80 1.30 1.10 Units ns ns ns ns Conditions
Figures 1, 2
3
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100360
Commercial Version (Continued) PLCC AC Electrical Characteristics
VEE = −4.2V to −5.7V, VCC = VCCA = GND Symbol tPLH tPHL tPLH tPHL tPLH tPHL tTLH tTHL Parameter Propagation Delay Ina, Inb to Za, Zb Propagation Delay Ina, Inb to C Propagation Delay Ia, Ib to Za, Zb Transition Time 20% to 80%, 80% to 20% TC = 0°C Min 1.10 1.10 0.50 0.35 Max 2.75 2.80 1.20 1.10 TC = +25°C Min 1.10 1.10 0.60 0.35 Max 2.75 2.80 1.30 1.10 TC = +85°C Min 1.10 1.10 0.60 0.35 Max 2.75 2.80 1.30 1.10 ns ns Figures 1, 2 ns ns Units Conditions
Industrial Version PLCC DC Electrical Characteristics (Note 4)
VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = −40°C to +85°C Symbol VOH VOL VOHC VOLC VIH VIL IIL IIH Parameter Output HIGH Voltage Output LOW Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input LOW Current Input HIGH Current Ia , Ib Ina, Inb IEE Power Supply Current −100 340 240 −50 −100 340 240 −50 mA Inputs OPEN µA VIN = VIH (Max) −1170 −1830 0.50 TC = −40°C Min −1085 −1830 −1095 −1565 −870 −1480 −1165 −1830 0.50 Max −870 −1575 TC = 0°C to +85°C Min −1025 −1830 −1035 −1610 −870 −1475 Max −870 −1620 Units mV mV mV mV mV mV µA Conditions VIN =VIH (Max) or VIL (Min) VIN = VIH (Min) or VIL (Max) for All Inputs Guaranteed LOW Signal for All Inputs VIN = VIL (Min) Loading with 50Ω to −2.0V Loading with 50Ω to −2.0V
Guaranteed HIGH Signal
Note 4: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under “worst case” conditions.
PLCC AC Electrical Characteristics
VEE = −4.2V to −5.7V, VCC = VCCA = GND Symbol tPLH tPHL tPLH tPHL tPLH tPHL tTLH tTHL Parameter Propagation Delay Ina, Inb to Za, Zb Propagation Delay Ina, Inb to C Propagation Delay Ia, Ib to Za, Zb Transition Time 20% to 80%, 80% to 20% TC = −40°C Min 1.00 1.00 0.50 0.35 Max 2.75 2.80 1.20 1.10 TC = +25°C Min 1.10 1.10 0.60 0.35 Max 2.75 2.80 1.30 1.10 TC = +85°C Min 1.10 1.10 0.60 0.35 Max 2.75 2.80 1.30 1.10 Units ns ns Figures 1, 2 ns ns Conditions
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100360
Test Circuitry
Notes: VCC, VCCA = +2V, VEE = −2.5V L1 and L2 = equal length 50Ω impedance lines RT = 50Ω terminator internal to scope Decoupling 0.1 µF from GND to VCC and VEE All unused outputs are loaded with 50Ω to GND CL = Fixture and stray capacitance ≤ 3 pF
FIGURE 1. AC Test Circuit
Switching Waveforms
FIGURE 2. Propagation Delay and Transition Times
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100360
Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide Package Number N24E
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100360 Low Power Dual Parity Checker/Generator
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Package Number V28A
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