100391QC

100391 Low Power Single Supply Hex TTL-to-PECL Translator July 1992 Revised August 2000 100391 Low Power Single Supply Hex TTL-to-PECL Translator General Description The 100391 is a hex translator for converting TTL logic levels to F100K PECL logic levels. The unique feature of this translator, is the ability to do this translation using only one +5V supply. The differential outputs allow each circuit to be used as an inverting/non-inverting translator, or as a differential line driver. A common enable (E), when LOW, holds all inverting outputs HIGH and all non-inverting inputs LOW. The 100391 is ideal for those mixed PECL/TTL applications which only have +5V supply available. When used in the differential mode, the 100391, due to its high common mode rejection, overcomes voltage gradients between the TTL and PECL ground systems. Features s Operates from a single +5V supply s Differential PECL outputs s 2000V ESD protection s Companion chip to 100390 hex PECL-to-TTL translator Ordering Code: Order Number 100391SC 100391PC 100391QC 100391QI Package Number M24B N24E V28A V28A Package Description 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Industrial Temperature Range (−40°C to +85°C) Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagrams 24-Pin DIP and SOIC 28-Pin PLCC Pin Descriptions Pin Names D0 - D5 Q0 - Q5 Q0 - Q5 E Description Data Inputs (TTL) Data Outputs (PECL) Inverting Data Outputs (PECL) Enable Input (TTL) © 2000 Fairchild Semiconductor Corporation DS010939 www.fairchildsemi.com 100391 Logic Symbol Logic Diagram Truth Table Inputs Dn H L H L H = HIGH Voltage Level L = LOW Voltage Level Outputs E H H L L Qn H L L L Qn L H H H www.fairchildsemi.com 2 100391 Absolute Maximum Ratings(Note 1) Storage Temperature (TSTG) Maximum Junction Temperature (TJ) Pin Potential to Ground Pin (VCC) PECL Output Current (DC Output HIGH) TTL Input Voltage (Note 2) TTL Input Current (Note 2) ESD (Last Passing Voltage) (Note 3) −65°C to +150 °C +150 °C −0.5V to +7.0V −50 mA −0.5V to +7.0V −30 mA to + 5.0 mA ≥2000V Recommended Operating Conditions Case Temperature (TC) Industrial Commercial Supply Voltage (VCC) −40°C to +85°C 0°C to +85°C 4.5V to 5.5V Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2: Either voltage limit or current limit is sufficient to protect inputs. Note 3: ESD testing conforms to MIL-STD-883, Method 3015. Commercial Version TTL-to-PECL DC Electrical Characteristics (Note 4) VCC = +5.0V ± 10%, GND = 0V, TC = 0°C to +85°C Symbol VOH VOL VOHC VOLC VIH VIL IIH IIL Parameter Output HIGH Voltage Output LOW Voltage Output HIGH Voltage Corner Point High Output LOW Voltage Corner Point Low Input HIGH Voltage Input LOW Voltage Input LOW Current Breakdown Test Input LOW Current Dn E VFCD ICC Input Clamp Diode Voltage VCC Supply Current −0.8 −4.2 −1.2 32 69 V mA IIN = −18 mA Inputs OPEN mA VIN = +0.5V 2.0 0 Min VCC− 1025 Typ VCC− 955 Max VCC− 870 Units mV mV mV VCC − 1610 5.0 0.8 10 20 mV V V µA µA Conditions VIN = VIH(max) or VIL (min) Loading with 50Ω to VCC − 2V VIN = VIH(min) or VIL (max) Loading with 50Ω to VCC − 2V Over VTTL, VEE, TC Range Over VTTL, VEE, TC Range VIN = +2.7V VIN = +5.5V VCC− 1890 VCC − 1705 VCC − 1620 VCC − 1035 Note 4: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under “worst case” conditions. PDIP AC Electrical Characteristics VCC = 5.0V ± 10% Symbol tPLH tPHL tPLH tPHL tTLH tTHL Parameter Propagation Delay Data to Output Propagation Delay Enable to Output Transition Time 20% to 80%, 80% to 20% T C = 0 °C Min 0.30 0.40 0.35 Max 1.40 1.50 1.70 TC = +25°C Min 0.35 0.45 0.35 Max 1.30 1.40 1.70 TC = +85°C Min 0.40 0.50 0.35 Max 1.30 1.40 1.70 Units ns ns ns Conditions Figures 1, 2 Figures 1, 2 Figures 1, 2 3 www.fairchildsemi.com 100391 Commercial Version (Continued) SOIC and PLCC AC Electrical Characteristics VCC = 5.0V ± 10% Symbol tPLH tPHL tPLH tPHL tTLH tTHL tOSHL Parameter Propagation Delay Data to Output Propagation Delay Enable to Output Transition Time 20% to 80%, 80% to 20% Maximum Skew Common Edge Output-to-Output Variation Data to Output Path tOSLH Maximum Skew Common Edge Output-to-Output Variation Data to Output Path tOST Maximum Skew Opposite Edge Output-to-Output Variation Data to Output Path tPS Maximum Skew Pin (Signal) Transition Variation Data to Output Path Note 5: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same packaged device. The specifications apply to any outputs switching in the same direction either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH), or in opposite directions both HL and LH (tOST). Parameters tOST and tPS guaranteed by design. T C = 0 °C Min 0.30 0.40 0.35 Max 1.40 1.50 1.70 TC = +25°C Min 0.35 0.45 0.35 Max 1.30 1.40 1.70 TC = +85°C Min 0.40 0.50 0.35 Max 1.30 1.40 1.70 Units ns ns ns Conditions Figures 1, 2 750 750 750 ps PLCC Only (Note 5) 700 700 700 ps PLCC Only (Note 5) 450 450 450 ps PLCC Only (Note 5) 525 525 525 ps PLCC Only (Note 5) www.fairchildsemi.com 4 100391 Industrial Version PLCC DC Electrical Characteristics (Note 6) VCC = +5.0V ± 10%, GND = 0V Symbol VOH VOL VOHC VOLC VIH VIL VIH IIL Parameter Output HIGH Voltage Output LOW Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input HIGH Current Breakdown Test Input LOW Current Dn E VFCD ICC Input Clamp Diode Voltage VCC Supply Current −0.8 −4.2 −1.2 29 69 −0.8 −4.2 −1.2 29 69 V mA IIN = −18 mA Inputs OPEN mV VIN = +0.5V 2.0 0 TC = −40°C Min VCC− 1085 VCC − 1095 VCC − 1565 5.0 0.8 10 20 2.0 0 Max TC = 0°C to +85°C Min Max Units mV mV mV VCC − 1610 5.0 0.8 10 20 mV V V µA µA VIN = +2.7V VIN = +5.5V Conditions VIN = VIH(max) or VIL (min) Loading with 50Ω to VCC − 2V VIN = VIH(min) or VIL(max) Loading with 50Ω to VCC − 2V VCC − 870 VCC − 1025 VCC − 870 VCC − 1035 VCC − 1830 VCC − 1575 VCC − 1830 VCC − 1620 Note 6: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under “worst case” conditions. PLCC AC Electrical Characteristics VCC = +5.0V ± 10%, GND = 0V Symbol tPLH tPHL tPLH tPHL tTLH tTHL Parameter Propagation Delay Data to Output Propagation Delay Enable to Output Transition Time 20% to 80%, 80% to 20% TC = −40°C Min 0.20 0.35 0.35 Max 1.50 1.60 1.70 TC = +25°C Min 0.35 0.45 0.35 Max 1.30 1.40 1.70 TC = +85°C Min 0.40 0.50 0.35 Max 1.30 1.40 1.70 ns ns ns Figures 1, 2 Units Conditions 5 www.fairchildsemi.com 100391 Switching Waveforms FIGURE 1. Propagation Delay, Cut-Off and Transition Times Test Circuit FIGURE 2. AC Test Circuit Notes: VCC = VCCA = +2V, GNDPECL = GNGTTL = 30.V VIH = 0V, VIL = −3V L1, L2 and L3 = equal length 50Ω impedance lines RT = 50Ω terminator internal to scope Decoupling 0.1 µF from GND to VCC, VEE and VTTL All unused outputs are loaded with 50Ω to GND CL = Fixture and stray capacitance ≤ 3 pF www.fairchildsemi.com 6 100391 Physical Dimensions inches (millimeters) unless otherwise noted 28-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M24B 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide Package Number N24E 7 www.fairchildsemi.com 100391 Low Power Single Supply Hex TTL-to-PECL Translator Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Package Number V28A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 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