6N135

HIGH SPEED TRANSISTOR OPTOCOUPLERS SINGLE-CHANNEL: 6N135 DUAL-CHANNEL: HCPL-2530 PACKAGE 6N136 HCPL-2531 HCPL-2503 HCPL-4502 SCHEMATIC N/C 1 8 VCC +1 V F1 8 VCC 8 +2 1 7 VB _ 2 7 V01 VF _ 3 6 VO _ 3 6 V02 VF2 N/C 4 5 GND +4 5 GND 8 1 8 1 6N135, 6N136, HCPL-2503, HCPL-4502 Pin 7 is not connected in Part Number HCPL-4502 HCPL-2530/HCPL-2531 DESCRIPTION The HCPL-4502/HCPL-2503, 6N135/6 and HCPL-2530/HCPL-2531 optocouplers consist of an AlGaAs LED optically coupled to a high speed photodetector transistor. A separate connection for the bias of the photodiode improves the speed by several orders of magnitude over conventional phototransistor optocouplers by reducing the base-collector capacitance of the input transistor. An internal noise shield provides superior common mode rejection of 10kV/µs. An improved package allows superior insulation permitting a 480 V working voltage compared to industry standard of 220 V. FEATURES • • • • • • High speed-1 MBit/s Superior CMR-10 kV/µs Dual-Channel HCPL-2530/HCPL-2531 Double working voltage-480V RMS CTR guaranteed 0-70°C U.L. recognized (File # E90700) APPLICATIONS • • • • Line receivers Pulse transformer replacement Output interface to CMOS-LSTTL-TTL Wide bandwidth analog coupling © 2004 Fairchild Semiconductor Corporation Page 1 of 12 11/2/04 HIGH SPEED TRANSISTOR OPTOCOUPLERS SINGLE-CHANNEL: 6N135 DUAL-CHANNEL: HCPL-2530 6N136 HCPL-2531 HCPL-2503 HCPL-4502 ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise specified) Parameter Storage Temperature Operating Temperature Lead Solder Temperature EMITTER DC/Average Forward Input Current Peak Forward Input Current (50% duty cycle, 1 ms P.W.) Each Channel (Note 2) Peak Transient Input Current - (≤1 µs P.W., 300 pps) Each Channel Reverse Input Voltage Input Power Dissipation DETECTOR Average Output Current Peak Output Current Emitter-Base Reverse Voltage Supply Voltage Output Voltage Base Current Output power dissipation (6N135, 6N136 and HCPL-2503 only) (6N135, 6N136, HCPL-2503, HCPL-4502) (Note 4) (HCPL-2530, HCPL-2531) Each Channel Each Channel Each Channel (6N135, 6N136 and HCPL-2503 only) IO (avg) IO (pk) VEBR VCC VO IB PD 8 16 5 -0.5 to 30 -0.5 to 20 5 100 35 mA mA V V V mA mW mW Each Channel (6N135/6N136 and HCPL-2503/4502) (HCPL-2530/2531 ) Each Channel (Note 3) Each Channel (Note 1) IF (avg) IF (pk) IF (trans) VR PD 25 50 1.0 5 100 45 mA mA A V mW Symbol TSTG TOPR TSOL Value -55 to +125 -55 to +100 260 for 10 sec Units °C °C °C © 2004 Fairchild Semiconductor Corporation Page 2 of 12 11/2/04 HIGH SPEED TRANSISTOR OPTOCOUPLERS SINGLE-CHANNEL: 6N135 DUAL-CHANNEL: HCPL-2530 6N136 HCPL-2531 HCPL-2503 HCPL-4502 ELECTRICAL CHARACTERISTICS (TA = 0 to 70°C Unless otherwise specified) INDIVIDUAL COMPONENT CHARACTERISTICS Parameter EMITTER Input Forward Voltage Input Reverse Breakdown Voltage Temperature coefficient of forward voltage DETECTOR (IF = 0 mA, VO = VCC = 5.5 V) (TA =25°C) Logic high output current (IF = 0 mA, VO = VCC = 15 V) (TA =25°C) (IF = 0 mA, VO = VCC = 15 V) (IF = 16 mA, VO = Open) (VCC = 15 V) (IF1 = IF2 = 16 mA, VO = Open) (VCC = 15 V) (IF = 0 mA, VO = Open, VCC = 15 V) (TA =25°C) Logic high supply current ICCH IOH All 6N135 6N136 HCPL-4502 HCPL-2503 All 6N135 6N136 HCPL-4502 HCPL-2503 HCPL-2530 HCPL-2531 6N135 6N136 HCPL-4502 HCPL-2503 6N135 6N136 HCPL-4502 HCPL-2503 HCPL-2530 HCPL-2531 0.02 0.001 0.5 Test Conditions (IF = 16 mA, TA =25°C) (IF = 16 mA) (IR = 10 µA) (IF = 16 mA) Symbol VF BVR (∆VF/∆TA) 5.0 -1.6 Device Min Typ** Max 1.45 1.7 1.8 Unit V V mV/°C 0.005 1 µA 50 120 200 µA Logic low supply current ICCL 200 400 1 (IF = 0 mA, VO = Open) (VCC = 15 V) (IF = 0 mA, VO = Open) (VCC = 15 V) µA 2 4 ** All Typicals at TA = 25°C © 2004 Fairchild Semiconductor Corporation Page 3 of 12 11/2/04 HIGH SPEED TRANSISTOR OPTOCOUPLERS SINGLE-CHANNEL: 6N135 DUAL-CHANNEL: HCPL-2530 6N136 HCPL-2531 HCPL-2503 HCPL-4502 TRANSFER CHARACTERISTICS (TA = 0 to 70°C Unless otherwise specified) Parameter COUPLED (IF = 16 mA, VO = 0.4 V) (VCC = 4.5 V, TA =25°C) Test Conditions Symbol Device 6N135 HCPL-2530 6N136 HCPL-4502 HCPL-2531 HCPL-2503 Current transfer ratio (Note 5) (IF = 16 mA, VCC = 4.5 V) VOL=0.4V VOL=0.5V VOL=0.4V VOL=0.5V VOL=0.4V (IF = 16 mA, IO = 1.1 mA) (VCC = 4.5 V, TA =25°C) (IF = 16 mA, IO = 3 mA) (VCC = 4.5 V, TA =25°C) (IF = 16 mA, IO = 0.8 mA) (VCC = 4.5 V) (IF = 16 mA, IO = 2.4 mA) (VCC = 4.5 V) ** All Typicals at TA = 25°C CTR 6N135 HCPL-2530 6N136 HCPL-4502 HCPL-2531 HCPL-2503 6N135 HCPL-2530 6N136 HCPL-2503 VOL HCPL-2531 6N135 HCPL-2530 HCPL-4502 HCPL-2531 9 30 0.18 0.18 0.25 0.25 0.4 0.5 0.4 0.5 0.5 0.5 V % Min 7 Typ** 18 Max 50 Unit % 19 12 5 27 27 21 50 % % % 15 30 % Logic low output voltage output voltage © 2004 Fairchild Semiconductor Corporation Page 4 of 12 11/2/04 HIGH SPEED TRANSISTOR OPTOCOUPLERS SINGLE-CHANNEL: 6N135 DUAL-CHANNEL: HCPL-2530 6N136 HCPL-2531 HCPL-2503 HCPL-4502 SWITCHING CHARACTERISTICS (TA = 0 to 70°C unless otherwise specified., VCC = 5 V) Parameter Test Conditions TA = 25°C, (RL = 4.1 kΩ, IF = 16 mA) (Note 6) (Fig. 7) (RL = 1.9 kΩ, IF = 16 mA) (Note 7) (Fig. 7) TA = 25°C Propagation delay time to logic low (RL = 4.1 kΩ, IF = 16 mA) (Note 6) (Fig. 7) TPHL Symbol Device 6N135 HCPL-2530 6N136 HCPL-4502 HCPL-2503 HCPL-2531 6N135 HCPL-2530 6N136 HCPL-4502 HCPL-2503 HCPL-2531 6N135 HCPL-2530 6N136 HCPL-4502 HCPL-2503 HCPL-2531 6N135 HCPL-2530 6N136 HCPL-4502 HCPL-2503 HCPL-2531 6N135 HCPL-2530 |CMH| 6N136 HCPL-4502 HCPL-2503 HCPL-2531 6N135 HCPL-2530 |CML| 6N136 HCPL-4502 HCPL-2503 HCPL-2531 10,000 0.5 Min Typ** 0.45 Max Unit 1.5 µs 0.45 0.8 µs 2.0 µs (RL = 1.9 kΩ, IF = 16 mA) (Note 7) (Fig. 7) 1.0 µs TA = 25°C, (RL = 4.1 kΩ, IF = 16 mA) (Note 6) (Fig. 7) (RL = 1.9 kΩ, IF = 16 mA) (Note 7) (Fig. 7) TA = 25°C Propagation delay time to logic high TPLH (RL = 4.1 kΩ, IF = 16 mA) (Note 6) (Fig. 7) 1.5 µs 0.3 0.8 µs 2.0 µs (RL = 1.9 kΩ, IF = 16 mA) (Note 7) (Fig. 7) (IF = 0 mA, VCM = 10 VP-P, RL = 4.1 kΩ) (Note 8) (Fig. 8) TA = 25°C (IF = 0 mA, VCM = 10 VP-P) TA = 25°C, (RL = 1.9 kΩ) (Note 8) (Fig. 8) (IF = 16 mA, VCM = 10 VP-P, RL = 4.1 kΩ) (Note 8) (Fig. 8) TA = 25°C (IF = 16 mA, VCM = 10 VP-P) (RL = 1.9 kΩ) (Note 8) (Fig. 8) 1.0 µs Common mode transient immunity at logic high V/µs 10,000 V/µs Common mode transient immunity at logic low ** All Typicals at TA = 25°C 10,000 V/µs 10,000 V/µs © 2004 Fairchild Semiconductor Corporation Page 5 of 12 11/2/04 HIGH SPEED TRANSISTOR OPTOCOUPLERS SINGLE-CHANNEL: 6N135 DUAL-CHANNEL: HCPL-2530 6N136 HCPL-2531 HCPL-2503 HCPL-4502 ISOLATION CHARACTERISTICS (TA = 0 to 70°C Unless otherwise specified) Characteristics Input-output insulation leakage current Test Conditions (Relative humidity = 45%) (TA = 25°C, t = 5 s) (VI-O = 3000 VDC) (Note 9) (RH ≤ 50%, TA = 25°C) (Note 9) ( t = 1 min.) (Note 9) (VI-O = 500 VDC) (Note 9) (f = 1 MHz) (IO = 3 mA, VO = 5 V) (RH ≤ 45%, VI-I = 500 VDC) (Note 10) t = 5 s, (HCPL-2530/2531 only) (VI-I = 500 VDC) (Note 10) (HCPL-2530/2531 only) (f = 1 MHz) (Note 10) (HCPL-2530/2531 only) Symbol Min Typ** Max Unit II-O 1.0 µA Withstand insulation test voltage Resistance (input to output) Capacitance (input to output) DC Current gain Input-Input Insulation leakage current Input-Input Resistance Input-Input Capacitance VISO RI-O CI-O HFE II-I RI-I CI-I 2500 1012 0.6 150 0.005 1011 0.03 VRMS Ω pF µA Ω pF Notes 1. Derate linearly above 70°C free-air temperature at a rate of 0.8 mA/°C. 2. Derate linearly above 70°C free-air temperature at a rate of 1.6 mA/°C. 3. Derate linearly above 70°C free-air temperature at a rate of 0.9 mW/°C. 4. Derate linearly above 70°C free-air temperature at a rate of 2.0 mW/°C. 5. Current Transfer Ratio is defined as a ratio of output collector current, IO, to the forward LED input current, IF, times 100%. 6. The 4.1 kΩ load represents 1 LSTTL unit load of 0.36 mA and 6.1kΩ pull-up resistor. 7. The 1.9 kΩ load represents 1 TTL unit load of 1.6 mA and 5.6 kΩ pull-up resistor. 8. Common mode transient immunity in logic high level is the maximum tolerable (positive) dVcm/dt on the leading edge of the common mode pulse signal VCM, to assure that the output will remain in a logic high state (i.e., VO>2.0 V). Common mode transient immunity in logic low level is the maximum tolerable (negative) dVcm/dt on the trailing edge of the common mode pulse signal, VCM, to assure that the output will remain in a logic low state (i.e., VO