Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Low Input Current High Gain Split Darlington Optocouplers
July 2006
Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Low Input Current High Gain Split Darlington Optocouplers
Features
Low current - 0.5 mA Superior CTR-2000% Superior CMR-10 kV/µs CTR guaranteed 0-70°C U.L. recognized (File # E90700) VDE recognized (File # 120915) Ordering option V, e.g., 6N138V ■ Dual Channel - HCPL-2730 ■ HCPL-2731 ■ ■ ■ ■ ■ ■
tm
Description
The 6N138/9 and HCPL-2730/HCPL-2731 optocouplers consist of an AlGaAs LED optically coupled to a high gain split darlington photodetector. The split darlington configuration separating the input photodiode and the first stage gain from the output transistor permits lower output saturation voltage and higher speed operation than possible with conventional darlington phototransistor optocoupler. In the dual channel devices, HCPL-2730/HCPL2731, an integrated emitter - base resistor provides superior stability over temperature. The combination of a very low input current of 0.5 mA and a high current transfer ratio of 2000% makes this family particularly useful for input interface to MOS, CMOS, LSTTL and EIA RS232C, while output compatibility is ensured to CMOS as well as high fan-out TTL requirements. An internal noise shield provides exceptional common mode rejection of 10 kV/µs.
Applications
■ ■ ■ ■ ■ ■ Digital logic ground isolation Telephone ring detector EIA-RS-232C line receiver High common mode noise line receiver µP bus isolation Current loop receiver
Package
Schematic
N/C 1
8 VCC
+1 V
F1
8 VCC
8 1
+2 VF _ 3
7 VB
_2
7 V01
6 VO
_ VF2
3
6 V02
N/C 4
5 GND
+4
5 GND
8 1
8 1
6N138 / 6N139
HCPL-2730 / HCPL-2731
1 ©2005 Fairchild Semiconductor Corporation Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Rev. 1.0.2
www.fairchildsemi.com
Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Low Input Current High Gain Split Darlington Optocouplers
Absolute Maximum Ratings (TA = 25°C unless otherwise specified)
Parameter
Storage Temperature Operating Temperature Lead Solder Temperature (Wave solder only. See recommended reflow profile graph for SMD mounting) EMITTER DC/Average Forward Input Current Peak Forward Input Current (50% duty cycle, 1 ms P.W.) Peak Transient Input Current - (≤1 µs P.W., 300 pps) Reverse Input Voltage Input Power Dissipation DETECTOR Average Output Current Emitter-Base Reverse Voltage Supply Voltage, Output Voltage Each Channel (6N138 and 6N139) (6N138, HCPL-2730) (6N139, HCPL-2731) Output Power Dissipation Each Channel PO IO (avg) VER VCC, VO 60 0.5 -0.5 to 7 -0.5 to 18 100 mW mA V V Each Channel Each Channel Each Channel Each Channel IF (avg) IF (pk) IF (trans) VR PD 20 40 1.0 5 35 mA mA A V mW
Symbol
TSTG TOPR TSOL
Value
-55 to +125 -40 to +85 260 for 10 sec
Units
°C °C °C
Electrical Characteristics (TA = 0 to 70°C Unless otherwise specified) Individual Component Characteristics
Parameter
EMITTER Input Forward Voltage Input Reverse Breakdown Voltage
Test Conditions Symbol
TA =25°C Each channel (IF = 1.6 mA) (TA = 25°C, IR = 10 µA) Each Channel BVR (∆VF/∆TA) IOH VF
Device
All
Min Typ** Max
1.30 1.7 1.75
Unit
V
All
5.0
20
V
Temperature coefficient of forward voltage (IF = 1.6 mA) DETECTOR Logic high output current (IF = 0 mA, VO = VCC = 18 V) Each Channel (IF = 0 mA, VO = VCC = 7 V) Each Channel Logic low supply (IF = 1.6 mA, VO = Open) (VCC = 18 V) (IF1 = IF2 = 1.6 mA, VCC = 18 V) (VO1 - VO2 = Open, VCC = 7 V Logic high supply (IF = 0 mA, VO = Open, VCC = 18 V) (IF1 = IF2 = 0 mA, VCC = 18 V) (VO1 - VO2 = Open, VCC = 7 V ** All Typicals at TA = 25°C
All
-1.8
mV/°C
6N139 HCPL-2731 6N138 HCPL-2730
0.01
100
µA
0.01
250
ICCL
6N138 6N139 HCPL-2731 HCPL-2730
0.4 1.3
1.5 3
mA
ICCH
6N135 6N136 HCPL-2731 HCPL-2730
0.05 0.10
10 20
µA
2 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Rev. 1.0.2
www.fairchildsemi.com
Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Low Input Current High Gain Split Darlington Optocouplers
Transfer Characteristics (TA = 0 to 70°C Unless otherwise specified)
Parameter
COUPLED Current transfer ratio (Note 1, 2)
Test Conditions Symbol
(IF = 0.5 mA, VO = 0.4 V, VCC = 4.5 V) Each Channel (IF = 1.6 mA, VO = 0.4 V, VCC = 4.5 V) Each Channel (IF = 1.6 mA, VO = 0.4 V, VCC = 4.5 V) Each Channel CTR
Device
6N139 HCPL-2731 6N139 HCPL-2731 6N138 HCPL-2730
Min
400
Typ**
1100 3500
Max
Unit
%
500
1300 2500
%
300
1300 2500 0.08 0.01 0.4 0.4
%
Logic low output voltage output voltage (Note 2)
(IF = 0.5 mA, IO = 2 mA, VCC = 4.5 V) (IF = 1.6 mA, IO = 8 mA, VCC = 4.5 V) Each Channel (IF = 0.5 mA, IO = 15 mA, VCC = 4.5 V) Each Channel (IF = 12 mA, IO = 24 mA, VCC = 4.5 V) Each Channel (IF = 1.6 mA, IO = 4.8 mA, VCC = 4.5 V) Each Channel
VOL
6N139 6N139 HCPL-2731 6N139 HCPL-2731 6N139 HCPL-2731 6N138 HCPL-2730
V
0.13
0.4
0.20
0.4
0.10
0.4
** All Typicals at TA = 25°C
3 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Rev. 1.0.2
www.fairchildsemi.com
Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Low Input Current High Gain Split Darlington Optocouplers
Switching Characteristics (TA = 0 to 70°C unless otherwise specified., VCC = 5 V)
Parameter
Propagation delay time to logic low (Note 2) (Fig. 22)
Test Conditions Symbol
(RL = 4.7 kΩ, IF = 0.5 mA) TA = 25°C (RL = 4.7 kΩ, IF = 0.5 mA) Each Channel TA = 25°C (RL = 270 Ω, IF = 12 mA) TA = 25°C (RL = 270 Ω, IF = 12 mA) Each Channel TA = 25°C TA = 25°C (RL = 2.2 kΩ, IF = 1.6 mA) Each Channel TA = 25°C TPLH Each Channel (RL = 4.7 kΩ, IF = 0.5 mA) TA = 25°C Each Channel (RL = 270 Ω, IF = 12 mA) TA = 25°C (RL = 270 Ω, IF = 12 mA) Each Channel TA = 25°C (RL = 2.2 kΩ, IF = 1.6 mA) Each Channel (RL = 2.2 kΩ, IF = 1.6 mA) TA = 25°C Each Channel (RL = 2.2 kΩ, IF = 1.6 mA) TPHL
Device
6N139
Min
Typ** Max Unit
30 4 25 120 3 100 2 0.2 1 3 0.3 2 15 1.5 10 25 1 20 90 µs µs
HCPL-2731
6N139
HCPL-2730 HCPL-2731 6N138
HCPL-2731 HCPL-2730 6N139 HCPL-2731 6N139 HCPL-2731 6N139
Propagation delay time to logic high (Note 2) (Fig. 22)
(RL = 4.7 kΩ, IF = 0.5 mA)
12 22
60
10 1.3 7 15 5 10 50
HCPL-2730 HCPL-2731 6N138 HCPL-2730/1 6N138 HCPL-2730/1 |CMH| 6N138 6N139 HCPL-2730 HCPL-2731 |CML| 6N138 6N139 HCPL-2730 HCPL-2731 1,000 1,000
7 16 10,000
35
Common mode transient immunity at logic high
(IF = 0 mA, |VCM| = 10 VP-P) TA = 25°C, (RL = 2.2 kΩ) (Note 3) (Fig. 23) Each Channel (IF = 1.6 mA, |VCM| = 10 VP-P, RL = 2.2 kΩ) TA = 25°C, (Note 3) (Fig. 23) Each Channel
V/µs
Common mode transient immunity at logic low
10,000
V/µs
** All Typicals at TA = 25°C
4 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Rev. 1.0.2
www.fairchildsemi.com
Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Low Input Current High Gain Split Darlington Optocouplers
Isolation Characteristics (TA = 0 to 70°C Unless otherwise specified)
Characteristics
Input-output insulation leakage current
Test Conditions Symbol
(Relative humidity = 45%) (TA = 25°C, t = 5 s) (VI-O = 3000 VDC) (Note 8) (RH ≤ 50%, TA = 25°C, II-O ≤ 2 µA) (Note 4) ( t = 1 min.) (Note 4) (VI-O = 500 VDC) (Note 4, 5) (f = 1 MHz) (RH ≤ 45%, VI-I = 500 VDC) (Note 6) t = 5 s, (HCPL-2730/2731 only) (VI-I = 500 VDC) (Note 6) (HCPL-2730/2731 only) (f = 1 MHz) (Note 6) (HCPL-2730/2731 only) II-O
Min
Typ**
Max
1.0
Unit
µA
Withstand insulation test voltage Resistance (input to output) Capacitance (input to output) Input-Input Insulation leakage current Input-Input Resistance Input-Input Capacitance
VISO RI-O CI-O II-I RI-I CI-I
2500 1012 0.6 0.005 1011 0.03
VRMS Ω pF µA Ω pF
** All Typicals at TA = 25°C
Notes 1. Current Transfer Ratio is defined as a ratio of output collector current, IO, to the forward LED input current, IF, times 100%. 2. Pin 7 open. (6N138 and 6N139 only) 3. Common mode transient immunity in logic high level is the maximum tolerable (positive) dVcm/dt on the leading edge of the common mode pulse signal VCM, to assure that the output will remain in a logic high state (i.e., VO>2.0 V). Common mode transient immunity in logic low level is the maximum tolerable (negative) dVcm/dt on the trailing edge of the common mode pulse signal, VCM, to assure that the output will remain in a logic low state (i.e., VO