74ABT2240

74ABT2240 Octal Buffer/Line Driver with 25Ω Series Resistors in the Outputs March 1994 Revised November 1999 74ABT2240 Octal Buffer/Line Driver with 25Ω Series Resistors in the Outputs General Description The ABT2240 is an inverting octal buffer and line driver designed to drive the capacitive inputs of MOS memory drivers, address drivers, clock drivers, and bus-oriented transmitters/receivers. The 25Ω series resistors in the outputs reduce ringing and eliminate the need for external resistors. Features s Guaranteed latchup protection s High impedance glitch-free bus loading during entire power up and power down cycle s Nondestructive hot insertion capability Ordering Code: Order Number 74ABT2240CSC 74ABT2240CSJ 74ABT2240CMSA 74ABT2240CMTC Package Number M20B M20D MSA20 MTC20 Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending letter suffix “X” to the ordering code. Connection Diagram Pin Descriptions Pin Names OE1, OE2 D0–D7 O0–O7 Descriptions Output Enable Input (Active LOW) Data Inputs Outputs Schematic of Each Output Truth Table OE1 H L L I0–3 X H L O0–3 Z L H OE2 H L L I4–7 X H L O4–7 Z L H H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance © 1999 Fairchild Semiconductor Corporation DS011665 www.fairchildsemi.com 74ABT2240 Absolute Maximum Ratings(Note 1) Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Any Output in the Disabled or Power-off State in the HIGH State Current Applied to Output in LOW State (Max) DC Latchup Source Current (Across Comm Operating Range) Over Voltage Latchup (I/O) −300 mA 10V twice the rated IOL (mA) −0.5V to 5.5V −0.5V to VCC −65°C to +150°C −55°C to +125°C −55°C to +150°C −0.5V to +7.0V −0.5V to +7.0V −30 mA to +5.0 mA Recommended Operating Conditions Free Air Ambient Temperature Supply Voltage Minimum Input Edge Rate (∆V/∆t) Data Input Enable Input 50 mV/ns 20 mV/ns −40°C to +85°C +4.5V to +5.5V Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. DC Electrical Characteristics Symbol VIH VIL VCD VOH VOL IIH IBVI I IL VID IOZH IOZL IOS ICEX IZZ ICCH ICCL ICCZ ICCT Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Input LOW Current Input Leakage Test 2.5 2.0 0.8 1 1 7 −1 −1 Min 2.0 0.8 −1.2 Typ Max Units V V V V V V µA µA µA V µA µA mA µA µA µA mA µA mA mA µA mA/ 0.1 MHz Max Min Min Min Min Max Max Max 0.0 VCC Conditions Recognized HIGH Signal Recognized LOW Signal IIN = −18 mA IOH = −3 mA IOH = −32 mA IOL = 15 mA VIN = 2.7V (Note 3) VIN = V CC VIN = 7.0V VIN = 0.5V (Note 3) VIN = 0.0V IID = 1.9 µA All Other Pins Grounded Output Leakage Current Output Leakage Current Output Short-Circuit Current Output HIGH Leakage Current Bus Drainage Test Power Supply Current Power Supply Current Power Supply Current 10 −10 −275 50 100 50 30 50 Outputs Enabled Outputs 3-STATE Outputs 3-STATE ICCD Dynamic ICC (Note 3) No Load 1.5 1.5 50 0 − 5.5V VOUT = 2.7V; OEn = 2.0V 0 − 5.5V VOUT = 0.5V; OEn = 2.0V Max Max 0.0 Max Max Max VOUT = 0.0V VOUT = V CC VOUT = 5.5V; All Others GND All Outputs HIGH All Outputs LOW OEn = V CC All Others at VCCor GND Additional ICC/Input VI = V CC − 2.1V Enable Input VI = VCC − 2.1V Data Input VI = VCC − 2.1V All Others at VCCor GND Max Outputs OPEN OEn = GND (Note 4) One Bit Toggling, 50% Duty Cycle Note 3: Guaranteed, but not tested. Note 4: For 8 bits toggling, ICCD < 0.8 mA/MHz. www.fairchildsemi.com 2 74ABT2240 AC Electrical Characteristics TA = +25°C Symbol Parameter Min tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation Delay Data to Outputs Output Enable Time Output Disable Time 1.0 1.5 1.5 2.7 1.9 1.9 V CC = +5V CL = 50 pF Typ Max 4.9 5.3 6.6 6.9 6.4 6.4 1.0 1.5 1.5 2.7 1.9 1.9 TA = −40°C to +85°C VCC = 4.5V–5.5V CL = 50 pF Min Max 4.9 5.3 6.6 6.9 6.4 6.4 ns ns ns Units Capacitance Symbol CIN COUT (Note 5) Parameter Input Capacitance Output Capacitance Typ 5.0 9.0 Units pF pF V CC = 0V V CC = 5.0V Conditions TA = 25°C Note 5: COUT is measured at frequency f = 1 MHz, per MIL-STD-883, Method 3012. 3 www.fairchildsemi.com 74ABT2240 AC Loading *Includes jig and probe capacitance FIGURE 1. Standard AC Test Load Amplitude 3.0V Rep. Rate 1 MHz tW 500 ns FIGURE 2. Propagation Delay, Pulse Width Waveforms tr 2.5 ns tf 2.5 ns FIGURE 3. Test Input Signal Requirements AC Waveforms FIGURE 4. Propagation Delay Waveforms for Inverting and Non-Inverting Functions FIGURE 6. Test Input Signal Levels FIGURE 5. 3-STATE Output HIGH and LOW Enable and Disable Times FIGURE 7. Setup Time, Hold Time and Recovery Time Waveforms www.fairchildsemi.com 4 74ABT2240 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body Package Number M20B 5 www.fairchildsemi.com 74ABT2240 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D www.fairchildsemi.com 6 74ABT2240 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide Package Number MSA20 7 www.fairchildsemi.com 74ABT2240 Octal Buffer/Line Driver with 25Ω Series Resistors in the Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 8 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com