74ABT2244CMTC

74ABT2244 Octal Buffer/Line Driver with 25Ω Series Resistors in the Outputs March 2007 74ABT2244 Octal Buffer/Line Driver with 25Ω Series Resistors in the Outputs Features ■ Guaranteed latchup protection ■ High-impedance, glitch-free bus loading during entire tm General Description The ABT2244 is an octal buffer and line driver designed to drive the capacitive inputs of MOS memory drivers, address drivers, clock drivers, and bus-oriented transmitters/receivers. The 25Ω series resistors in the outputs reduce ringing and eliminate the need for external resistors. power up and power down cycle ■ Nondestructive, hot-insertion capability Ordering Information Order Number 74ABT2244CSC 74ABT2244CSJ 74ABT2244CMSA 74ABT2244CMTC Package Number M20B M20D MSA20 MTC20 Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices are also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering number. Pb-Free package per JEDEC J-STD-020B. Connection Diagram Schematic of Each Output Pin Descriptions Pin Names OE1, OE2 I0–I7 O0–O7 Inputs Outputs Description Output Enable Input (Active LOW) Truth Table OE1 H L L I0–3 X H L O0–3 Z H L OE2 H L L I4–7 X H L O4–7 Z H L H = HIGH Voltage Level X = Immaterial L = LOW Voltage Level ©1992 Fairchild Semiconductor Corporation 74ABT2244 Rev. 1.4 Z = High Impedance www.fairchildsemi.com 74ABT2244 Octal Buffer/Line Driver with 25Ω Series Resistors in the Outputs Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol TSTG TA TJ VCC VIN IIN VO Storage Temperature Parameter Ambient Temperature Under Bias Junction Temperature Under Bias VCC Pin Potential to Ground Pin Input Voltage(1) Input Current(1) Voltage Applied to Any Output Disabled or Power-off State HIGH State Current Applied to Output in LOW State (Max.) DC Latchup Source Current (Across Comm Operating Range) Over Voltage Latchup (I/O) Rating –65°C to +150°C –55°C to +125°C –55°C to +150°C –0.5V to +7.0V –0.5V to +7.0V –30mA to +5.0mA –0.5V to 5.5V –0.5V to VCC twice the rated IOL (mA) –300mA 10V Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol TA VCC ∆V / ∆t Supply Voltage Minimum Input Edge Rate Data Input Enable Input Parameter Free Air Ambient Temperature Rating –40°C to +85°C +4.5V to +5.5V 50mV/ns 20mV/ns ©1992 Fairchild Semiconductor Corporation 74ABT2244 Rev. 1.4 www.fairchildsemi.com 2 74ABT2244 Octal Buffer/Line Driver with 25Ω Series Resistors in the Outputs DC Electrical Characteristics Symbol VIH VIL VCD VOH VOL IIH IBVI IIL VID IOZH IOZL IOS ICEX IZZ ICCH ICCL ICCZ ICCT Power Supply Current Additional ICC/Input Outputs Enabled Outputs 3-STATE Outputs 3-STATE ICCD Dynamic ICC No Load(3) Max. Max. Max. Output Short-Circuit Current Output HIGH Leakage Current Bus Drainage Test Power Supply Current Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Input LOW Current Input Leakage Test Output Leakage Current VCC Conditions Recognized HIGH Signal Recognized LOW Signal Min. 2.0 Typ. Max. Units V 0.8 –1.2 V V V 0.8 1 1 7 –1 –1 µA µA V 10 –10 µA mA µA µA µA mA µA mA mA µA mA/ MHz V µA Min. Min. Min. Max. Max. Max. 0.0 IIN = –18mA IOH = –3mA IOH = –32mA IOL = 15mA VIN = 2.7V(3) VIN = VCC VIN = 7.0V VIN = 0.5V(3) VIN = 0.0V IID = 1.9µA, All Other Pins Grounded 475 2.5 2.0 0–5.5V VOUT = 2.7V; OEn = 2.0V VOUT = 0.5V; OEn = 2.0V Max. Max. 0.0 Max. VOUT = 0.0V VOUT = VCC VOUT = 5.5V, All Others GND All Outputs HIGH All Outputs LOW OEn = VCC, All Others at VCC or GND VI = VCC – 2.1V Enable Input VI = VCC – 2.1V Data Input VI = VCC – 2.1V, All Others at VCC or GND –100 –275 50 100 50 30 50 2.5 2.5 50 0.1 Outputs OPEN, OEn = GND(2), One-Bit Toggling, 50% Duty Cycle Notes: 1. Either voltage limit or current limit is sufficient to protect inputs. 2. For 8-bit toggling, ICCD < 0.8mA/MHz. 3. Guaranteed, but not tested. ©1992 Fairchild Semiconductor Corporation 74ABT2244 Rev. 1.4 www.fairchildsemi.com 3 74ABT2244 Octal Buffer/Line Driver with 25Ω Series Resistors in the Outputs AC Electrical Characteristics SOIC and SSOP packages. TA = +25°C, VCC = +5V, CL = 50pF Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ Output Disable Time TA = –40°C to +85°C, VCC = 4.5V–5.5V, CL = 50pF Max. 3.9 4.4 6.0 7.0 5.8 5.8 Parameter Propagation Delay, Data to Outputs Output Enable Time Min. 1.0 1.0 1.5 2.1 1.7 1.7 Typ. 2.2 2.9 3.7 4.3 3.5 3.7 Min. 1.0 1.0 1.5 2.1 1.7 1.7 Max. 3.9 4.4 6.0 7.0 5.8 5.8 Units ns ns ns Capacitance Symbol CIN COUT(4) Parameter Input Capacitance Output Capacitance Conditions (TA = 25°C) VCC = 0V VCC = 5.0V Typ. 5.0 9.0 Units pF pF Note: 4. COUT is measured at frequency f = 1MHz, per MIL-STD-883, Method 3012. ©1992 Fairchild Semiconductor Corporation 74ABT2244 Rev. 1.4 www.fairchildsemi.com 4 74ABT2244 Octal Buffer/Line Driver with 25Ω Series Resistors in the Outputs AC Loading *Includes jig and probe capacitance Figure 1. Standard AC Test Load Figure 2. Test Input Signal Levels Amplitude 3.0V Rep. Rate 1MHz tw 500ns tr 2.5ns tf 2.5ns Figure 3. Test Input Signal Requirements AC Waveforms Figure 4. Propagation Delay Waveforms for Inverting and Non-Inverting Functions Figure 5. 3-STATE Output HIGH and LOW Enable and Disable Times Figure 6. Propagation Delay, Pulse Width Waveforms Figure 7. Setup Time, Hold Time and Recovery Time Waveforms ©1992 Fairchild Semiconductor Corporation 74ABT2244 Rev. 1.4 www.fairchildsemi.com 5 74ABT2244 Octal Buffer/Line Driver with 25Ω Series Resistors in the Outputs Physical Dimensions Dimensions are in inches (millimeters) unless otherwise noted. Figure 8. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B ©1992 Fairchild Semiconductor Corporation 74ABT2244 Rev. 1.4 www.fairchildsemi.com 6 74ABT2244 Octal Buffer/Line Driver with 25Ω Series Resistors in the Outputs Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 9. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D ©1992 Fairchild Semiconductor Corporation 74ABT2244 Rev. 1.4 www.fairchildsemi.com 7 74ABT2244 Octal Buffer/Line Driver with 25Ω Series Resistors in the Outputs Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 10. 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide Package Number MSA20 ©1992 Fairchild Semiconductor Corporation 74ABT2244 Rev. 1.4 www.fairchildsemi.com 8 74ABT2244 Octal Buffer/Line Driver with 25Ω Series Resistors in the Outputs Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 11. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 ©1992 Fairchild Semiconductor Corporation 74ABT2244 Rev. 1.4 www.fairchildsemi.com 9 74ABT2244 Octal Buffer/Line Driver with 25Ω Series Resistors in the Outputs TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx Across the board. Around the world. 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FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Preliminary Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only. Rev. I24 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. No Identification Needed Full Production Obsolete Not In Production ©1992 Fairchild Semiconductor Corporation 74ABT2244 Rev. 1.4 www.fairchildsemi.com 10