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74AC521SC

74AC521SC

  • 厂商:

    FAIRCHILD(仙童半导体)

  • 封装:

  • 描述:

    74AC521SC - 8-Bit Identity Comparator - Fairchild Semiconductor

  • 数据手册
  • 价格&库存
74AC521SC 数据手册
74AC521 • 74ACT521 8-Bit Identity Comparator November 1988 Revised March 2005 74AC521 • 74ACT521 8-Bit Identity Comparator General Description The AC/ACT521 is an expandable 8-bit comparator. It compares two words of up to eight bits each and provides a LOW output when the two words match bit for bit. The expansion input IA B also serves as an active LOW enable input. Features s ICC reduced by 50% s Compares two 8-bit words in 6.5 ns typ s Expandable to any word length s 20-pin package s Outputs source/sink 24 mA s ACT521 has TTL-compatible inputs Ordering Code: Order Number 74AC521SC 74AC521SJ 74AC521MTC 74AC521PC 74ACT521SC 74ACT521SJ 74ACT521MTC 74ACT521PC Package Number M20B M20D MTC20 N20A M20B M20D MTC20 N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering table. Pb-Free package per JEDEC J-STD-020B. Logic Symbols Connection Diagram IEEE/IEC Pin Descriptions Pin Names A0–A7 B0–B7 TA OA B B Description Word A Inputs Word B Inputs Expansion or Enable Input Identity Output FACT¥ is a trademark of Fairchild Semiconductor Corporation. © 2005 Fairchild Semiconductor Corporation DS009964 www.fairchildsemi.com 74AC521 • 74ACT521 Truth Table Inputs IA L L H H H HIGH Voltage Level L LOW Voltage Level Note 1: A0 B0, A1 B1, A2 B2, etc. Logic Diagram Outputs A, B A 2 B (Note 1) A zÃ7 A 2 B (Note 1) A zÃ7 OA L H H H B B Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Applications Ripple Expansion Parallel Expansion www.fairchildsemi.com 2 74AC521 • 74ACT521 Absolute Maximum Ratings(Note 2) Supply Voltage (VCC) DC Input Diode Current (IIK) VI 2 0.5V VI 2 VCC  0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO 2 0.5V VO 2 VCC  0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current per Output Pin (ICC or IGND) Storage Temperature (TSTG) Junction Temperature (TJ) PDIP 140qC  r r        0.5V to 7.0V 20 mA 20 mA Recommended Operating Conditions Supply Voltage (VCC) AC ACT Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) Minimum Input Edge Rate (9V/9t) AC Devices VIN from 30% to 70% of VCC VCC @ 3.3V, 4.5V, 5.5V Minimum Input Edge Rate (9V/9t) ACT Devices VIN from 0.8V to 2.0V VCC @ 4.5V, 5.5V 125 mV/ns Note 2: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, output/input loading variables. Fairchild does not recommend operation of FACT¥ circuits outside databook specifications.  2.0V to 6.0V 4.5V to 5.5V 0V to VCC 0V to VCC 40qC to 85qC 0.5V to VCC  0.5V 20 mA 20 mA 0.5V to VCC  0.5V 50 mA 50 mA 125 mV/ns 65qC to 150 qC DC Electrical Characteristics for AC Symbol VIH Parameter Minimum HIGH Level Input Voltage VIL Maximum LOW Level Input Voltage VOH Minimum HIGH Level Output Voltage VCC (V) 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 VOL Maximum LOW Level Output Voltage 3.0 4.5 5.5 3.0 4.5 5.5 IIN (Note 5) IOLD IOHD ICC (Note 5) Maximum Input Leakage Current Minimum Dynamic Output Current (Note 4) Maximum Quiescent Supply Current 5.5 5.5 5.5 5.5 4.0 0.002 0.001 0.001 TA Typ 1.5 2.25 2.75 1.5 2.25 2.75 2.99 4.49 5.49 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.56 3.86 4.86 0.1 0.1 0.1 0.36 0.36 0.36 25qC TA 40qC to 85qC 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 Guaranteed Limits Units VOUT V Conditions 0.1V or VCC  0.1V VOUT 0.1V V or VCC  0.1V V IOUT VIN 50 PA V IL or VIH 2.46 3.76 4.76 0.1 0.1 0.1 V V IOH = 12 mA IOH = 24 mA IOH = 24 mA (Note 3) IOUT VIN 50 PA V IL or VIH 0.44 0.44 0.44 V IOL = 12 mA IOL = 24 mA IOL = 24 mA (Note 3) r0.1 r1.0 75 PA mA mA VI V CC, GND 1.65V Max 3.85V Min V CC VOLD VOHD VIN or GND 75 40.0 PA Note 3: All outputs loaded; thresholds on input associated with output under test. Note 4: M aximum test duration 2.0 ms, one output loaded at a time. Note 5: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC. 3 www.fairchildsemi.com 74AC521 • 74ACT521 DC Electrical Characteristics for ACT Symbol VIH VIL VOH Parameter Minimum HIGH Level Input Voltage Maximum LOW Level Input Voltage Minimum HIGH Level Output Voltage VCC (V) 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 VOL Maximum LOW Level Output Voltage 4.5 5.5 4.5 5.5 IIN ICCT IOLD IOHD ICC Maximum Input Leakage Current Maximum ICC/Input Minimum Dynamic Output Current (Note 7) Maximum Quiescent Supply Current 5.5 5.5 5.5 5.5 5.5 4.0 0.6 0.001 0.001 TA Typ 1.5 1.5 1.5 1.5 4.49 5.49 2.0 2.0 0.8 0.8 4.4 5.4 3.86 4.86 0.1 0.1 0.36 0.36 25qC TA 40qC to 85qC 2.0 2.0 0.8 0.8 4.4 5.4 3.76 4.76 0.1 0.1 0.44 0.44 Units VOUT VOUT Conditions 0.1V 0.1V Guaranteed Limits V V V or VCC  0.1V or VCC  0.1V IOUT VIN V 50 PA V IL or VIH IOH = 24 mA IOH = 24 mA (Note 6) V IOUT VIN 50 PA V IL or VIH V IOL = 24 mA IOL = 24 mA (Note 6) r0.1 r1.0 1.5 75 PA mA mA mA VI VI V CC, GND V CC  2.1V 1.65V Max 3.85V Min V CC VOLD VOHD VIN or GND 75 40.0 PA Note 6: All outputs loaded; thresholds on input associated with output under test. Note 7: Maximum test duration 2.0 ms, one output loaded at a time. AC Electrical Characteristics for AC VCC Symbol tPLH tPHL tPLH tPHL Parameter Propagation Delay An or Bn to OA An or Bn to OA IA IA to OA to OA B TA CL Min 3.5 2.5 4.5 3.0 3.0 2.5 3.0 2.0 25qC 50 pF Typ 7.0 5.0 7.5 5.5 5.5 4.0 5.5 4.0 Max 11.0 8.0 11.5 8.5 8.0 6.0 8.0 6.0 TA 40qC to 85qC CL 50 pF Max 12.0 9.0 12.5 9.0 9.0 7.0 9.0 7.0 ns ns ns ns Units (V) (Note 8) 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 Min 3.0 2.0 3.5 2.5 2.5 2.0 2.5 2.0 Propagation Delay B Propagation Delay B B Propagation Delay B B Note 8: Voltage Range 3.3 is 3.3V r 0.3V Voltage Range 5.0 is 5.0V r 0.5V www.fairchildsemi.com 4 74AC521 • 74ACT521 AC Electrical Characteristics for ACT VCC Symbol tPLH tPHL tPLH tPHL Parameter Propagation Delay An or Bn to OA An or Bn to OA IA IA to OA to OA B TA CL Min 3.0 3.0 2.0 2.5 25qC 50 pF Typ 5.5 6.0 4.0 5.0 Max 9.0 10.0 6.5 7.5 TA 40qC to 85qC CL 50 pF Max 9.5 11.0 7.0 8.0 ns ns ns ns Units (V) (Note 9) 5.0 5.0 5.0 5.0 Min 2.5 2.5 2.0 2.0 Propagation Delay B Propagation Delay B B Propagation Delay B B Note 9: Voltage Range 5.0 is 5.0V r 0.5V Capacitance Symbol CIN CPD Parameter Input Capacitance Power Dissipation Capacitance Typ 4.5 40 Units pF pF VCC VCC OPEN 5.0V Conditions 5 www.fairchildsemi.com 74AC521 • 74ACT521 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B www.fairchildsemi.com 6 74AC521 • 74ACT521 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 7 www.fairchildsemi.com 74AC521 • 74ACT521 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 www.fairchildsemi.com 8 74AC521 • 74ACT521 8-Bit Identity Comparator Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 9 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com www.fairchildsemi.com
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