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74ALVC2245

74ALVC2245

  • 厂商:

    FAIRCHILD(仙童半导体)

  • 封装:

  • 描述:

    74ALVC2245 - Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs and 26ohm S...

  • 数据手册
  • 价格&库存
74ALVC2245 数据手册
74ALVC2245 Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs and 26: Series Resistors in B Outputs February 2002 Revised March 2005 74ALVC2245 Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs and 26: Series Resistors in B Outputs General Description The ALVC2245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus oriented applications. The T/R input determines the direction of data flow. The OE input disables both the A and B ports by placing them in a high impedance state. The 74ALVC2245 is designed for low voltage (1.65V to 3.6V) VCC applications with I/O compatibility up to 3.6V. The ALVC2245 is also designed with 26: series resistance in the B Port outputs. This design reduces line noise in applications such as memory address drivers, clock drivers, and bus transceivers transmitters The 74ALVC2245 is fabricated with an advanced CMOS technology to achieve high-speed operation while maintaining low CMOS power dissipation. Features s 1.65V to 3.6V VCC supply operation s 3.6V tolerant inputs and outputs s 26: series resistors in B Port outputs s Power-off high impedance inputs and outputs s Supports Live Insertion and Withdrawal (Note 1) s tPD (A to B) 4.9 ns max for 3.0V to 3.6V VCC 6.1 ns max for 2.3V to 2.7V VCC 9.8 ns max for 1.65V to 1.95V VCC s Uses patented Quiet Series¥ noise/EMI reduction circuitry s Latchup conforms to JEDEC JED78 s ESD performance: Human body model ! 2000V Machine model ! 200V Note 1: To ensure the high impedance state during power up and power down, OEn should be tied to VCC through a pull up resistor. The minimum value of the resistor is determined by the current sourcing capability of the driver. Ordering Code: Order Number 74ALVC2245WM 74ALVC2245MTC Package Number M20B MTC20 Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Pin Descriptions Pin Names OE T/R A0–A7 B0–B7 Description Output Enable Input (Active LOW) Transmit/Receive Input Side A Inputs or 3-STATE Outputs Side B Inputs or 3-STATE Outputs Quiet Series¥ is a trademark of Fairchild Semiconductor Corporation. © 2005 Fairchild Semiconductor Corporation DS500717 www.fairchildsemi.com 74ALVC2245 Connection Diagram Truth Table Inputs Outputs OE L L H T/R L H X Bus B0–B7 Data to Bus A0–A7 Bus A0–A7 Data to Bus B0–B7 HIGH Z State on A0–A7, B0–B7 (Note 2) H H IGH Voltage Level L LOW Voltage Level X Immaterial Z High Impedance Note 2: Unused bus terminals during HIGH Z State must be held HIGH or LOW. Logic Diagram www.fairchildsemi.com 2 74ALVC2245 Absolute Maximum Ratings(Note 3) Supply Voltage (VCC ) DC Input Voltage (VI) Output Voltage (VO) (Note 4) DC Input Diode Current (IIK) VI  0V DC Output Diode Current (IOK) VO  0V DC Output Source/Sink Current (IOH/IOL) DC VCC or GND Current per Supply Pin (ICC or GND) Storage Temperature Range (TSTG) 0.5V to 4.6V 0.5V to 4.6V 0.5V to VCC 0.5V 50 mA 50 mA r50 mA r100 mA 65qC to 150qC Recommended Operating Conditions (Note 5) Power Supply Operating Input Voltage Output Voltage (VO) Free Air Operating Temperature (TA) Minimum Input Edge Rate ('t/'V) VIN 0.8V to 2.0V, VCC 3.0V 10 ns/V Note 3: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 4: IO Absolute Maximum Rating must be observed. Note 5: Floating or unused control inputs must be held HIGH or LOW. 1.65V to 3.6V 0V to VCC 0V to VCC 40qC to 85qC DC Electrical Characteristics Symbol VIH Parameter HIGH Level Input Voltage Conditions VCC (V) 1.65 - 1.95 2.3 - 2.7 2.7 - 3.6 VIL LOW Level Input Voltage 1.65 - 1.95 2.3 - 2.7 2.7 - 3.6 VOH HIGH Level Output Voltage A Outputs IOH IOH IOH IOH Min 0.65 x VCC 1.7 2.0 0.35 x VCC 0.7 0.8 VCC - 0.2 1.2 2.0 1.7 2.2 2.4 2 VCC - 0.2 1.2 1.9 1.7 2.4 2 2 0.2 0.45 0.4 0.7 0.4 0.55 0.2 0.45 0.4 0.55 0.55 0.6 0.8 V V V V Max Units 100 PA 4 mA 6 mA 12 mA 1.65 - 3.6 1.65 2.3 2.3 2.7 3.0 IOH HIGH Level Output Voltage B Outputs IOH IOH IOH IOH IOH IOH VOL LOW Level Output Voltage A Outputs IOL IOL IOL IOL IOL LOW Level Output Voltage B Outputs IOL IOL IOL IOL IOL IOL II ICC Input Leakage Current Quiescent Supply Current VI 24 mA 100 PA 2 mA 4 mA 6 mA 8 mA 12 mA 100 PA 4 mA 6 mA 12 mA 24 mA 100 PA 2 mA 4 mA 6 mA 8 mA 12 mA V CC or GND, IO 0 3.0 1.65 - 3.6 1.65 2.3 2.3 3.0 2.7 3.0 1.65 - 3.6 1.65 2.3 2.3 2.7 3.0 1.65 - 3.6 1.65 2.3 2.3 3.0 2.7 3.0 1.65 - 3.6 3.6 0 d VI d 3.6V r5.0 40 PA PA 3 www.fairchildsemi.com 74ALVC2245 DC Electrical Characteristics Symbol Parameter Increase in ICC per Input VIH (Continued) VCC (V) 2.7 - 3.6 Conditions VCC  0.6V Min Max 750 Units 'ICC PA AC Electrical Characteristics TA Symbol Parameter VCC Min tPHL, tPLH Propagation Delay 1.1 A to B ns Propagation Delay 1.1 B to A tPZL, tPZH Output Enable Time 1.1 A to B ns Output Enable Time 1.1 B to A tPLZ, tPHZ Output Disable Time 1.1 A to B ns Output Disable Time 1.1 B to A 4.1 1.3 4.5 0.8 4.0 1.5 7.2 4.7 1.3 5.2 0.8 4.7 1.5 8.5 5.0 1.3 6.1 0.8 5.6 1.5 9.8 5.5 1.3 7.1 0.8 6.6 1.5 9.8 4.0 1.3 4.7 0.8 4.2 1.5 8.4 4.9 1.3 6.1 0.8 5.6 1.5 9.8 CL 3.3V r 0.3V Max 50 pF VCC Min 2.7V Max VCC Min 40qC to 85qC, RL 500: CL 2.5 r 0.2V Max 30 pF VCC Min 1.8V r 0.15V Max Units Capacitance Symbol CIN CIO CPD Input Capacitance Input, Output Capacitance Power Dissipation Capacitance Parameter VI VO Outputs Enabled f Conditions 0V or VCC 0V or VCC 10 MHz, CL 50 pF TA VCC 3.3 3.3 3.3 2.5 25qC Typical 6 7 20 20 Units pF pF pF www.fairchildsemi.com 4 74ALVC2245 AC Loading and Waveforms TABLE 1. Values for Figure 1 TEST tPLH, tPHL tPZL, tPLZ tPZH, tPHZ SWITCH Open VL GND FIGURE 1. AC Test Circuit TABLE 2. Variable Matrix (Input Characteristics: f 1MHz; tr tf 2ns; ZO Symbol Vmi Vmo VX VY VL VCC 3.3V r 0.3V 1.5V 1.5V VOL  0.3V VOH  0.3V 6V 2.7V 1.5V 1.5V VOL  0.3V VOH  0.3V 6V 2.5 r 0.2V VCC/2 VCC/2 VOL  0.15V VOH  0.15V VCC*2 1.8V r 0.15V VCC/2 VCC/2 VOL  0.15V VOH  0.15V VCC*2 50:) FIGURE 2. Waveform for Inverting and Non-inverting Functions FIGURE 3. 3-STATE Output High Enable and Disable Times for Low Voltage Logic FIGURE 4. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic 5 www.fairchildsemi.com 74ALVC2245 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B www.fairchildsemi.com 6 74ALVC2245 Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs and 26: Series Resistors in B Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 7 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com www.fairchildsemi.com
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