74F132SC

74F132SC

  • 厂商:

    FAIRCHILD(仙童半导体)

  • 封装:

  • 描述:

    74F132SC - Quad 2-Input NAND Schmitt Trigger - Fairchild Semiconductor

  • 详情介绍
  • 数据手册
  • 价格&库存
74F132SC 数据手册
74F132 Quad 2-Input NAND Schmitt Trigger April 1988 Revised September 2000 74F132 Quad 2-Input NAND Schmitt Trigger General Description The F132 contains four 2-input NAND gates which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. In addition, they have a greater noise margin than conventional NAND gates. Each circuit contains a 2-input Schmitt Trigger followed by level shifting circuitry and a standard FAST output structure. The Schmitt Trigger uses positive feedback to effectively speed-up slow input transitions, and provide different input threshold voltages for positive and negative-going transitions. This hysteresis between the positive-going and negative-going input threshold (typically 800 mV) is determined by resistor ratios and is essentially insensitive to temperature and supply voltage variations. Ordering Code: Order Number 74F132SC 74F132SJ 74F132PC Package Number M14A M14D N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol IEEE/IEC Connection Diagram Function Table Unit Loading/Fan Out U.L. Pin Names Description An , Bn On Inputs Outputs Input IIH/IIL 20 µA/−0.6 mA A L L H H H = HIGH Voltage Level L = LOW Voltage Level Inputs B L H L H Outputs O H H H L HIGH/LOW Output IOH/IOL 1.0/1.0 50/33.3 −1 mA/20 mA FAST is a registered trademark of Fairchild Semiconductor Corporation © 2000 Fairchild Semiconductor Corporation DS009477 www.fairchildsemi.com 74F132 Absolute Maximum Ratings(Note 1) Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output 3-STATE Output Current Applied to Output in LOW State (Max) ESD Last Passing Voltage (Min) twice the rated IOL (mA) 4000V −65°C to +150°C −55°C to +125°C −55°C to +150°C −0.5V to +7.0V −0.5V to +7.0V −30 mA to +5.0 mA Recommended Operating Conditions Free Air Ambient Temperature Supply Voltage 0°C to +70°C +4.5V to +5.5V −0.5V to VCC −0.5V to +5.5V Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. DC Electrical Characteristics Symbol VT+ VT− ∆VT VCD VOH VOL IIH IBVI ICEX VID IOD IIL IOS ICCH ICCL Parameter Positive-going Threshold Negative-going Threshold Hysteresis (VT+ − VT−) Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Output HIGH Leakage Current Input Leakage Test Output Leakage Circuit Current Input LOW Current Output Short-Circuit Current Power Supply Current Power Supply Current −60 4.75 3.75 −0.6 −150 17.0 18.0 10% VCC 5% VCC 10% VCC 2.5 2.7 0.5 5.0 7.0 50 V µA µA µA V µA mA mA mA mA Min Max Max Max 0.0 0.0 Max Max Max Max Min 1.5 0.7 0.4 −1.2 Typ Max 2.0 1.1 Units V V V V V VCC 5.0 5.0 5.0 Min Min IIN = −18 mA IOH = −1 mA IOH = −1 mA IOL = 20 mA VIN = 2.7V VIN = 7.0V VOUT = VCC IID = 1.9 µA All Other Pins Grounded VIOD = 150 mV All Other Pins Grounded VIN = 0.5V VOUT = 0V VO = HIGH VO = LOW Conditions AC Electrical Characteristics TA = +25°C Symbol Parameter Min tPLH tPHL Propagation Delay An, Bn to On 4.0 5.0 VCC = +5.0V CL = 50 pF Typ Max 10.5 12.5 TA = 0°C to +70°C VCC = +5.0V CL = 50 pF Min 3.5 5.0 Max 12.0 13.0 ns Units www.fairchildsemi.com 2 74F132 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow Package Number M14A 3 www.fairchildsemi.com 74F132 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D www.fairchildsemi.com 4 74F132 Quad 2-Input NAND Schmitt Trigger Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N14A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 5 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com www.fairchildsemi.com
74F132SC
### 物料型号 - 74F132SC:M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow - 74F132SJ:M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide - 74F132PC:N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

### 器件简介 74F132包含四个2输入NAND门,接受标准TTL输入信号并提供标准TTL输出电平。它们能够将缓慢变化的输入信号转换为清晰、无抖动的输出信号,并且比传统NAND门具有更大的噪声容限。

### 引脚分配 - An, Bn:输入端,每个电路包含一个2输入Schmitt Trigger,后跟电平移动电路和一个标准的FAST输出结构。 - On:输出端,提供50/33.3 μA的输出电流。

### 参数特性 - VT+:正向阈值电压,最小1.5V,典型值2.0V。 - VT-:负向阈值电压,最小0.7V,典型值1.1V。 - AVT:滞后电压,0.4V。 - VCD:输入钳位二极管电压,最小-1.2V。 - VOH:输出高电平电压,最小2.5V。 - VOL:输出低电平电压,最小0.5V。

### 功能详解 每个电路包含一个Schmitt Trigger,使用正反馈来加速慢输入转换,并为正向和负向转换提供不同的输入阈值电压。正向和负向输入阈值之间的滞后(通常800mV)由电阻比决定,基本上不受温度和供电电压变化的影响。

### 应用信息 74F132适用于需要清晰、无抖动输出信号的应用,特别是在输入信号变化缓慢或存在噪声的情况下。

### 封装信息 - SOIC:14-Lead Small Outline Integrated Circuit,JEDEC MS-120,0.150 Narrow。 - SOP:14-Lead Small Outline Package,EIAJ TYPE II,5.3mm Wide。 - PDIP:14-Lead Plastic Dual-In-Line Package,JEDEC MS-001,0.300 Wide。
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