74F157ASJ

74F157A Quad 2-Input Multiplexer April 1988 Revised September 2000 74F157A Quad 2-Input Multiplexer General Description The F157A is a high-speed quad 2-input multiplexer. Four bits of data from two sources can be selected using the common Select and Enable inputs. The four outputs present the selected data in the true (non-inverted) form. The F157A can also be used to generate any four of the 16 different functions to two variables. Ordering Code: Order Number 74F157ASC 74F157ASJ 74F157APC Package Number M16A M16D N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC © 2000 Fairchild Semiconductor Corporation DS009483 www.fairchildsemi.com 74F157A Unit Loading/Fan Out Pin Names I0a–I0d I1a–I1d E S Za–Zd Description Source 0 Data Inputs Source 1 Data Inputs Enable Input (Active LOW) Select Input Outputs U.L. HIGH/LOW 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 50/33.3 Input IIH/IIL Output IOH/IOL 20 µA/−0.6 mA 20 µA/−0.6 mA 20 µA/−0.6 mA 20 µA/−0.6 mA −1 mA/20 mA Truth Table Inputs E H L L L L S X H H L L I0 X X X L H I1 X L H X X Output Z L L H L H Functional Description The F157A is a quad 2-input multiplexer. It selects four bits of data from two sources under the control of a common Select input (S). The Enable input (E) is active LOW. When E is HIGH, all of the outputs (Z) are forced LOW regardless of all other inputs. The F157A is the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the Select input. The logic equations for the outputs are shown below: Zn = E • (I1nS + I0n S) A common use of the F157A is the moving of data from two groups of registers to four common output busses. The particular register from which the data comes is determined by the state of the Select input. A less obvious use is as a function generator. The F157A can generate any four of the 16 different functions of two variables with one variable common. This is useful for implementing highly irregular logic. H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.fairchildsemi.com 2 74F157A Absolute Maximum Ratings(Note 1) Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output 3-STATE Output Current Applied to Output in LOW State (Max) ESD Last Passing Voltage (Min) twice the rated IOL (mA) 4000V −65°C to +150°C −55°C to +125°C −55°C to +150°C −0.5V to +7.0V −0.5V to +7.0V −30 mA to +5.0 mA Recommended Operating Conditions Free Air Ambient Temperature Supply Voltage 0°C to +70°C +4.5V to +5.5V −0.5V to VCC −0.5V to +5.5V Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. DC Electrical Characteristics Symbol VIH VIL VCD VOH VOL IIH IBVI ICEX VID IOD IIL IOS ICCH ICCL Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Output HIGH Leakage Current Input Leakage Test Output Leakage Circuit Current Input LOW Current Output Short-Circuit Current Power Supply Current Power Supply Current −60 15 15 4.75 3.75 −0.6 −150 23 23 10% VCC 5% VCC 10% VCC 2.5 2.7 0.5 5.0 7.0 50 Min 2.0 0.8 −1.2 Typ Max Units V V V V V µA µA µA V µA mA mA mA mA Min Min Min Max Max Max 0.0 0.0 Max Max Max Max VCC Conditions Recognized as a HIGH Signal Recognized as a LOW Signal IIN = −18 mA IOH = −1 mA IOH = −1 mA IOL = 20 mA VIN = 2.7V VIN = 7.0V VOUT = VCC IID = 1.9 µA All Other Pins Grounded VIOD = 150 mV All Other Pins Grounded VIN = 0.5V VOUT = 0V VO = HIGH VO = LOW AC Electrical Characteristics TA = +25°C Symbol Parameter Min tPLH tPHL tPLH tPHL tPLH tPHL Propagation Delay S to Zn Propagation Delay E to Z n Propagation Delay In t o Z n 4.0 3.0 5.0 2.5 2.5 2.5 VCC = +5.0V CL = 50 pF Typ 7.0 5.0 7.0 4.5 4.5 4.0 Max 10.0 7.0 9.5 6.5 6.0 5.5 TA = −55°C to +125°C VCC = +5.0V CL = 50 pF Min 4.0 3.0 5.0 2.5 2.5 1.5 Max 12.0 9.0 13.0 7.5 7.5 7.5 TA = 0°C to +70°C VCC = +5.0V CL = 50 pF Min 4.0 3.0 5.0 2.5 2.5 2.0 Max 11.0 8.0 11.0 7.0 6.5 7.0 ns ns ns Units 3 www.fairchildsemi.com 74F157A Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A www.fairchildsemi.com 4 74F157A Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D 5 www.fairchildsemi.com 74F157A Quad 2-Input Multiplexer Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 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