74VCXH245

74VCXH245 Low Voltage Bidirectional Transceiver with Bushold June 1999 Revised April 2005 74VCXH245 Low Voltage Bidirectional Transceiver with Bushold General Description The VCXH245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus oriented applications. The T/R input determines the direction of data flow. The OE input disables both the A and B Ports by placing them in a high impedance state. The VCXH245 data inputs include active bushold circuitry, eliminating the need for external pull-up resistors to hold unused or floating data inputs at a valid logic level. The 74VCXH245 is designed for low voltage (1.2V to 3.6V) VCC applications. The 74VCXH245 is fabricated with an advanced CMOS technology to achieve high-speed operation while maintaining low CMOS power dissipation. Features s 1.2V to 3.6V VCC supply operation s Bushold on data inputs eliminates the need for external pull-up/pull-down resistors s tPD 3.5 ns max for 3.0V to 3.6V VCC s Static Drive (IOH/IOL) r24 mA @ 3.0V VCC s Uses patented Quiet Series¥ noise/EMI reduction circuitry s Latchup performance exceeds 300 mA s ESD performance: Human body model ! 2000V Machine model ! 200V Ordering Code: Order Number 74VCXH245WM 74VCXH245MTC Package Number M20B MTC20 Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Pin Descriptions Pin Names OE T/R A0–A7 B0–B7 Description Output Enable Input (Active LOW) Transmit/Receive Input Side A Bushold Inputs or 3-STATE Outputs Side B Bushold Inputs or 3-STATE Outputs Quiet Series¥ is a trademark of Fairchild Semiconductor Corporation. © 2005 Fairchild Semiconductor Corporation DS500198 www.fairchildsemi.com 74VCXH245 Connection Diagram Truth Table Inputs Outputs OE L L H T/R L H X Bus B0–B7 Data to Bus A0–A7 Bus A0–A7 Data to Bus B0–B7 HIGH Z State on A0–A7, B0–B7 H H IGH Voltage Level L LOW Voltage Level X Immaterial Z High Impedance Logic Diagram www.fairchildsemi.com 2 74VCXH245 Absolute Maximum Ratings(Note 1) Supply Voltage (VCC) DC Input Voltage (VI) DC Output Voltage (VO) Outputs 3-STATE 0.5V to 4.6V 0.5V to 4.6V Recommended Operating Conditions (Note 3) Power Supply Operating Input Voltage Output Voltage (VO) Output in Active States Output in 3-STATE Output Current in IOH/IOL VCC VCC VCC VCC VCC 3.0V to 3.6V 2.3V to 2.7V 1.65V to 2.3V 1.4V to 1.65V 1.2V 0V to VCC 0V to 3.6V 1.2V to 3.6V 0.5V to 4.6V 0.5V to VCC  0.5V Outputs Active (Note 2) DC Input Diode Current (IIK) VI  0V 50 mA DC Output Diode Current (IOK) VO  0V VO ! VCC DC Output Source/Sink Current (IOH/IOL) DC VCC or Ground Current Storage Temperature (TSTG) 0.3V to 3.6V 50 mA 50 mA r50 mA r100 mA 65qC to 150qC Free Air Operating Temperature (TA) Minimum Input Edge Rate ('t/'V) VIN 0.8V to 2.0V, VCC 3.0V r24 mA r18 mA r6 mA r2 mA r100 PA 40qC to 85qC 10 ns/V Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2: IO Absolute Maximum Rating must be observed. Note 3: Floating or unused control inputs must be held HIGH or LOW. DC Electrical Characteristics Symbol VIH Parameter HIGH Level Input Voltage Conditions VCC (V) 2.7 - 3.6 2.3 - 2.7 1.65 - 2.3 1.4 - 1.6 1.2 VIL LOW Level Input Voltage 2.7 - 3.6 2.3 - 2.7 1.65 - 2.3 1.4 - 1.6 1.2 VOH HIGH Level Output Voltage IOH IOH IOH IOH IOH IOH IOH IOH IOH IOH IOH IOH IOH 2.0 1.6 0.65 x VCC 0.65 x VCC 0.65 x VCC 0.8 0.7 0.35 x VCC 0.35 x VCC 0.05 x VCC VCC - 0.2 2.2 2.4 2.2 VCC - 0.2 2.0 1.8 1.7 VCC - 0.2 1.25 VCC - 0.2 1.05 VCC - 0.2 V V V Min Max Units 100 PA 12 mA 18 mA 24 mA 100 PA 6 mA 12 mA 18 mA 100 PA 6 mA 100 PA 2 mA 100 PA 2.7 - 3.6 2.7 3.0 3.0 2.3 - 2.7 2.3 2.3 2.3 1.65 - 2.3 1.65 1.4 - 1.6 1.4 1.2 3 www.fairchildsemi.com 74VCXH245 DC Electrical Characteristics Symbol VOL Parameter LOW Level Output Voltage IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL II II(HOLD) Input Leakage Current Bushold Input Minimum Drive Hold Current VIN VIN VIN VIN VIN VIN VIN II(OD) Bushold Input Over-Drive Current to Change State (Continued) VCC (V) 100 PA 12 mA 18 mA 24 mA 100 PA 12 mA 18 mA 100 PA 6 mA 100 PA 2 mA 100 PA VCC or GND 0.8V 2.0V 0.7V 1.6V 0.57V 1.07V 2.7 - 3.6 2.7 3.0 3.0 2.3 - 2.7 2.3 2.3 1.65 - 2.3 1.65 1.4 - 1.6 1.4 1.2 1.2 - 3.6 3.0 3.0 2.3 2.3 1.65 1.65 3.6 3.6 2.7 2.7 1.95 1.95 1.2 - 3.6 1.2 - 3.6 2.7 - 3.6 75.0 0.2 0.4 0.4 0.55 0.2 0.4 0.6 0.2 0.3 0.2 0.35 0.05 V Conditions Min Max Units r5.0 75.0 45.0 PA 45.0 25.0 PA 25.0 450 (Note 4) (Note 5) (Note 4) (Note 5) (Note 4) (Note 5) 450 300 300 200 PA 200 r10.0 20.0 750 IOZ ICC 3-STATE Output Leakage Quiescent Supply Current Increase in ICC per Input VO VI VI VIH VCC or GND VIH or VIL VCC or GND VCC  0.6V PA PA PA 'ICC Note 4: An external driver must source at least the specified current to switch from LOW-to-HIGH. Note 5: An external driver must sink at least the specified current to switch from HIGH-to-LOW. www.fairchildsemi.com 4 74VCXH245 AC Electrical Characteristics (Note 6) Symbol tPHL, tPLH Parameter Propagation Delay An to Bn or Bn to An CL tPZL, tPZH CL tPLZ, tPHZ CL tOSHL tOSLH Output to Output Skew (Note 7) CL Note 6: For CL Conditions CL 30 pF, RL 500: VCC (V) 3.3 r 0.3 2.5 r 0.2 1.8 r 0.15 TA 40qC to 85qC Max 3.5 4.2 8.4 16.8 42.0 4.5 5.6 9.8 19.6 49.0 3.6 4.0 7.2 14.4 36.0 0.5 0.5 0.75 1.5 1.5 Min 0.6 0.8 1.5 1.0 0.6 0.8 1.5 1.0 0.6 0.8 1.5 1.0 Units Figure Number Figures 1, 2 ns Figures 5, 6 Figures 1, 3, 4 ns Figures 5, 7, 8 Figures 1, 3, 4 ns Figures 5, 7, 8 15 pF, RL 30 pF, RL 2 k: 500: 1.5 r 0.1 1.2 3.3 r 0.3 2.5 r 0.2 1.8 r 0.15 Output Enable Time CL 15 pF, RL 30 pF, RL 2 k: 500: 1.5 r 0.1 1.2 3.3 r 0.3 2.5 r 0.2 1.8 r 0.15 Output Disable Time CL 15 pF, RL 30 pF, RL 2 k: 500: 1.5 r 0.1 1.2 3.3 r 0.3 2.5 r 0.2 1.8 r 0.15 CL ns 15 pF, RL 2 k: 1.5 r 0.1 1.2 50 pF, add approximately 300 ps to the AC maximum specification. Note 7: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Dynamic Switching Characteristics Symbol VOLP Parameter Quiet Output Dynamic Peak VOL CL 30 pF, VIH Conditions VCC, VIL 0V VCC (V) 1.8 2.5 3.3 VOLV Quiet Output Dynamic Valley VOL CL 30 pF, VIH VCC, V IL 0V 1.8 2.5 3.3 VOHV Quiet Output Dynamic Valley VOH CL 30 pF, VIH VCC, V IL 0V 1.8 2.5 3.3 TA 25qC 0.3 0.7 1.0 V Typical Units 0.3 0.7 1.0 1.3 1.7 2.0 V V Capacitance Symbol CIN CI/O CPD Input Capacitance Input/Output Capacitance Power Dissipation Capacitance Parameter VI VI VI 0V or VCC, VCC 0V or VCC, VCC 0V or VCC, f Conditions 1.8V, 2.5V or 3.3V 1.8V, 2.5V or 3.3V 1.8V, 2.5V or 3.3V TA 25qC 6 7 20 Typical Units pF pF pF 10 MHz, VCC 5 www.fairchildsemi.com 74VCXH245 AC Loading and Waveforms (VCC 3.3V r 0.3V to 1.8V r 0.5V) FIGURE 1. AC Test Circuit TEST tPLH, tPHL tPZL, tPLZ tPZH, tPHZ VCC x 2 at VCC SWITCH Open 6V at VCC 3.3 r 0.3V; 2.5V r 0.2V; 1.8V r 0.15V GND FIGURE 2. Waveform for Inverting and Non-inverting Functions FIGURE 3. 3-STATE Output High Enable and Disable Times for Low Voltage Logic FIGURE 4. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic Symbol Vmi Vmo Vx Vy VCC 3.3V r 0.3V 1.5V 1.5V VOL  0.3V VOH  0.3V 2.5V r 0.2V VCC /2 VCC /2 VOL  0.15V VOH  0.15V 1.8V r 0.15V VCC /2 VCC /2 VOL  0.15V VOH  0.15V www.fairchildsemi.com 6 74VCXH245 AC Loading and Waveforms (VCC 1.5V r 0.1V to 1.2V) FIGURE 5. AC Test Circuit TEST tPLH, tPHL tPZL, tPLZ tPZH, tPHZ SWITCH Open VCC x 2 at VCC GND 1.5 r 0.1V FIGURE 6. Waveform for Inverting and Non-Inverting Functions FIGURE 7. 3-STATE Output High Enable and Disable Times for Low voltage Logic FIGURE 8. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic Symbol Vmi Vmo VX VY VCC 1.5V r 0.1V VCC/2 VCC/2 VOL  0.1V VOH  0.1V 7 www.fairchildsemi.com 74VCXH245 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit, JEDEC MS-013, 0.300” Wide Body Package Number M20B www.fairchildsemi.com 8 74VCXH245 Low Voltage Bidirectional Transceiver with Bushold Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package, JEDEC MO-153, 4.4mm Wide Package Number MTC20 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 9 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com www.fairchildsemi.com