74VHC04MTC

74VHC04 Hex Inverter November 1992 Revised February 2005 74VHC04 Hex Inverter General Description The VHC04 is an advanced high speed CMOS Inverter fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output. An input protection circuit ensures that 0V to 7V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5V to 3V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages. Features s High Speed: tPD 3.8 ns (typ) at VCC VNIL 5V s High noise immunity: VNIH s Low Noise: VOLP 28% VCC (Min) s Power down protection is provided on all inputs 0.4V (typ) 2 PA (Max) @ TA 25qC s Low power dissipation: ICC s Pin and function compatible with 74HC04 Ordering Code: Order Number 74VHC04M 74VHC04MX_NL (Note 1) 74VHC04SJ 74VHC04MTC 74VHC04MTCX_NL (Note 1) 74VHC04N Package Number M14A M14A M14D MTC14 MTC14 N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only. © 2005 Fairchild Semiconductor Corporation DS011516 www.fairchildsemi.com 74VHC04 Logic Symbol IEEE/IEC Connection Diagram Truth Table Pin Descriptions Pin Names An On Description Inputs Outputs A L H O H L www.fairchildsemi.com 2 74VHC04 Absolute Maximum Ratings(Note 2) Supply Voltage (VCC ) DC Input Voltage (VIN) DC Output Voltage (VOUT) Input Diode Current (IIK) Output Diode Current (IOK) DC Output Current (IOUT) DC VCC /GND Current (ICC ) Storage Temperature (TSTG) Lead Temperature (TL) (Soldering, 10 seconds) 260qC 0.5V to 7.0V 0.5V to 7.0V 0.5V to VCC  0.5V 20 mA r20 mA r25 mA r50 mA 65qC to 150qC Recommended Operating Conditions (Note 3) Supply Voltage (VCC) Input Voltage (VIN) Output Voltage (VOUT) Operating Temperature (TOPR) Input Rise and Fall Time (tr, tf) VCC VCC 3.3V r 0.3V 5.0V r 0.5V 0 a 100 ns/V 0 a 20 ns/V 2.0V to 5.5V 0V to 5.5V 0V to VCC 40qC to 85qC Note 2: Absolute Maximum Ratings are values beyond which the device may be damaged or have its useful life impaired. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation outside databook specifications. Note 3: Unused inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol VIH VIL VOH Parameter HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Voltage VCC (V) 2.0 3.0  5.5 2.0 3.0  5.5 2.0 3.0 4.5 3.0 4.5 VOL LOW Level Output Voltage 2.0 3.0 4.5 3.0 4.5 IIN ICC Input Leakage Current Quiescent Supply Current 0  5.5 5.5 1.9 2.9 4.4 2.58 3.94 0.0 0.0 0.0 0.1 0.1 0.1 0.36 0.36 2.0 3.0 4.5 TA Min 1.50 0.7 VCC 0.50 0.3 VCC 1.9 2.9 4.4 2.48 3.80 0.1 0.1 0.1 0.44 0.44 V IOL IOL VIN VIN 4 mA 8 mA V V VIN IOH IOH VIH IOL or VIL V 25qC Typ Max TA 40qC to 85qC Min Max Units V Conditions 1.50 0.7 VCC 0.50 0.3 VCC V VIN VIH or VIL IOH 50 PA 4 mA 8 mA 50 PA r0.1 2.0 r1.0 20.0 PA PA 5.5V or GND VCC or GND Noise Characteristics Symbol VOLP (Note 4) VOLV (Note 4) VIHD (Note 4) VILD (Note 4) Parameter Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Minimum HIGH Level Dynamic Input Voltage Maximum LOW Level Dynamic Input Voltage VCC (V) 5.0 5.0 5.0 5.0 TA Typ 0.4 2 5 qC Limits 0.8 Units V V V V CL CL CL CL 50 pF 50 pF 50 pF 50 pF Conditions 0.4 0.8 3.5 1.5 Note 4: Parameter guaranteed by design. 3 www.fairchildsemi.com 74VHC04 AC Electrical Characteristics Symbol tPHL tPLH 5.0 r 0.5 CIN CPD Input Capacitance Power Dissipation Capacitance Parameter Propagation Delay VCC (V) 3.3 r 0.3 TA Min 25qC Typ 5.0 7.5 3.8 5.3 4 18 Max 7.1 10.6 5.5 7.5 10 TA 40qC to 85qC Max 8.5 12.0 6.5 8.5 10 1.0 1.0 1.0 1.0 Min Units ns ns pF pF CL CL CL CL Conditions 15 pF 50 pF 15 pF 50 pF OPEN VCC (Note 5) Note 5: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr.) C PD * VCC * fIN  ICC/6 (per gate). www.fairchildsemi.com 4 74VHC04 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A 5 www.fairchildsemi.com 74VHC04 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D www.fairchildsemi.com 6 74VHC04 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14 7 www.fairchildsemi.com 74VHC04 Hex Inverter Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N14A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 8 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com