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74VHCT245A

74VHCT245A

  • 厂商:

    FAIRCHILD(仙童半导体)

  • 封装:

  • 描述:

    74VHCT245A - Octal Buffer/Line Driver with 3-STATE Outputs - Fairchild Semiconductor

  • 数据手册
  • 价格&库存
74VHCT245A 数据手册
74VHCT245A Octal Buffer/Line Driver with 3-STATE Outputs March 1997 Revised March 1999 74VHCT245A Octal Buffer/Line Driver with 3-STATE Outputs General Description The VHCT245A is an advanced high speed CMOS octal bus transceiver fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The VHCT245A is intended for bidirectional asynchronous communication between data busses. The direction of data transmission is determined by the level of the T/R input. The enable input can be used to disable the device so that the busses are effectively isolated. Protection circuits ensure that 0V to 7V can be applied to the input and output (Note 1) pins without regard to the supply voltage. These circuits prevent device destruction due to mismatched supply and input/output voltages. This device can be used to interface 5V to 3V systems and two supply systems such as battery back up. Note 1: Outputs in OFF-State Features s High Speed: tPD = 5.4 ns (typ) at VCC = 5V s Power Down Protection on Inputs and Outputs s Low Power Dissipation: ICC = 4 µA (Max) @ TA = 25°C s Pin and Function Compatible with 74HCT245 Ordering Code: Order Number 74VHCT245AM 74VHCT245ASJ 74VHCT245AMTC 74VHCT245AN Package Number M20B M20D MTC20 N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol IEEE/IEC Connection Diagram Pin Descriptions Pin Names OE T/R A0–A7 B0–B7 Description Output Enable Input Transmit/Receive Input Side A Inputs or 3-STATE Outputs Side B Inputs or 3-STATE Outputs Truth Table Inputs Outputs OE L L H H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial T/R L H X Bus B Data to Bus A Bus A Data to Bus B HIGH-Z State © 1999 Fairchild Semiconductor Corporation DS500004.prf www.fairchildsemi.com 74VHCT245A Absolute Maximum Ratings(Note 2) Supply Voltage (VCC) DC Input Voltage (VIN) DC Output Voltage (VOUT) (Note 3) (Note 4) Input Diode Current (IIK) Output Diode Current (IOK) (Note 5) DC Output Current (IOUT) DC VCC/GND Current (ICC) Storage Temperature (TSTG) Lead Temperature (TL) (Soldering, 10 seconds) 260°C −0.5V to VCC + 0.5V −0.5V to +7.0V −20 mA ±20 mA ±25 mA ±75 mA −65°C to +150°C −0.5V to +7.0V −0.5V to +7.0V Recommended Operating Conditions (Note 6) Supply Voltage (VCC) Input Voltage (VIN) Output Voltage (VOUT) (Note 3) (Note 4) Operating Temperature (TOPR) Input Rise and Fall Time (tr, tf) VCC = 5.0V ± 0.5V 0 ns/V ∼ 20 ns/V Note 2: Absolute Maximum Ratings are values beyond which the device may be damaged or have its useful life impaired. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation outside databook specifications. Note 3: HIGH or LOW state. IOUT absolute maximum rating must be observed. Note 4: When outputs are in OFF-State or when VCC = OV. Note 5: VOUT < GND, VOUT > VCC (Outputs Active). Note 6: Unused inputs must be held HIGH or LOW. They may not float. 4.5V to +5.5V 0V to +5.5V 0V to VCC 0V to +5.5V −40°C to +85°C DC Electrical Characteristics Symbol VIH VIL VOH VOL IOZ IIN ICC ICCT IOFF Parameter HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Voltage LOW Level Output Voltage 3-STATE Output Off-State Current Input Leakage Current Quiescent Supply Current Maximum ICC/Input Output Leakage Current (Power Down State) V CC (V) 4.5 5.5 4.5 5.5 4.5 4.5 5.5 0–5.5 5.5 5.5 0.0 4.40 3.94 0.0 0.1 0.36 ±0.25 ±0.1 4.0 1.35 0.5 4.50 TA = 25°C Min 2.0 2.0 0.8 0.8 4.40 3.80 0.1 0.44 ±2.5 ±1.0 40.0 1.50 5.0 Typ Max TA = −40°C to +85°C Min 2.0 2.0 0.8 0.8 Max Units V V V V V V µA µA µA mA µA VIN = VIH IOH = −50 µA or VIL IOH = −8 mA VIN = VIH IOL = or VIL IOL = VIN = VIH or VIL VOUT = VCC or GND VIN = 5.5V or GND VIN = VCC or GND VIN = 3.4V Other Input = VCC or GND VOUT = 5.5V 50 µA 8 mA Conditions www.fairchildsemi.com 2 74VHCT245A Noise Characteristics Symbol VOLP (Note 7) VOLV (Note 7) VIHD (Note 7) VILD (Note 7) Parameter Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Minimum HIGH Level Dynamic Input Voltage Maximum LOW Level Dynamic Input Voltage VCC (V) 5.0 5.0 5.0 5.0 TA = 25°C Typ 1.2 −1.2 Limits 1.6 −1.6 2.0 0.8 Units V V V V CL = 50 pF CL = 50 pF CL = 50 pF CL = 50 pF Conditions Note 7: Parameter guaranteed by design. AC Electrical Characteristics Symbol tPLH tPHL tPZL tPZH tPLZ tPHZ tOSLH tOSHL CIN COUT CPD Parameter Propagation Delay Time 3-STATE Output Enable Time 3-STATE Output Disable Time Output to Output Skew Input Capacitance Output Capacitance Power Dissipation Capacitance V CC (V) 5.0 ± 0.5 5.0 ± 0.5 5.0 ± 0.5 5.0 ± 0.5 4 13 16 TA = 25°C Min Typ 4.9 5.4 9.4 9.9 10.1 Max 7.7 8.7 13.8 14.8 15.4 1.0 10 TA = −40°C to +85°C Min 1.0 1.0 1.0 1.0 1.0 Max 8.5 9.5 15.0 16.0 16.5 1.0 10 Units ns ns ns ns pF pF pF R L = 1 kΩ R L = 1 kΩ (Note 8) VCC = Open VCC = 5.0V (Note 9) Conditions CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 50 pF Note 8: Parameter guaranteed by design. tOSLH = |tPLH max − tPLH min|; t OSHL = |tPHL max − tPHL min| Note 9: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr.) = CPD * VCC * fIN + I CC/8 (per F/F). The total CPD when n pcs. of the Octal D Flip-Flop operates can be calculated by the equation: CPD (total) = 20 + 12n. 3 www.fairchildsemi.com 74VHCT245A Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D www.fairchildsemi.com 4 74VHCT245A Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 5 www.fairchildsemi.com 74VHCT245A Octal Buffer/Line Driver with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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