AN-5001

AN-5001 Using Fairchild’s LVX Low Voltage Dual Supply CMOS Translating Transceivers AN-5001 Fairchild Semiconductor Application Note April 1998 Revised May 1999 Using Fairchild’s LVX Low Voltage Dual Supply CMOS Translating Transceivers INTRODUCTION The Fairchild CMOS Translating Transceivers: 74LVX3245, 74LVX4245, 74LVXC3245, and 74LVXC4245 are true voltage translating devices. This is accomplished by electrically isolating the A-side from the B-side. An example of when it is necessary to use a true voltage translator, is in a system translating between 3 volt logic and 5 volt CMOS logic. In this case, the translators will insure a clean, fast and valid VIH (Voltage Input High) signal in both directions. This translation may be problematic with other forms of translation due to the VIH required, typically 3.5V for 5V CMOS. DEVICE TYPE DESCRIPTIONS The LVX Translating Transceivers are divided into two types of devices, Dual Supply Translating Transceivers, and Dual Supply Configurable Voltage Interface Transceivers. These devices offer the system designer multiple options for true voltage level translation in a system. DUAL SUPPLY TRANSLATORS The Dual Supply Translator devices (74LVX3245 and 74LVX4245) are designed to interface 3 volt to 5 volt signals. The Transmit/Receive control pin controls data direction flow. These devices are designed with the higher voltage VCC able to swing from 4.5V to 5.5V and the lower voltage VCC able to swing from 2.7V to 3.6V. The control pins OE (Output Enable) and T/R (Transmit/Receive) are powered by the VCCA side of the device. The 74LVX3245 and 74LVX4245 provide the same 5V to 3V translation function. The difference between the two devices is the side of the device the 5V and 3V VCC’s and their associated I/O (Input/Outputs data) ports are on. In the case of the 74LVX3245 Figure 1, VCCB and the B I/O port are the 5V side (4.5V to 5.5V) and the VCCA and the A I/O port are the 3V side (2.7V to 3.6V). On the 74LVX4245 Figure 2, VCCA and the A I/O port are the 5V side (4.5V to 5.5V) and the VCCB and the B I/O are the 3V side (2.7V to 3.6V). FIGURE 2. 74LVX4245 CONFIGURABLE VOLTAGE INTERFACE TRANSCEIVERS The Configurable Voltage Interface transceivers (74LVXC3245 and 74LVXC4245) are designed for real time configurable I/O applications such as PCMCIA (Personal Computer Memory Card Interface Association). Configurability simply means the device is designed with the ability of the “configurable” side of the I/O port, to track, or follow the VCCB voltage level. This is accomplished by tying VCCB of the device to the PCMCIA card voltage supply. The card will always experience full rail data signals, maximizing interface reliability. The control pins OE (Output Enable) and T/R (Transmit/ Receive) are powered by the VCCA side of the device. These devices are also designed to allow the configurable side (VCCB and B I/O port) to float, unconnected to any voltage or control source. This is allowed when the OE pin is driven to a logic high. Floating VCCB and the B port is useful in applications where a card or cable may need to be left disconnected. Using a Configurable Voltage Interface device at this point will eliminate false signaling or system damage due to the oscillations that can occur if standard design CMOS inputs and power pins are left floating. The 74LVXC3245 and 74LVXC4245 are designed for different VCCA and A I/O port voltage levels. FIGURE 1. 74LVX3245 © 1999 Fairchild Semiconductor Corporation AN500148.prf www.fairchildsemi.com AN-5001 In the case of the 74LVXC3245 Figure 3, the VCCA and the A I/O port are designed for 3V (2.7V to 3.6V). The device B side is the configurable side. VCCB accepts a 3V to 5.5V level, and the B I/O port tracks the VCCB level. On the 74LVX4245 Figure 4, VCCA and the A I/O port are designed for 5V (4.5V to 5.5V). The device B side is the configurable side. VCCB accepts a 2.7V to 5.5V level and the B I/O port tracks the VCCB level. FIGURE 3. 74LVX3245 POWER UP CONSIDERATIONS These designs give the user a true translating device, however, they also present the system designer with some special considerations during power up to insure the system does not experience unnecessary ICC current draw, bus contention, or oscillations (refer to Table ). To guard against power up problems, some simple guidelines need to be adhered to: • Power up the control side of the device first. This is the VCCA side on all four devices. • OE should ramp with or ahead of VCCA. This will help guard against bus contention. FIGURE 4. 74LVX4245 • The Transmit/Receive control pin (T/R) should ramp with or ahead of VCCA, this will ensure that the A port data pins are configured as inputs. WIth VCCA receiving power first, the A I/O port should be configured as inputs to help guard against bus contention and oscillations. • A side data inputs should be driven to a valid logic level. This will prevent excessive current draw. The above steps will ensure that no bus contention or oscillations, and therefore no excessive current draw occurs during the power up cycling of these devices. These steps will help prevent possible damage to the translator devices and potential damage to other system components. Table 1: LOW VOLTAGE TRANSLATOR POWER UP SEQUENCING TABLE Device Type VCCA 3V 74LVX3245 (power up 1st) (power up 2nd) 5V 74LVX4245 (power up 1st) (power up 2nd) 3V 74LVXC3245 (power up 1st) 5V 74LVXC4245 (power up 1st) configurable with VCCA with VCCA 0V or VCCA configurable 2.7V to 5.5V with VCCA ramp with VCCA ramp 0V or VCCA logic outputs 3V to 5.5V with VCCA ramp with VCCA ramp 0V or VCCA logic outputs yes, VCCB and B I/O's w/ OE HIGH yes, VCCB and B I/O's w/ OE HIGH 3V with VCCA ramp with VCCA ramp 0V or VCCA logic outputs No VCCB 5V A side T/R ramp OE I/O ramp logic outputs No I/O Allowed B side Floatable Pin www.fairchildsemi.com 2 AN-5001 Using Fairchild’s LVX Low Voltage Dual Supply CMOS Translating Transceivers FLOATING OF PINS The Dual Supply Configurable Voltage Interface devices (74LVXC3245 and 74LVXC4245) are designed to allow the configurable side of the device (VCCB and the B I/O pins) to float when the VCCA side is powered up and the OE pin is driven to a valid logic high. It is also recommended that the T/R pin is set to a logic high (A to B direction) and A side I/O pins are at valid logic levels. This will help prevent oscillations and potential excessive current draw. Allowing pins to float on the Non-Configurable Dual Supply Translators (74LVX3245 and 74LVX4245) is not recommended. High ICC device currents, signal oscillations, and possible device damage may result. SUMMARY Fairchild’s Dual Supply CMOS translating transceivers solve mixed voltage design problems by providing translation between 3V logic and 5V CMOS logic. Careful selection of the appropriate configuration and attention to the power up considerations discussed in this applications note can make interfacing in a mixed voltage environment an easy task. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.