CD4030

CD4030C Quad EXCLUSIVE-OR Gate October 1987 Revised January 1999 CD4030C Quad EXCLUSIVE-OR Gate General Description The CD4030C EXCLUSIVE-OR gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. All inputs are protected against static discharge with diodes to VDD and VSS. tPHL = tPLH = 40 ns (typ.) at CL = 15 pF, 10V supply s High noise immunity 0.45 VCC (typ.) Applications • Automotive • Data terminals • Instrumentation • Medical electronics • Industrial controls • Remote metering • Computers Features s Wide supply voltage range: s Low power: 100 nW (typ.) s Medium speed operation: 3.0V to 15V Ordering Code: Order Number CD4030CSJ CD4030CN Package Number M14D N14A Package Description 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Connection Diagram Pin Assignments for DIP and SOP Truth Table A 0 1 0 1 1 = HIGH Level 0 = LOW Level B 0 0 1 1 J 0 1 1 0 © 1999 Fairchild Semiconductor Corporation DS005961.prf www.fairchildsemi.com CD4030C Logic Diagram www.fairchildsemi.com 2 CD4030C Absolute Maximum Ratings(Note 1) Voltage at Any Pin (Note 2) Operating Temperature Range Storage Temperature Range Power Dissipation (PD) Dual-In-Line Small Outline Operating VDD Range 700 mW 500 mW VSS +3.0V to VSS +15V VSS −0.3V to VSS +15.5V −40°C to +85°C −65°C to +150°C Lead Temperature (Soldering, 10 seconds) 260°C Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. Except for “Operating Temperature Range” they are not meant to imply that the devices should be operated at these limits. The Electrical Characteristics tables provide conditions for actual device operation. Note 2: This device should not be connected to circuits with power on because high transient voltages may cause permanent damage. DC Electrical Characteristics Limits Symbol IL PD VOL VOH VNL VNH IDN IDP II Parameter Quiescent Device Current Quiescent Device Dissipation Package Output Voltage LOW Level Output Voltage HIGH Level Noise Immunity (All Inputs) Noise Immunity (All Inputs) Output Drive Current N-Channel (Note 3) Output Drive Current P-Channel (Note 3) Input Current Conditions Min VDD = 5.0V VDD = 10V VDD = 5.0V VDD = 10V VDD = 5.0V VDD = 10V VDD = 5.0V VDD = 10V VDD = 5.0V VDD = 10V VDD = 5.0V VDD = 10V VDD = 5.0V VDD = 10V VDD = 5.0V VDD = 10 V VI = 0V or VI = VDD 4.95 9.95 1.5 3.0 1.4 2.9 0.35 0.7 −0.21 −0.45 −40°C Typ Max 5.0 10 25 100 0.05 0.05 4.95 9.95 1.5 3.0 1.5 3.0 0.3 0.6 −0.15 −0.32 Min +25°C Typ 0.05 0.1 0.25 1.0 0 0 5.0 10 2.25 4.5 2.25 4.5 1.2 2.4 −0.6 −1.3 10 Max 5.0 10 25 100 0.05 0.05 4.95 9.95 1.4 2.9 1.5 3.0 0.25 0.5 −0.12 −0.25 Min +85°C Typ Max 70 140 350 1,400 0.05 0.05 µA µA µW µW V V V V V V V V mA mA mA mA pA Units Note 3: IDN and IDP are tested one output at a time. AC Electrical Characteristics (Note 4) Symbol tPHL tPLH tTHL tTLH CI Parameter Propagation Delay Time Propagation Delay Time Transition Time HIGH-to-LOW Level Transition Time LOW-to-HIGH Level Input Capacitance VDD = 5.0V VDD = 10V VDD = 5.0V VDD = 10V VDD = 5.0V VDD = 10V VDD = 5.0V VDD = 10V VI = 0V or VI = VDD Conditions Limits Min Typ 100 40 100 40 70 25 80 30 5.0 Max 300 150 300 150 300 150 300 150 Units ns ns ns ns ns ns ns ns pF Note 4: AC Parameters are guaranteed by DC correlated testing. 3 www.fairchildsemi.com CD4030C Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D www.fairchildsemi.com 4 CD4030C Quad EXCLUSIVE-OR Gate Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Package Number N14A LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.