CD4050BCM

CD4049UBC • CD4050BC Hex Inverting Buffer • Hex Non-Inverting Buffer October 1987 Revised April 2002 CD4049UBC • CD4050BC Hex Inverting Buffer • Hex Non-Inverting Buffer General Description The CD4049UBC and CD4050BC hex buffers are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. These devices feature logic level conversion using only one supply voltage (VDD). The input signal high level (VIH) can exceed the VDD supply voltage when these devices are used for logic level conversions. These devices are intended for use as hex buffers, CMOS to DTL/ TTL converters, or as CMOS current drivers, and at VDD = 5.0V, they can drive directly two DTL/TTL loads over the full operating temperature range. Features s Wide supply voltage range: 3.0V to 15V s Direct drive to 2 TTL loads at 5.0V over full temperature range s High source and sink current capability s Special input protection permits input voltages greater than VDD Applications • CMOS hex inverter/buffer • CMOS to DTL/TTL hex converter • CMOS current “sink” or “source” driver • CMOS HIGH-to-LOW logic level converter Ordering Code: Order Number CD4049UBCM CD4049UBCN CD4050BCM CD4050BCN Package Number M16A N16E M16A N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagrams Pin Assignments for DIP CD4049UBC CD4050BC Top View Top View © 2002 Fairchild Semiconductor Corporation DS005971 www.fairchildsemi.com CD4049UBC • CD4050BC Schematic Diagrams CD4049UBC 1 of 6 Identical Units CD4050BC 1 of 6 Identical Units www.fairchildsemi.com 2 CD4049UBC • CD4050BC Absolute Maximum Ratings(Note 1) (Note 2) Supply Voltage (VDD) Input Voltage (VIN) Voltage at Any Output Pin (VOUT) Storage Temperature Range (TS) Power Dissipation (PD) Dual-In-Line Small Outline Lead Temperature (TL) (Soldering, 10 seconds) 260°C 700 mW 500 mW Recommended Operating Conditions (Note 2) Supply Voltage (VDD) Input Voltage (VIN) Voltage at Any Output Pin (VOUT ) Operating Temperature Range (TA) CD4049UBC, CD4050BC 3V to 15V 0V to 15V 0 to VDD −0.5V to +18V −0.5V to +18V −0.5V to VDD + 0.5V −65°C to +150°C −55°C to +125°C Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed; they are not meant to imply that the devices should be operated at these limits. The table of “Recommended Operating Conditions” and “Electrical Characteristics” provides conditions for actual device operation. Note 2: VSS = 0V unless otherwise specified. DC Electrical Characteristics (Note 3) Symbol IDD Parameter Quiescent Device Current VDD = 5V VDD = 10V VDD = 15V VOL LOW Level Output Voltage VIH = VDD, VIL = 0V, |IO| < 1 µA VDD = 5V VDD = 10V VDD = 15V VOH HIGH Level Output Voltage VIH = VDD, VIL = 0V, |IO| < 1 µA VDD = 5V VDD = 10V VDD = 15V VIL LOW Level Input Voltage (CD4050BC Only) |IO| < 1 µA VDD = 5V, VO = 0.5V VDD = 10V, VO = 1V VDD = 15V, VO = 1.5V VIL LOW Level Input Voltage (CD4049UBC Only) |IO| < 1 µA VDD = 5V, VO = 4.5V VDD = 10V, VO = 9V VDD = 15V, VO = 13.5V VIH HIGH Level Input Voltage (CD4050BC Only) |IO| < 1 µA VDD = 5V, VO = 4.5V VDD = 10V, VO = 9V VDD = 15V, VO = 13.5V VIH HIGH Level Input Voltage (CD4049UBC Only) |IO| < 1 µA VDD = 5V, VO = 0.5V VDD = 10V, VO = 1V VDD = 15V, VO = 1.5V IOL LOW Level Output Current (Note 4) VIH = VDD, VIL = 0V VDD = 5V, VO = 0.4V VDD = 10V, VO = 0.5V VDD = 15V, VO = 1.5V IOH HIGH Level Output Current (Note 4) VIH = VDD, VIL = 0V VDD = 5V, VO = 4.6V VDD = 10V, VO = 9.5V VDD = 15V, VO = 13.5V IIN Input Current VDD = 15V, VIN = 0V VDD = 15V, VIN = 15V Note 3: VSS = 0V unless otherwise specified. Conditions −55°C Min Max 1.0 2.0 4.0 Min +25°C Typ 0.01 0.01 0.03 Max 1.0 2.0 4.0 +125°C Min Max 30 60 120 Units µA 0.05 0.05 0.05 0 0 0 0.05 0.05 0.05 0.05 0.05 0.05 V 4.95 9.95 14.95 1.5 3.0 4.0 1.0 2.0 3.0 3.5 7.0 11.0 4.0 8.0 12.0 5.6 12 35 −1.3 −2.6 −8.0 −0.1 0.1 4.95 9.95 14.95 5 10 15 2.25 4.5 6.75 1.5 2.5 3.5 1.5 3.0 4.0 1.0 2.0 3.0 4.95 9.95 14.95 1.5 3.0 4.0 1.0 2.0 3.0 3.5 7.0 11.0 4.0 8.0 12.0 3.2 6.8 20 −0.72 −1.5 −5 −0.1 0.1 −1.0 1.0 µA mA mA V V V V V 3.5 7.0 11.0 4.0 8.0 12.0 4.6 9.8 29 −1.1 −2.2 −7.2 2.75 5.5 8.25 3.5 7.5 11.5 5 12 40 −1.6 −3.6 −12 −10−5 10−5 3 www.fairchildsemi.com CD4049UBC • CD4050BC DC Electrical Characteristics AC Electrical Characteristics CD4049UBC Symbol tPHL Parameter Propagation Delay Time HIGH-to-LOW Level tPLH Propagation Delay Time LOW-to-HIGH Level tTHL Transition Time HIGH-to-LOW Level tTLH Transition Time LOW-to-HIGH Level CIN Input Capacitance (Continued) Note 4: These are peak output current capabilities. Continuous output current is rated at 12 mA maximum. The output current should not be allowed to exceed this value for extended periods of time. IOL and IOH are tested one output at a time. (Note 5) TA = 25°C, CL = 50 pF, RL = 200k, tr = tf = 20 ns, unless otherwise specified Conditions VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V Any Input Note 5: AC Parameters are guaranteed by DC correlated testing. Min Typ 30 20 15 45 25 20 30 20 15 60 30 25 15 Max 65 40 30 85 45 35 60 40 30 120 55 45 22.5 Units ns ns ns ns pF AC Electrical Characteristics CD4050BC Symbol tPHL Parameter Propagation Delay Time HIGH-to-LOW Level tPLH Propagation Delay Time LOW-to-HIGH Level tTHL Transition Time HIGH-to-LOW Level tTLH Transition Time LOW-to-HIGH Level CIN Input Capacitance (Note 6) TA = 25°C, CL = 50 pF, RL = 200k, tr = tf = 20 ns, unless otherwise specified Conditions VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V Any Input Note 6: AC Parameters are guaranteed by DC correlated testing. Min Typ 60 25 20 60 30 25 30 20 15 60 30 25 5 Max 110 55 30 120 55 45 60 40 30 120 55 45 7.5 Units ns ns ns ns pF www.fairchildsemi.com 4 CD4049UBC • CD4050BC Switching Time Waveforms Typical Applications CMOS to TLL or CMOS at a Lower VDD VDD1 ≥ VDD2 In the case of the CD4049UBC the output drive capability increases with increasing input voltage. E.g., If VDD1 = 10V the CD4049UBC could drive 4 TTL loads. 5 www.fairchildsemi.com CD4049UBC • CD4050BC Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M16A www.fairchildsemi.com 6 CD4049UBC • CD4050BC Hex Inverting Buffer • Hex Non-Inverting Buffer Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 7 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com www.fairchildsemi.com