CD4070BC Quad 2-Input EXCLUSIVE-OR Gate
October 1987 Revised January 1999
CD4070BC Quad 2-Input EXCLUSIVE-OR Gate
General Description
The CD4070BC employs complementary MOS (CMOS) transistors to achieve wide power supply operating range, low power consumption, and high noise margin, the CD4070BC provide basic functions used in the implementation of digital integrated circuit systems. The N- and Pchannel enhancement mode transistors provide a symmetrical circuit with output swing essentially equal to the supply voltage. No DC power other than that caused by leakage current is consumed during static condition. All inputs are protected from damage due to static discharge by diode clamps to VDD and VSS.
Features
s Wide supply voltage range: s High noise immunity: 3.0V to 15V 0.45 VDD typ. s Low power TTL compatibility: Fan out of 2 driving 74L or 1 driving 74LS s Pin compatible to CD4030A Equivalent to MM74C86 and MC14070B
Ordering Code:
Order Number CD4070BCM CD4070BCN Package Number M14A N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Assignments for SOIC and DIP
Truth Table
Inputs A L L H H B L H L H Outputs Y L H H L
Top View
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DS005976.prf
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CD4070BC
Absolute Maximum Ratings(Note 1)
(Note 2) DC Supply Voltage (VDD) Input Voltage (VIN) Storage Temperature Range (TS) Power Dissipation (PD) Dual-In-Line Small Outline Lead Temperature (TL) (Soldering, 10 seconds) 260°C (Note 3) 700 mW 500 mW −0.5 to +18 VDC −0.5 to VDD +0.5 VDC −65°C to +150°C
Recommended Operating Conditions (Note 2)
DC Supply Voltage (VDD) Input Voltage (VIN) Operating Temperature Range (TA) 3V to 15 VDC 0 to VDD VDC −40°C to +85°C
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of “Recommended Operating Conditions” and “Electrical Characteristics” provides conditions for actual device operation. Note 2: VSS = 0V unless otherwise specified.
DC Electrical Characteristics
Symbol IDD Parameter Quiescent Device Current VDD = 5V, VIN = VDD or VSS VDD = 10V, VIN = VDD or VSS VDD = 15V, VIN = VDD or VSS VOL LOW Level Output Voltage |IO| < 1 µA VDD = 5V VDD = 10V VDD = 15V VOH HIGH Level Output Voltage |IO| < 1 µA VDD = 5V VDD = 10V VDD = 15V VIL LOW Level Input Voltage |IO| < 1 µA
Conditions
−40°C Min Max 1.0 2.0 4.0 Min
+25°C Typ Max 1.0 2.0 4.0
+85°C Min Max 7.5 15 30
Units µA µA µA
0.05 0.05 0.05 4.95 9.95 14.95 1.5 3.0 4.0 3.5 7.0 11.0 0.52 1.3 3.6 −0.52 −1.3 −3.6 −0.3 0.3 3.5 7.0 11.0 0.44 1.1 3.0 −0.44 −1.1 −3.0 4.95 9.95 14.95
0 0 0 5 10 15
0.05 0.05 0.05 4.95 9.95 14.95 1.5 3.0 4.0 3.5 7.0 11.0
0.05 0.05 0.05
V V V V V V
VDD = 5V, VO = 4.5V or 0.5V VDD = 10V, VO = 9V or 1.0V VDD = 15V, VO = 13.5V or 1.5V
1.5 3.0 4.0
V V V V V V mA mA mA mA mA mA
VIH
HIGH Level Input Voltage
|IO| < 1 µA VDD = 5V, VO = 0.5V or 4.5V VDD = 10V, VO = 1V or 9.0V VDD = 15V, VO = 1.5V or 13.5V
IOL
LOW Level Output Current
VDD = 5V, VO = 0.4V VDD = 10V, VO = 0.5V VDD = 15V, VO = 1.5V VDD = 5V, VO = 4.6V VDD = 10V, VO = 9.5V VDD = 15V, VO = 13.5V VDD = 15V, VIN = 0V VDD = 15V, VIN = 15V
0.88 2.25 8.8 −0.88 −2.25 −8.8 −10−5 10−5 −0.3 0.3
0.36 0.9 2.4 −0.36 −0.9 −2.4 −1.0 1.0
IOH
HIGH Level Output Current
IIN
Input Current
µA µA
Note 3: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of “Recommended Operating Conditions” and “Electrical Characteristics” provides conditions for actual device operation.
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2
CD4070BC
AC Electrical Characteristics
Symbol tPHLor tPLH tTHL or tTLH CIN CPD Average Input Capacitance Power Dissipation Capacitance Parameter Propagation Delay Time from Input to Output Transition Time
(Note 4)
Conditions VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V Any Input Any Input (Note 5) Min Typ 110 50 40 100 50 40 5 20 Max 185 90 75 200 100 80 7.5 Units ns ns ns ns ns ns pF pF
TA = 25°C, CL = 50 pF, RL = 200k, tr and tf ≤ 20 ns, unless otherwise specified
Note 4: AC Parameters are guaranteed by DC correlated testing. Note 5: CPD determines the no load AC power consumption of any CMOS device. For complete explanation, see 74C Family Characteristics Application Note—AN-90.
Typical PerformanceCharacteristics
Propagation Delay Time vs Load Capacitance
AC Test Circuit and Switching Time Waveforms
Note: Delays measured with input t r, tf = 20 ns.
tr = tf = 20 ns
3
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CD4070BC
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body Package Number M14A
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4
CD4070BC Quad 2-Input EXCLUSIVE-OR Gate
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Package (PDIP), JEDEC MS-001, 0.300” Wide Package Number N14A
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Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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