CD4093BCN

CD4093BC Quad 2-Input NAND Schmitt Trigger October 1987 Revised January 1999 CD4093BC Quad 2-Input NAND Schmitt Trigger General Description The CD4093B consists of four Schmitt-trigger circuits. Each circuit functions as a 2-input NAND gate with Schmitttrigger action on both inputs. The gate switches at different points for positive and negative-going signals. The difference between the positive (VT+) and the negative voltage (VT−) is defined as hysteresis voltage (VH). All outputs have equal source and sink currents and conform to standard B-series output drive (see Static Electrical Characteristics). Guaranteed s Equal source and sink currents s No limit on input rise and fall time s Standard B-series output drive s Hysteresis voltage (any input) TA = 25°C Typical VDD = 5.0V VDD = 10V VDD = 15V VH = 1.5V VH = 2.2V VH = 2.7V VH = 0.1 VDD Features s Wide supply voltage range: s Schmitt-trigger on each input with no external components s Noise immunity greater than 50% 3.0V to 15V Applications • Wave and pulse shapers • High-noise-environment systems • Monostable multivibrators • Astable multivibrators • NAND logic Ordering Code: Order Number CD4093BCM CD4093BCN Package Number M14A N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Pin Assignments for SOIC and DIP Top View © 1999 Fairchild Semiconductor Corporation DS005982.prf www.fairchildsemi.com CD4093BC Absolute Maximum Ratings(Note 1) (Note 2) DC Supply Voltage (VDD) Input Voltage (VIN) Storage Temperature Range (TS) Power Dissipation (PD) Dual-In-Line Small Outline Lead Temperature (TL) (Soldering, 10 seconds) 260°C (Note 2) 700 mW 500 mW −0.5 to +18 VDC −0.5 to VDD +0.5 VDC −65°C to +150°C Recommended Operating Conditions (Note 2) DC Supply Voltage (VDD) Input Voltage (VIN) Operating Temperature Range (TA) 3 to 15 VDC 0 to VDD VDC −40°C to +85°C Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed; they are not meant to imply that the devices should be operated at these limits. The table of “Recommended Operating Conditions” and “Electrical Characteristics” provides conditions for actual device operation. Note 2: VSS = 0V unless otherwise specified. DC Electrical Characteristics Symbol IDD Parameter Quiescent Device Current VOL LOW Level Output Voltage VDD = 5V VDD = 10V VDD = 15V Conditions −40°C Min Max 1.0 2.0 4.0 0.05 0.05 0.05 4.95 9.95 14.95 1.3 2.85 4.35 2.75 5.5 8.25 0.5 1.0 1.5 0.52 1.3 3.6 −0.52 −1.3 −3.6 −0.3 0.3 2.25 4.5 6.75 3.6 7.15 10.65 2.35 4.3 6.3 4.95 9.95 14.95 1.5 3.0 4.5 2.75 5.5 8.25 0.5 1.0 1.5 0.44 1.1 3.0 0.44 −1.1 −3.0 Min +25°C Typ Max 1.0 2.0 4.0 0 0 0 5 10 15 1.8 4.1 6.3 3.3 6.2 9.0 1.5 2.2 2.7 0.88 2.25 8.8 −0.88 −2.25 −8.8 −10−5 10−5 −0.3 0.3 2.25 4.5 6.75 3.5 7.0 10.5 2.0 4.0 6.0 0.05 0.05 0.05 +85°C Min Max 7.5 15.0 30.0 0.05 0.05 0.05 4.95 9.95 14.95 1.5 3.0 4.5 2.65 5.35 8.1 0.35 0.70 1.20 0.36 0.9 2.4 −0.36 −0.9 −2.4 −1.0 1.0 2.3 4.65 6.9 3.5 7.0 10.5 2.0 4.0 6.0 Units µA µA µA V V V V V V V V V V V V V V V mA mA mA mA mA mA µA µA VIN = VDD, |IO| < 1 µA VDD = 5V VDD = 10V VDD = 15V VOH HIGH Level Output Voltage VIN = VSS, |IO| < 1 µA VDD = 5V VDD = 10V VDD = 15V VT− Negative-Going Threshold Voltage (Any Input) |IO| < 1 µA VDD = 5V, VO = 4.5V VDD = 10V, VO = 9V VDD = 15V, VO = 13.5V VT+ Positive-Going Threshold Voltage (Any Input) |IO| < 1 µA VDD = 5V, VO = 0.5V VDD = 10V, VO = 1V VDD = 15V, VO = 1.5V VH Hysteresis (VT+ − VT−) (Any Input) VDD = 5V VDD = 10V VDD = 15V VIN = VDD VDD = 5V, VO = 0.4V VDD = 10V, VO = 0.5V VDD = 15V, VO = 1.5V IOL LOW Level Output Current (Note 3) IOH HIGH Level Output Current (Note 3) VIN = VSS VDD = 5V, VO = 4.6V VDD = 10V, VO = 9.5V VDD = 15V, VO = 13.5V IIN Input Current VDD = 15V, VIN = 0V VDD = 15V, VIN = 15V Note 3: IOH and IOL are tested one output at a time. www.fairchildsemi.com 2 CD4093BC AC Electrical Characteristics Symbol tPHL, tPLH Parameter Propagation Delay Time (Note 4) Conditions Min Typ 300 120 80 90 50 40 (Any Input) (Per Gate) 5.0 24 Max 450 210 160 145 75 60 7.5 Units ns ns ns ns ns ns pF pF TA = 25°C, CL = 50 pF, RL = 200k, Input tr, tf = 20 ns, unless otherwise specified VDD = 5V VDD = 10V VDD = 15V tTHL, tTLH Transition Time VDD = 5V VDD = 10V VDD = 15V CIN CPD Input Capacitance Power Dissipation Capacitance Note 4: AC Parameters are guaranteed by DC correlated testing. 3 www.fairchildsemi.com CD4093BC Typical Applications Gated Oscillator Assume t1 + t2 >> tPHL + tPLH then: t0 = RC ln [VDD/VT−] t1 = RC ln [(VDD − VT−)/(VDD − VT+)] t2 = RC ln [VT+/VT−] Gated One-Shot (a) Negative-Edge Triggered (b) Positive-Edge Triggered www.fairchildsemi.com 4 CD4093BC Typical Performance Characteristics Typical Transfer Characteristics Guaranteed Trigger Threshold Voltage vs VDD Guaranteed Hysteresis vs VDD Guaranteed Hysteresis vs VDD Input and Output Characteristics VNML = VIH(MIN) − VOL ≅ VIH(MIN) = V T+(MIN) VNMH = VOH − VIL(MAX) ≅ VDD − VIL(MAX) = VDD − VT−(MAX) 5 www.fairchildsemi.com CD4093BC AC Test Circuits and Switching Time Waveforms www.fairchildsemi.com 6 CD4093BC Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body Package Number M14A 7 www.fairchildsemi.com CD4093BC Quad 2-Input NAND Schmitt Trigger Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Package Number N14A LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.