FAM6502MP45X

FAN5602 — Universal (Step-Up/Step-Down) Charge Pump Regulated DC/DC Converter August 2009 FAN5602 — Universal (Step-Up/Step-Down) Charge Pump Regulated DC/DC Converter Features ■ Low-Noise, Constant-Frequency Operation at Heavy Load ■ High-Efficiency, Pulse-Skip (PFM) Operation at Light Load ■ Switch Configurations (1:3, 1:2, 2:3, 1:1, 3:2, 2:1, 3:1) ■ 92% Peak Efficiency ■ Input Voltage Range: 2.7V to 5.5V ■ Output Current: 4.5V, 100mA at VIN = 3.6V ■ ±3% Output Voltage Accuracy ■ ICC < 1µA in Shutdown Mode ■ 1MHz Operating Frequency ■ Shutdown Isolates Output from Input ■ Soft-Start Limits Inrush Current at Startup ■ Short-Circuit and Over-Temperature Protection ■ Minimum External Component Count ■ No Inductors Description The FAN5602 is a universal switched capacitor DC/DC converter capable of step-up or step-down operation. Due to its unique adaptive fractional switching topology, the device achieves high efficiency over a wider input/ output voltage range than any of its predecessors. The FAN5602 utilizes resistance-modulated loop control, which produces lower switching noise than other topologies. Depending upon actual load conditions, the device automatically switches between constant-frequency and pulse-skipping modes of operation to extend battery life. The FAN5602 produces a fixed regulated output within the range of 2.7V to 5.5V from any type of voltage source. High efficiency is achieved under various input/ output voltage conditions because an internal logic circuit automatically reconfigures the system to the best possible topology. Only two 1µF bucket capacitors and one 10µF output capacitor are needed. During power on, soft-start circuitry prevents excessive current drawn from the supply. The device is protected against short-circuit and over-temperature conditions. The FAN5602 is available with 4.5V and 5.0V output voltages in a 3x3mm 8-lead MLP package. Applications ■ Cell Phones ■ Handheld Computers ■ Portable RF Communication Equipment ■ Core Supply to Low-Power Processors ■ Low-Voltage DC Bus ■ DSP Supplies Ordering Information Part Number FAM6502MP45X FAN5602MP5X Note: 1. Reference MLP08D Option B ONLY. 2. For Fairchild’s definition of “green” Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. Package 3x3mm 8-Lead MLP 3x3mm 8-Lead MLP Eco Status Green Green Output Voltage, NVOM 4.5V 5.0V Application Diagram Input 2.7V to 5.5V VIN ENABLE 1 CIN CB C2C2+ 2 3 4 FAN5602 8 6 7 5 C1+ VOUT COUT GND C1- Figure 1. Typical Application Diagram © 2005 Fairchild Semiconductor Corporation FAN5602 Rev. 1.5.3 www.fairchildsemi.com FAN5602 — Universal (Step-Up/Step-Down) Charge Pump Regulated DC/DC Converter Block Diagram ENABLE VIN C1C1+ BAND GAP VOUT FB SOFT-START BG ERROR AMP EN Heavy Load CURRENT SENSE Light load FB PFM BG EN S W I T C H A R R A Y C2+ REF CONTROL LOGIC VIN MODE DRIVER C2- 150mV VOUT SC 1.6V VIN UVLO OSCILLATOR VIN VOUT GND Figure 2. Block Diagram © 2005 Fairchild Semiconductor Corporation FAN5602 Rev. 1.5.3 www.fairchildsemi.com 2 FAN5602 — Universal (Step-Up/Step-Down) Charge Pump Regulated DC/DC Converter Pin Assignments VIN C2+ C2GND 1 2 3 4 8 7 6 5 ENABLE C1+ VOUT C1- 3x3mm 8-Lead MLP Figure 3. Pin Assignments Pin Descriptions Pin # 1 2 3 4 5 6 7 8 Name VIN C2+ C2GND C1VOUT C1+ ENABLE Supply Voltage Input. Description Bucket Capacitor2. Positive Connection. Bucket Capacitor2. Negative Connection. Ground Bucket Capacitor1. Negative Connection. Regulated Output Voltage. Bypass this pin with 10μF ceramic low-ESR capacitor. Bucket Capacitor1. Positive Connection. Enable Input. Logic high enables the chip and logic low disables the chip, reducing the supply current to less than 1µA. Do not float this pin. © 2005 Fairchild Semiconductor Corporation FAN5602 Rev. 1.5.3 www.fairchildsemi.com 3 FAN5602 — Universal (Step-Up/Step-Down) Charge Pump Regulated DC/DC Converter Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VIN PD TL TJ TSTG ESD Parameter VIN, VOUT, ENABLE, Voltage to GND Voltage at C1+,C1-,C2+, and C2-to GND Power Dissipation Lead Soldering Temperature (10 seconds) Junction Temperature Storage Temperature Human Body Model (HBM) Charged Device Model (CDM) Min. -3.0 -3.0 Max. 6.0 VIN +0.3 Internally Limited 300 150 Unit V V C° C° C° kV kV -55 150 2 2 Note: 2. Using Mil Std. 883E, method 3015.7 (Human Body Model) and EIAJ/JESD22C101-A (Charged Device Model). Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol VIN IL TA Parameter Input Voltage Load Current Ambient Temperature VIN < 2V Condition Min. 1.8 Typ. Max. 5.5 30 100 Unit V mA C° 4.5 & 5.5,VIN = 3.6V -40 +85 Note: 3. Refer to Figure 9 in Typical Performance Characteristics. © 2005 Fairchild Semiconductor Corporation FAN5602 Rev. 1.5.3 www.fairchildsemi.com 4 FAN5602 — Universal (Step-Up/Step-Down) Charge Pump Regulated DC/DC Converter DC Electrical Characteristics VIN = 2.7V to 5.5V, C1 = C2 = 1µF, CIN = COUT = 10µF, ENABLE = VIN, TA = -40°C to +85°C unless otherwise noted. Typical values are at TA = 25°C. Symbol VUVLO VOUT IQ Parameter Input Under-Voltage Lockout Output Voltage Quiescent Current Off Mode Supply Current Output Short-Circuit Efficiency Condition Min. 1.5 Typ. 1.7 VNOM 170 0.1 Max. 2.2 1.03 x VNOM 300 1.0 200 Unit v V µA µA mA % VIN ≥ 0.75 x VNOM, 0mA < ILOAD VOUT > 1.5 x VIN, the 1:2 mode (step-up) shown in Figure 23 is used. Both in the charging phase and in pumping phase, two flying capacitors are placed in parallel. In charging phase, the capacitors are charged to the input voltage. In the pumping phase, the input voltage is placed to the bottom of the capacitors. The top of the capacitors is boosted to 2 x VIN. By connecting the top of the capacitors to the output, one can ideally charge the output to 2 x VIN. Boosting the voltage on the top of the capacitors to 2VIN boosts the power efficiency 2 times. In 1:2 mode, the ideal power efficiency is VOUT/2 x VIN. For example, VIN = 2V, VOUT = 2 x VIN = 4V, the ideal power efficiency is 100%. When 3 x VIN > VOUT > 2 x VIN, the 1:3 mode (step-up) shown in Figure 24 is used. In charging phase, two flying capacitors are placed in parallel and each is charged to VIN. In the pumping phase, the two flying capacitors are placed in series and the input is connected to the bottom of the series connected capacitors. The top of the series connected capacitors is boosted to 3 x VIN. The ideal power efficiency is boosted 3 times and is equal to VOUT/ 3VIN. For example, VIN = 1V, VOUT = 3 x VIN = 3V, the ideal power efficiency is 100%. By connecting the output to the top of the series connected capacitors, one can charge the output to 3 x VIN. The internal logic in the FAN5602 monitors the input and the output compares them, and automatically selects the switch configuration to achieve the highest efficiency. The step-down modes 3:2, 2:1, and 3:1 can be understood by reversing the function of VIN and VOUT in the above discussion. The built-in modes improve power efficiency and extend the battery life. For example, if VOUT = 5V, mode 1:2 needs a minimum VIN = 2.5V. By built-in 1:3 mode, the minimum battery voltage is extended to 1.7V. Linear Regulation Loop The FAN5602 operates at constant frequency at load higher than 10mA. The linear regulation loop consisting of power transistors, feedback (resistor divider), and error amplifier is used to realize the regulation of the output voltage and to reduce the current spike. The error amplifier takes feedback and reference as inputs and generates the error voltage signal. The error voltage signal is then used as the gate voltage of the power transistor and modulates the on-resistance of the power transistor and, therefore, the charge transferred from the input to the output is controlled and the regulation of the output is realized. Since the charge transfer is controlled, the FAN5602 has a small ESR spike. Switch Array Switch Configurations The FAN5602 has seven built-in switch configurations, including 1:1, 3:2, 2:1 and 3:1 for step-down and 2:3, 1:2 and 1:3 for step-up. When 1.5 x VOUT > VIN > VOUT, the 1:1 mode shown in Figure 21 is used. In this mode, the internal oscillator is turned off. The power transistors connecting the input and the output become pass transistors and their gate voltages are controlled by the linear regulation loop, the rest of power transistors are turned off. In this mode, the FAN5602 operates exactly like a low dropout (LDO) regulator and the ripple of the output is in the micro-volt range. When 1.5 x VIN > VOUT > VIN, the 2:3 mode (step-up) shown in Figure 22 is used. In the charging phase, two flying capacitors are placed in series and each capacitor is charged to a half of the input voltage. In pumping phase, the flying capacitors are placed in parallel. The © 2005 Fairchild Semiconductor Corporation FAN5602 Rev. 1.5.3 www.fairchildsemi.com 9 FAN5602 — Universal (Step-Up/Step-Down) Charge Pump Regulated DC/DC Converter Switch Array Modes TOP C1+ S1A S2A C1 TOP S1A C1+ S1A S2A MID GND C1+ MID S3B S5 S4B GND C1C2 C1 C1C1- S3A Figure 21. Mode 1 (1:1) TOP Figure 22. Mode 2 (2:3 or 3:2) All Switches Set for Phase 1 and Reverse State for Phase 2 TOP C1+ S1A S2A S1B S2B MID C2+ C1+ S1A S2A S2B C2+ C1 MID C2 S3B C1 S3A C1S4A C2 C1S4A S5 S3B S4B C2- S4B C2- GND Figure 23. Mode 3 (1:2 or 2:1) All Switches Set for Phase 1 and Reverse State for Phase 2 Figure 24. Mode 4 (1:3 or 3:1) All Switches Set for Phase 1 and Reverse State for Phase 2 Light-Load Operation The power transistors used in the charge pump are very large in size. The dynamic loss from the switching the power transistors is not small and increases its proportion of the total power consumption as the load gets light. To save power, the FAN5602 switches, when the load is less than 10mA, from constant frequency to pulse-skipping mode (PFM) for modes 2:3(3:2), 1:2(2:1) and 1:3(3:1), except mode 1:1. In PFM mode, the linear loop is disabled and the error amplifier is turned off. A PFM comparator is used to setup an upper threshold and a lower threshold for the output. When the output is lower than the lower threshold, the oscillator is turned on and the charge pump starts working and keeps delivering charges from the input to the output until the output is higher than the upper threshold. The oscillator shuts off power transistors and delivers the charge to the output from the output capacitor. PFM operation is not used for Mode 1:1, even if at light load. Mode 1:1 is designed as an LDO with the oscillator off. The power transistors at LDO mode are not switching and therefore do not have the dynamic loss. Switching from linear operation to PFM mode (ILOAD10mA) is automatic, based on the load current, which is monitored all the time. Short Circuit When the output voltage is lower than 150mV, the FAN5602 enters short-circuit condition. In this condition, all power transistors are turned off. A small transistor shorting the input and the output turns on and charges the output. This transistor stays on as long as the VOUT