FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
August 2009
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
Features
6A Output Current W ide Input Range: 3V - 24V Output Voltage Range: 0.8V to 80% VIN Over 95% Peak Efficiency 1% Reference Accuracy Over Temperature Programmable Frequency Operation: 200KHz to 600KHz Fully Synchronous Operation with Integrated Schottky Diode on Low-Side MOSFET Boosts Efficiency Internal Bootstrap Diode Internal Soft-Start Power-Good Signal Starts on Pre-Biased Outputs Accepts Ceramic Capacitors on Output External Compensation for Flexible Design Programmable Current Limit Under-Voltage, Over-Voltage, and Thermal Protections 5x6mm, 25-Pin, 3-Pad MLP Package
Description
The FAN2106 TinyBuck™ is a highly efficient, smallfootprint, constant-frequency, 6A, integrated synchronous buck regulator. The FAN2106 contains both synchronous MOSFETs and a controller/driver with optimized interconnects in one package, which enables designers to solve highcurrent requirements in a small area with minimal external components. Integration helps to minimize critical inductances, making component layout simpler and more efficient compared to discrete solutions. The FAN2106 provides for external loop compensation, programmable switching frequency, and current limit. These features allow design flexibility and optimization. High-frequency operation allows for all-ceramic solutions. The summing current-mode modulator uses lossless current sensing for current feedback and over-current protection. Voltage feedforward helps operation over a wide input voltage range. Fairchild’s advanced BiCMOS power process, combined with low-RDS(ON) internal MOSFETs and a thermally efficient MLP package, provide the ability to dissipate high power in a small package. Output over-voltage, under-voltage, over-current, and thermal shutdown protections help protect the device from damage during fault conditions. FAN2106 prevents pre-biased output discharge during startup in point-of-load applications.
Applications
Servers & Telecom Graphics Cards & Displays Computing Systems Point-of-Load Regulation Set-Top Boxes & Game Consoles
Related Application Notes
AN-8022 — TinyCalc™ Calculator
Ordering Information
Part Number
FAN2106MPX FAN2106EMPX
Operating Temperature Range
-10°C to 85°C -40°C to 85°C
Package
Molded Leadless Package (MLP) 5x6mm Molded Leadless Package (MLP) 5x6mm
Eco Status
Green Green
Packing Method
Tape and Reel Tape and Reel
For Fairchild’s definition of please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
© 2009 Fairchild Semiconductor Corporation FAN2106 • Rev. 1.1.0
www.fairchildsemi.com
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
Typical Application Diagram
Figure 1. Typical Application
Block Diagram
Figure 2. Block Diagram
© 2009 Fairchild Semiconductor Corporation FAN2106 • Rev. 1.1.0
www.fairchildsemi.com 2
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
Pin Configuration
Figure 3. MLP 5x6mm Pin Configuration (Bottom View)
Pin Definitions
Pin #
P1, 6-12 P2, 2-5 P3, 21-23 1 13 14 15 16 17 18 19 20 24 25
Name
SW VIN PGND BOOT PGOOD EN VCC AGND ILIM R(T) FB COMP NC RAMP
Description
Switching Node. Junction of high-side and low-side MOSFETs. Power Input Voltage. Connect to the main input power source. Power Ground. Power return and Q2 source. High-Side Drive BOOT Voltage. Connect through capacitor (CBOOT) to SW. The IC includes an internal synchronous bootstrap diode to recharge the capacitor on this pin to VCC when SW is LOW. Power-Good Flag. An open-drain output that pulls LOW when FB is outside the limits specified in electrical specs. PGOOD does not assert HIGH until the fault latch is enabled. ENABLE. Enables operation when pulled to logic HIGH or left open. Toggling EN resets the regulator after a latched fault condition. This input has an internal pull-up when the IC is functioning normally. When a latched fault occurs, EN is discharged by a current sink. Input Bias Supply for IC. The IC’s logic and analog circuitry are powered from this pin. This pin should be decoupled to AGND through a >1µF X5R/X7R capacitor. Analog Ground. The signal ground for the IC. All internal control voltages are referred to this pin. Tie this pin to the ground island/plane through the lowest impedance connection. Current Limit. A resistor (RILIM) from this pin to AGND can be used to program the currentlimit trip threshold lower than the default setting. Oscillator Frequency. A resistor (RT) from this pin to AGND sets the PWM switching frequency. Output Voltage Feedback. Connect through a resistor divider to the output voltage. Compensation. Error amplifier output. Connect the external compensation network between this pin and FB. No Connect. This pin is not used. Ramp Amplitude. A resistor (RRAMP) connected from this pin to VIN sets the ramp amplitude and provides voltage feedforward functionality.
© 2009 Fairchild Semiconductor Corporation FAN2106 • Rev. 1.1.0
www.fairchildsemi.com 3
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.
Parameter
VIN to PGND VCC to AGND BOOT to PGND BOOT to SW SW to PGND All other pins ESD Continuous AGND = PGND
Conditions
Min.
Max.
28 6 35
Unit
V V V V V V kV
-0.3 -0.5 -5.0 -0.3 Human Body Model, JEDEC JESD22-A114 Charged Device Model, JEDEC JESD22-C101 2.0 2.5 Transient (t < 20ns, f < 600KHz)
6.0 24.0 30.0 VCC+0.3
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings.
Symbol
VCC VIN TA TJ fSW
Parameter
Bias Voltage Supply Voltage Ambient Temperature Junction Temperature Switching Frequency
Conditions
VCC to AGND VIN to PGND FAN2106MPX FAN2106EMPX
Min.
4.5 3 -10 -40 200
Typ.
5.0
Max.
5.5 24 +85 +85 +125 600
Unit
V V °C °C KHz
Thermal Information
Symbol
TSTG TL θJC θJ-PCB PD Storage Temperature Lead Soldering Temperature, 10 Seconds P1 (Q2) Thermal Resistance: Junction-to-Case P2 (Q1) P3 Thermal Resistance: Junction-to-Mounting Surface Power Dissipation, TA = 25°C 4 7 4 35
(1)
Parameter
Min.
-65
Typ.
Max.
+150 +300
Unit
°C °C °C/W °C/W
2.8
(1)
W
Note: 1. Typical thermal resistance when mounted on a four-layer, two-ounce PCB, as shown in Figure 26. Actual results are dependent on mounting method and surface related to the design.
© 2009 Fairchild Semiconductor Corporation FAN2106 • Rev. 1.1.0
www.fairchildsemi.com 4
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
Electrical Specifications
Electrical specifications are the result of using the circuit shown in Figure 1 with VIN = 12V, unless otherwise noted.
Parameter
Power Supplies VCC Current
Conditions
SW = Open, FB = 0.7V, VCC = 5V, fSW = 600KHz Shutdown: EN = 0, VCC = 5V Rising VCC Hysteresis RT = 50KΩ RT = 24KΩ
Min.
Typ.
Max.
Unit
8 7 4.1 4.3 300 255 540 300 600 50
12 10 4.5
mA µA V mV
VCC UVLO Threshold Oscillator Frequency Minimum On-Time
(2)
345 660 65
KHz KHz ns V
Ramp Amplitude, Peak-to-Peak Minimum Off-Time Reference Reference Voltage (VFB) Error Amplifier DC Gain
(2) (2) (3) (2)
16VIN, 1.8VOUT, RT = 30KΩ, RRAMP = 200KΩ
0.53 100 150 806 805
ns mV mV dB MHz
FAN2106MPX, TA = 25°C FAN2106EMPX, TA = 25°C
794 795 80
800 800 85 15
Gain Bandwidth Product Output Voltage (VCOMP)
VCC = 5V VCC = 5V, VCOMP = 2.2V VCC = 5V, VCOMP = 1.2V VFB = 0.8V, TA = 25°C RILIM Open, fSW = 500KHz, VOUT = 1.8V, RRAMP = 200KΩ, 16 Consecutive Cycles VCC = 5V, TA = 25°C Internal IC Temperature 2 Consecutive Clock Cycles 16 Consecutive Clock Cycles Measured at FB Pin Measured at FB Pin (VFB ~500mV)
12 0.4 1.5 0.8 -850
3.2 2.2 1.2 -650 -450
V mA mA nA
Output Current, Sourcing Output Current, Sinking FB Bias Current Protection and Shutdown Current Limit ILIM Current Over-Temperature Shutdown Over-Temperature Hysteresis Over-Voltage Threshold Under-Voltage Shutdown Fault Discharge Threshold Fault Discharge Hysteresis Soft-Start VOUT to Regulation (T0.8) Fault Enable/SSOK (T1.0)
6 -11
8 -10 +155 +30
10 -9
A µA °C °C
110 68
115 73 250 250 5.3 6.7
120 78
%VOUT %VOUT mV mV ms ms
Frequency = 600KHz
Continued on the following page…
© 2009 Fairchild Semiconductor Corporation FAN2106 • Rev. 1.1.0
www.fairchildsemi.com 5
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
Electrical Specifications (Continued)
Electrical specifications are the result of using the circuit shown in Figure 1 with VIN= 12V, unless otherwise noted.
Parameter
Control Functions EN Threshold, Rising EN Hysteresis EN Pull-Up Resistance EN Discharge Current FB OK Drive Resistance PGOOD Threshold (Compared to VREF) PGOOD Output Low VCC = 5V VCC = 5V VCC = 5V
Conditions
Min.
Typ.
1.35 250 800 1
Max.
2.00
Unit
V mV KΩ µA
Auto-Restart Mode, VCC = 5V FB < VREF, 2 Consecutive Clock Cycles FB > VREF, 2 Consecutive Clock Cycles IOUT < 2mA -14 +7
800 -11 +10 -8 +13 0.4
Ω %VREF %VREF V
Note: 2. Specifications guaranteed by design and characterization; not production tested. 3. See Figure 4 for Temperature Coefficient
© 2009 Fairchild Semiconductor Corporation FAN2106 • Rev. 1.1.0
www.fairchildsemi.com 6
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
Typical Characteristics
1.010 1.005 V FB 1.000 0.995 0.990 -50 0 50 Temperature (oC) 100 150
1.20
1.10 I FB 1.00
0.90
0.80 -50 0 50 Temperature (oC) 100 150
Figure 4. Reference Voltage (VFB) vs. Temperature, Normalized
Figure 5. Reference Bias Current (IFB) vs. Temperature, Normalized
1500 1200 900 600 300 0 0 20 40 60 80 100 120 140 RT (KΩ)
1.02
Frequency (KHz)
1.01 Frequency
600KHz
1.00
300KHz
0.99
0.98 -50 0 50 Temperature ( C)
o
100
150
Figure 6. Frequency vs. RT
Figure 7.
Frequency vs. Temperature, Normalized
1.60 1.40
I ILIM
1.04 1.02 1.00 0.98 0.96
RDS
1.20 1.00
Q1 ~0.32 %/ C
0.80 0.60 -50 0 50 Temperature ( C)
o
o
Q2 ~0.35 %/ C
100 150
-50 0 50 Temperature ( C)
o
o
100
150
Figure 8. RDS vs. Temperature, Normalized (VCC = VGS = 5V)
Figure 9.
ILIM Current (IILIM) vs. Temperature, Normalized
© 2009 Fairchild Semiconductor Corporation FAN2106 • Rev. 1.1.0
www.fairchildsemi.com 7
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
Application Circuit
FAN2106
Figure 10. Application Circuit: 1.8VOUT, 500KHz
Typical Performance Characteristics
Typical operating characteristics using the circuit shown in Figure 10. VIN=12V, VCC=5V, unless otherwise specified.
100 95
Dissipation (mW) 1400 1200 1000 800 600 400 200 0
Efficiency (%)
90 85 80 75 70 0 1 2 3 Load (A) 4 5 6
8VIN 12VIN 18VIN
8VIN 12VIN 18VIN
0
1
2
3 Load (A)
4
5
6
Figure 11.
100 95 Efficiency (%)
1.8VOUT Efficiency Over VIN vs. Load
Figure 12. 1.8VOUT Dissipation Over VIN vs. Load
100 95 Efficiency (%) 90
90 85
8VIN, 300KHz
85
VIN=12V
80
12VIN, 500KHz
80
300KHz 500KHz 700KHz
75 70 0 1 2 3 Load (A) 4 5 6
18VIN, 700KHz
75 70 0 1 2 3 Load (A) 4 5 6
Figure 13. 1.8VOUT Efficiency Over Frequency vs. Load (Circuit Value Changes)
Figure 14. 3.3VOUT Efficiency vs. Load (Circuit Value Changes)
© 2009 Fairchild Semiconductor Corporation FAN2106 • Rev. 1.1.0
www.fairchildsemi.com 8
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
Typical Performance Characteristics (Continued)
Typical operating characteristics using the circuit shown in Figure 10. VIN=12V, VCC=5V, unless otherwise specified.
VOUT VOUT SW SW
Figure 15. SW and VOUT Ripple, 6A Load
Figure 16. Startup with 1V Pre-Bias on VOUT
VOUT EN IOUT SW
Figure 17. Transient Response, 2-6A Load
Figure 18.
Re-Start on Fault
VOUT
VOUT
PGOOD
PGOOD EN
EN
Figure 19. Startup, 3A Load
Figure 20.
Shutdown, 3A Load
© 2009 Fairchild Semiconductor Corporation FAN2106 • Rev. 1.1.0
www.fairchildsemi.com 9
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
Circuit Description
PWM Generation
Refer to Figure 2 for the PWM control mechanism. FAN2106 uses the summing-mode method of control to generate the PWM pulses. An amplified current-sense signal is summed with an internally generated ramp and the combined signal is compared with the output of the error amplifier to generate the pulsewidth to drive the high-side MOSFET. Sensed current from the previous cycle is used to modulate the output of the summing block. The output of the summing block is also compared against a voltage threshold set by the RLIM resistor to limit the inductor current on a cycle-by-cycle basis. The RRAMP resistor helps set the charging current for the internal ramp and provides input voltage feedforward function. The controller facilitates external compensation for enhanced flexibility. Soft-start time is a function of switching frequency.
1.35V
2400 CLKs
EN
0.8V
FB
1.0V 0.8V Fault Latch Enable
SS
3200 CLKs
T0.8
4000 CLKs
Initialization
Once VCC exceeds the UVLO threshold and EN is HIGH, the IC checks for a shorted FB pin before releasing the internal soft-start ramp (SS). If the parallel combination of R1 and RBIAS is ≤ 1KΩ, the internal SS ramp is not released and the regulator does not start.
T1.0
Figure 22. Soft-Start Timing Diagram Cycling VCC or the EN pin discharges the internal SS and resets the IC. In applications where external EN signal is used, VIN and VCC should be established before the EN signal comes up to prevent skipping the soft-start function.
Enable
FAN2106 has an internal pull-up to the ENABLE (EN) pin so that the IC is enabled once VCC exceeds the UVLO threshold. Connecting a small capacitor across EN and AGND delays the rate of voltage rise on the EN pin. The EN pin also serves for the restart whenever a fault occurs (refer to the Auto-Restart section). If the regulator is enabled externally, the external EN signal should go HIGH only after VCC is established. For applications where such sequencing is required, FAN2106 can be enabled (after the VCC comes up) with external control, as shown in Figure 21.
FAN2106
Startup on Pre-Bias
The regulator does not allow the low-side MOSFET to operate in full synchronous rectification mode until internal SS ramp reaches 95% of VREF (~0.76V). This helps the regulator start on a pre-biased output and ensures that the pre-biased outputs are not discharged during soft-start.
Protections
The converter output is monitored and protected against extreme overload, short-circuit, over-voltage, under-voltage, and over-temperature conditions.
14 EN
Under-Voltage Shutdown
3.3n Figure 21. Enabling with External Control If the voltage on the FB pin remains below the undervoltage threshold for 16 consecutive clock cycles, the fault latch is set and the converter shuts down. This protection is not active until the internal SS ramp reaches 1.0V during soft-start.
Soft-Start
Once internal SS ramp has charged to 0.8V (T0.8), the output voltage is in regulation. Until SS ramp reaches 1.0V (T1.0), the fault latch is inhibited. To avoid skipping the soft-start cycle, it is necessary to apply VIN before VCC reaches its UVLO threshold. Normal sequence for powering up would be VIN VCC EN.
Over-Voltage Protection
If voltage on the FB pin exceeds 115% of VREF for two consecutive clock cycles, the fault latch is set and shutdown occurs. A shorted high-side MOSFET condition is detected when SW voltage exceeds ~0.7V while the low-side
© 2009 Fairchild Semiconductor Corporation FAN2106 • Rev. 1.1.0
www.fairchildsemi.com 10
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
MOSFET is fully enhanced. The fault latch is set immediately upon detection. The OV and high-side short fault protections are active all the time, including during soft-start.
Application Information
Bias Supply
The FAN2106 requires a 5V supply rail to bias the IC and provide gate-drive energy. Connect a ≥ 1.0µf X5R or X7R decoupling capacitor between VCC and PGND. Since VCC is used to drive the internal MOSFET gates, supply current is frequency and voltage dependent. Approximate VCC current (ICC) can be calculated using:
Over-Temperature Protection (OTP)
The chip incorporates an over-temperature protection circuit that sets the fault latch when a die temperature of about 150°C is reached. The IC restarts when the die temperature falls below 125°C.
Auto-Restart
After a fault, EN pin is discharged by a 1µA current sink to a 1.1V threshold before the internal 800KΩ pull-up is restored. A new soft-start cycle begins when EN charges above 1.35V. Depending on the external circuit, the FAN2106 can be configured to remain latched-off or to automatically restart after a fault. Table 1. Fault / Restart Configurations
ICC ( mA ) = 4.58 + [(
VCC − 5 + 0.013) • ( f − 128 )] 227
(1)
where frequency (f) is expressed in KHz.
Setting the Output Voltage
The output voltage of the regulator can be set from 0.8V to 80% of VIN by an external resistor divider (R1 and RBIAS in Figure 1). For output voltages > 5V, output current rating may need to be de-rated depending upon the ambient temperature, power dissipated in the package and the PCB layout. The external resistor divider is calculated using:
− 0 .8 V V 0 .8 V = OUT + 650nA RBIAS R1
EN Pin
Pull to GND
Controller / Restart State
OFF (Disabled) No Restart – Latched OFF Pull-up to VCC with 100K (After VCC Comes Up) Open Immediate Restart After Fault New Soft-Start Cycle After: Cap. to GND tDELAY (ms)=3.9 • C(nf) W hen EN is left open, restart is immediate. If auto-restart is not desired, tie the EN pin to the VCC pin or pull it HIGH after VCC comes up with a logic gate to keep the 1µA current sink from discharging EN to 1.1V. Figure 23 shows one method to pull up EN to VCC for a latch configuration. 15 VCC 100K
FAN2106
(2)
Connect RBIAS between FB and AGND. If R1 is open (see Figure 1), the output voltage is not regulated eventually causing a latched fault after the soft start is complete (T1.0) If the parallel combination of R1 and RBIAS is ≤ 1KΩ, the internal SS ramp is not released and the regulator does not start.
Setting the Switching Frequency
Switching frequency is determined by an external resistor, RT, connected between the R(T) pin and AGND:
R T ( KΩ ) =
(10 6 / f ) − 135 65
(3)
14 EN
where RT is in KΩ and frequency (f) is in KHz. The regulator cannot start if RT is left open.
Calculating the Inductor Value
3.3n Figure 23. Enable Control with Latch Option Typically the inductor value is chosen based on ripple current (ΔIL), which is chosen between 10 to 35% of the maximum DC load. Regulator designs that require fast transient response use a higher ripple-current setting, while regulator designs that require higher efficiency keep ripple current on the low side and operate at a lower switching frequency. The inductor value is calculated by the following formula:
Power-Good (PGOOD) Signal
PGOOD is an open-drain output that asserts LOW when VOUT is out of regulation, as measured at the FB pin. Thresholds are specified in the Electrical Specifications section. PGOOD does not assert HIGH until the fault latch is enabled (T1.0) (see Figure 22).
© 2009 Fairchild Semiconductor Corporation FAN2106 • Rev. 1.1.0
www.fairchildsemi.com 11
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
ΔIL =
VOUT • (1 - D) L•f
(4)
RAMP Signal VCOMP
where f is the switching frequency.
PW M
Setting the Ramp Resistor Value
RRAMP resistor plays a critical role in the design by providing charging current to the internal ramp capacitor and also serving as a means to provide input voltage feedforward. RRAMP is calculated by the following formula:
RRAMP ( KΩ ) = (VIN − 1.8 ) • VOUT (18 ) • VIN • f • 10 − 6
ILIM
VILIM To Counter
10 µ A
RILIM
Figure 24. ILIM Network
−2
(5)
where frequency (f) is expressed in KHz. For wide input operation, first calculate RRAMP for the minimum and maximum input voltage conditions and use larger of the two values calculated. In all applications, current through the RRAMP pin must be greater than 10µA from the equation below for proper operation:
The ILIM pin can source a 10µA current that can be used to establish a lower, temperature-dependent, current-limit threshold by connecting an external resistor (RILIM) to AGND. RILIM can be approximated with the equation:
RILIM(KΩ) = 0.45 • RDS • (1 + KT ) • (IOUT − ΔIL ) + 142.5 2
(7)
VIN − 1.8 ≥ 10 μA RRAMP + 2
(6)
If the calculated RRAMP values in Equation (5) result in a current less than 10µA, use the RRAMP value that satisfies Equation (6). In applications with large input ripple voltage, the RRAMP resistor should be adequately decoupled from the input voltage to minimize ripple on the RAMP pin.
where: I is desired current limit set point in Amps; RDS is expressed in mΩ; and KT is the normalized temperature coefficient of the lowside MOSFET (Q2) from Figure 8. Use 0.35 in equation. After 16 consecutive, pulse-by-pulse, current-limit cycles, the fault latch is set and the regulator shuts down. Cycling VCC or EN restores operation after a normal soft-start cycle (refer to the Auto-Restart section). The over-current protection fault latch is active during the soft-start cycle. Use 1% resistor for RILIM.
Setting the Current Limit
There are two levels of current-limit thresholds. The first level of protection is through an internal default limit set at the factory to limit output current beyond normal usage levels. The second level of protection is set externally at the ILIM pin by connecting a resistor (RILIM) between ILIM and AGND. Current-limit protection is enabled whenever the lower of the two thresholds is reached (see Figure 24). FAN2106 uses its internal lowside MOSFET for current-sensing. The current-limit threshold voltage (VILIM) is compared to a scaled version of voltage drop across the low-side MOSFET sampled at the end of each PWM off-time/cycle. The internal default threshold (with ILIM open) is temperature compensated. For a given RILIM and RRAMP setting, the current limit point varies slightly in an inverse relationship with respect to input voltage (VIN).
Loop Compensation
The loop is compensated using a feedback network around the error amplifier. Figure 25 shows a complete Type-3 compensation network. For Type-2 compensation, eliminate R3 and C3.
Figure 25. Compensation Network Since the FAN2106 employs a summing current-mode architecture, Type-2 compensation can be used for many applications. For applications that require wide loop bandwidth and/or use very low-ESR output capacitors, Type-3 compensation may be required.
© 2009 Fairchild Semiconductor Corporation FAN2106 • Rev. 1.1.0
www.fairchildsemi.com 12
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
RRAMP also provides feedforward compensation for changes in VIN. With a fixed RRAMP value, the modulator gain increases as VIN is reduced; this could make it difficult to compensate the loop. For low-input-voltagerange designs (3V to 8V), RRAMP and the compensation component values are different compared to designs with VIN between 8V and 24V. Application note AN-8022 (TinyCalc™) can be used to calculate the compensation components.
Recommended PCB Layout
Good PCB layout and careful attention to temperature rise is essential for reliable operation of the regulator. Four-layer PCB with two-ounce copper on the top and bottom sides and thermal vias connecting the layers are recommended. Keep power traces wide and short to minimize losses and ringing. Do not connect AGND to PGND below the IC. Connect the AGND pin to PGND at the output OR to the PGND plane.
SW
VIN GND GND
VOUT
Figure 26. Recommended PCB Layout
© 2009 Fairchild Semiconductor Corporation FAN2106 • Rev. 1.1.0
www.fairchildsemi.com 13
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
Physical Dimensions
2X
TOP VIEW
2X
RECOMMENDED LAND PATTERN ALL VALUES TYPICAL EXCEPT WHERE NOTED SIDE VIEW
SEATING PLANE
OPTIONAL LEAD DESIGN (LEADS# 1, 24 & 25 ONLY) SCALE: 1.5X
BOTTOM VIEW
A) DIMENSIONS ARE IN MILLIMETERS. B) DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) DESIGN BASED ON JEDEC MO-220 VARIATION WJHC E) TERMINALS ARE SYMMETRICAL AROUND THE X & Y AXIS EXCEPT WHERE DEPOPULATED. F) DRAWING FILENAME: MKT-MLP25AREV3
Figure 27. 5x6mm Molded Leadless Package (MLP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/.
© 2009 Fairchild Semiconductor Corporation FAN2106 • Rev. 1.1.0
www.fairchildsemi.com 14
www.fairchildsemi.com
FAN2106 — TinyBuck™ 3-24V Input, 6A, High Efficiency, Integrated Synchronous Buck Regulator
© 2009 Fairchild Semiconductor Corporation FAN2106 • Rev. 1.1.0
15
