FAN2560

FAN2560 — 350mA Low-VIN LDO with Fast Transient Response August 2009 FAN2560 350mA Low-VIN LDO with Fast Transient Response Features 55µA Typical Quiescent Current Up to 350mA Output Current 2.9V to 5.5V Bias Supply Voltage VOUT+0.1V to 5.5V Power Input Supply Voltage Fixed Voltage Options: 1.3V and 1.5V Thermal Shutdown Protection (TSD) Input Under-Voltage Lockout (UVLO) Short-Circuit Current Protection (SCP) 5-bump 0.96 x 1.33mm WLCSP Description The FAN2560 is a linear low-dropout (LDO) regulator with a split-supply architecture. Separate bias and supply inputs allow bias to be taken directly from the battery, while the input is taken from a lower preregulated source. This allows a smaller differential voltage between input and output, which provides greater efficiency over a wider VBAT range. The FAN2560 is available in a fixed-voltage output, 5-bump, WLCSP package. Applications Moderate Current Digital Loads DVB-H, DMB Processors Handsets, Smart Phones W LAN DC-DC Converter Modules PDA, DSC, PMP, and MP3 Players Portable Hard Disk Drives Typical Applications 2.9 to 5.5V VOUT +0.3V CIN VBAT VIN VOUT VBAT 2.9 to 5.5V VIN VOUT GND 1F FAN2560 GND CIN COUT 1μF FAN2560 2.2 F COUT 2.2μF EN EN Figure 1. Separate Supply and Bias Line Figure 2. Connected Supply and Bias Line Ordering Information Part Number FAN2560UC13X FAN2560UC15X Operating Temperature Range -40°C to 85°C -40°C to 85°C Package WLCSP-5 0.96 x 1.33mm WLCSP-5 0.96 x 1.33mm Eco Status Green Green Packing Method Tape and Reel Tape and Reel For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. © 2006 Fairchild Semiconductor Corporation FAN2560 • Rev. 1.0.1 www.fairchildsemi.com FAN2560 — 350mA Low-VIN LDO with Fast Transient Response Block Diagram Figure 3. IC Block Diagram Pin Configuration VIN A1 GND VBAT C1 B2 C3 EN A3 VOUT VOUT A3 B2 A1 VIN GND C1 VBAT EN C3 TOP VIEW BOTTOM VIEW Figure 4. 0.96 x 1.33mm WLCSP package Pin Definitions Pin # A1 A3 C1 C3 B2 Name VIN VOUT VBAT EN GND Description Power supply input. A minimum 1μF MLCC is required to GND. Output Voltage. A typical COUT=1μF to 2.2μF MLCC is required to GND, placed close to the VOUT terminal. Battery bias supply input. No capacitor is required unless another bulk capacitor is more than few inches away. Enable input. The device is in shutdown mode when the voltage at this pin is 1.1V. The EN latches the LOW logic state once externally forced. Do not leave this pin floating when the device is turned ON. Ground pin. Connect to a PCB GND plane. © 2006 Fairchild Semiconductor Corporation FAN2560 • Rev. 1.0.1 www.fairchildsemi.com 2 FAN2560 — 350mA Low-VIN LDO with Fast Transient Response Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VBAT, VIN, EN VOUT TJ TSTG TL ESD Output Voltage Junction Temperature Storage Temperature Parameter Min. -0.3 -0.3 -40 -65 Max. 6.0 VIN + 0.3V +150 +150 +260 Units V V °C °C °C kV Lead Soldering Temperature, 10 Seconds Electrostatic Discharge Protection Level Human Body Model per JESD22-A114 Charged Device Model per JESD22-C101 3.5 1.5 Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol VBAT VIN IOUT CIN COUT TA TJ Parameter Bias Supply Range, (VOUT + 1.4V) < VBAT Power Supply Range, (VIN < VBAT) Output Current Input Capacitor (Effective Capacitance) Equivalent Series Resistance (ESR) Output Capacitor (Effective Capacitance) Equivalent Series Resistance (ESR) Operating Ambient Temperature Range Operating Junction Temperature Range Min. 2.9 VOUT + VDO 0 0.7 0 0.7 3 -40 -40 Typ. Max. 5.5 VBAT 350 Units V V mA μF mΩ μF mΩ °C °C 1.0 300 2.2 12.0 300 +85 +125 Thermal Properties Symbol ΘJA Parameter Junction-to-Ambient Thermal Resistance Min. Typ. 180 (1) Max. Units °C/W Note: 1 Junction-to-ambient thermal resistance is a function of application and board layout. This data is measured with four-layer boards in accordance to JESD51- JEDEC standard. Special attention must be paid not to exceed junction temperature TJ(max) at a given ambient temperature TA. © 2006 Fairchild Semiconductor Corporation FAN2560 • Rev. 1.0.1 www.fairchildsemi.com 3 FAN2560 — 350mA Low-VIN LDO with Fast Transient Response Electrical Characteristics VBAT=2.9V to 5.5V, VIN=VOUT + 0.3V, TA=-40°C to +85°C, Test Circuit Figure 1, unless otherwise noted. Typical values are at TA=25°C, VBAT=3.6V, ILOAD=1mA, VEN=1.8V. Symbol Power Supplies VBAT VIN IBAT IIN IVBATSD IVINSD VUVLO V(EN) I(EN) Regulation IOUT VDO ∆VOUT ∆VOUTline ∆VOUTload ISCP Parameter Battery Input Supply Input Voltage Range VBAT Supply Current VIN Supply Current VBAT Shutdown Supply Current VIN shutdown Supply Current Under-voltage Lockout Threshold Enable High-level Input Voltage Enable Low-level Input Voltage Enable Input Leakage Current Maximum Output Current Dropout Voltage with Respect to Output Voltage Accuracy Line Regulation Load Regulation Short-circuit Current Limit (2) VIN Conditions (VOUT + 1.4V) < VBAT VIN < VBAT ILOAD=0µA ILOAD=0µA VBAT=3.6V, EN=GND VBAT=3.6V, EN=GND VBAT Falling Edge Hysteresis Min. 2.9 VOUT + VDO Typ. Max. 5.5 VBAT Units V V μA μA μA μA V V 55 4 0.01 0.01 2.0 0.05 1.1 70 11 1.00 1.00 2.4 0.4 EN=VIN or GND 350 ILOAD=350mA Over Full VIN, IOUT, and Temperature Range Over Full VIN, VBAT, IOUT Range VBAT and VIN applied, EN from L to H, no load, TA= -30C to +85C Hysteresis VIN, 10Hz to 10kHz VBAT, 10Hz to 10kHz 10Hz to 100kHz 3V