FAN5230QSC

www.fairchildsemi.com FAN5230 System Electronics Regulator for Mobile PCs Features • • • • • • • • • • • • • • • • • • • • • 5.4V to 24V input voltage range Five regulated outputs: 5V @ 5A (PWM) 3.3V @ 5A (PWM) 5V @ 50mA Always On (Linear) 3.3V @ 50mA Always On (Linear) 12V/Adjustable @ 120mA Boost (PWM) >96% efficiency Hysteretic mode for light loads PWM mode for normal loads Main regulators switch out of phase 300kHz fixed frequency switching RDS(ON) current sense over-current Reduced BOM; Max. efficiency Optional current sense resistor for precision over-current detect Power Good signal for all voltages Input under-voltage lock-out (UVLO) Thermal shutdown ACPI compliant 24-pin QSOP 2nd source by Intersil (IPM6220) Description The FAN5230 is a high efficiency and high precision multiple-output voltage regulator for notebook PC and other similar battery-powered applications. It integrates three pulse-width modulated (PWM) switching regulator controllers and two linear regulators to convert 5.4V-to-24V notebook battery power into the voltage used by the circuitry that surrounds the microprocessor in these systems. The two primary PWM controllers in the FAN5230 use synchronous-mode rectification to provide 3.3V and 5V at over 5A each. They switch out-of-phase to minimize input ripple-current. Utilization of both input and output voltage feedback in a current-mode control allows for fast and stable loop response over a wide range of input and output variations. PWM control in normal operation and hysteretic control under light load provides efficiency of greater than 95% over a wide range of input and output variations. The third PWM controller generates 12V at 120mA. A proprietary technology is used for accurate [± 1%] sensing of output current using the RDS(ON) of the external MOSFETs, eliminating external current sense resistors which saves board space and reduces BOM cost. Two integrated linear regulators provide stand-by ALWAYSON power at 3.3V and 5V for light (50mA) loads. Additional FAN5230 features include over-voltage, under-voltage, and over-current monitors and thermal shutdow protection. A single Power-Good signal is issued when soft start is completed and all outputs are within ± 10% of their settings. Applications • Notebook PCs • Web tablets • Battery-powered instruments REV. 2.8.5 10/17/01 FAN5230 Typical Application Vin = 5.4-24V FAN5230 1 VIN 3.3V-ALWAYS@50mA 5V-ALWAYS 2 3.3 ALW 3 CPUMP3.3 4 HSD3.3 3.3V @ 5A + 5 SW3.3 5V-ALWAYS@ 50mA 6 5V-ALW 7 LSD3.3 8 GND3.3 9 ISEN3.3 10 VFB3.3 SDN3.3 PGOOD 11 SDN3.3 12 PGOOD LSD5 20 GND5 19 VFB5 18 SDN5 17 SW12 16 VFB12 15 SGND 14 SDWN 13 SDWN VFB12 SDN5 12V @ 120mA + CPUMP5 24 HSD5 23 SW5 22 ISEN5 21 5V-ALWAYS 5V @ 5A + Pin Assignments Top View VIN 3.3V-ALWAYS CPUMP3.3 HSD3.3 SW3.3 5V-ALWAYS LSD3.3 GND3.3 ISEN3.3 VFB3.3 SDN3.3 PGOOD 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 CPUMP5 HSD5 SW5 ISEN5 LSD5 GND5 VFB5 SDN5 SW12 VFB12 SGND SDWN Pin Description Pin Name VIN 3.3V-ALWAYS CPUMP3.3 HSD3.3 SW3.3 5V-ALWAYS Pin Number Pin Function Description 1 2 3 4 5 6 Input power. 3.3V Always on linear regulator. Load current on pins 2 and 6 must not exceed 50mA total. This pin should be decoupled to ground with a 10µF capacitor. Charge Pump 3.3V. High side Gate drive voltage for 3.3V. This pin is to be connected to SW3.3 through a 100nF cap. and to 5V-ALWAYS through a diode High-side gate driver for 3.3V. Connect this pin directly to the gate of an N-channel MOSFET. The trace from this pin to the MOSFET gate should be < 1". High side FET Source and Low Side FET Drain Switching Node. Switching node for 3.3V. 5V Always on linear regulator output. The sum of the load currents on pins 2 and 6 must not exceed 50mA total. This pin should be decoupled to ground with a 10µF capacitor. 2 REV. 2.8.5 10/17/01 FAN5230 Pin Description (Continued) Pin Name LSD3.3 GND3.3 ISEN3.3 VFB3.3 SDN3.3 PGOOD SDWN Pin Number Pin Function Description 7 8 9 10 11 12 13 Low-side gate driver for 3.3V. Connect this pin directly to the gate of an N-channel MOSFET. The trace from this pin to the MOSFET gate should be < 1". Ground for 3.3V MOSFET. Current sense for 3.3V. This pin should be connected to the Drain of the bottom Mosfet with an appropriate resistor and an RC filter. See Application Section. Voltage feedback for 3.3V. Soft Start and ON/OFF for 3.3V. OFF=GND. ON=open with SDWN=High. Use open collector device for control. Power Good Flag. An open collector output that will be logic low if any output voltage is not above 89% of the nominal output voltage. Master Shutdown. Shutdown for all power. Off when low. When high 5V/3.3V-ALWAYS are ON while 5V/3.3V-Main are ready to turn on if SDN5, SDN3.3 go open. Signal ground. Voltage feedback for 12V. FET driver for 12V Boost. Enable/Soft Start for 5V and 12V. Soft start and ON/OFF for 5V & 12V. OFF=Grounded. ON=open with SDWN=High. Voltage feedback for 5V. Ground for 5V MOSFET. Low side FET driver for 5V. Connect this pin directly to the gate of an N-channel MOSFET. The trace from this pin to the MOSFET gate should be < 1". Current Sense for 5V. This pin should be connected to the drain of the bottom Mosfet using appropriate resistor and RC filter. See Application Section. High Side Driver Source and Low Side Driver Drain Switching Node. Switching node for 5V. High side FET driver for 5V. Connect this pin directly to the gate of an N-channel MOSFET. The trace from this pin to the MOSFET gate should be < 1". Charge Pump 5V. High side Gate drive voltage for 5V. High side Gate drive voltage for 5V. This pin is to be connected to SW5 through a 100nF cap. and to 5V-ALWAYS through a diode. SGND VFB12 SW12 SDN5 VFB5 GND5 LSD5 ISEN5 SW5 HSD5 CPUMP5 14 15 16 17 18 19 20 21 22 23 24 REV. 2.8.5 10/17/01 3 FAN5230 Absolute Maximum Ratings1 Parameter VIN SW, ISEN Pins,SDWN Pin CPUMP, HSD Pins SDN, VFB, V_always pins CPUMP to SW pins, and all other pins Conditions Min. -0.3 -0.3 -0.3 -0.3 -0.3 Typ. Max. 27 27 33 6.5 6.5 Units V V V V V The sum of the load currents on pins 2 and 6 must not exceed 60mA total Note: 1. Stresses beyond "Absolute Maximum Ratings" may cause permanent device damage. Continuous exposure to absolute maximum rating conditions may affect device reliability. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specification is not implied. Recommended Operating Conditions Input Voltage, VIN Ambient Temperature, TA +5.4V to 24V -20°C to 85°C Thermal Information Thermal Resistance, RTHJA Thermal Resistance, RTHJC Maximum Junction Temperature Storage Temperature Range Maximum Lead Temperature, Soldering 10 Sec 88°C/W 28.5°C/W 150°C -65°C to 150°C 300°C ELECTRICAL SPECIFICATIONS Operating Conditions Recommended Operating Conditions Unless Noted Refers to Block Diagrams Parameter Supply VIN Input Supply Voltage Input Quiescent Current (DC loading only) Note 1 H/LSD Open Stand-by Shut-down Input UVLO Threshold 5V and 3.3V Main Regulators Output Voltage Precision Oscillator Frequency, fosc HSD On-Resistance, pull up HSD On Resistance pull down LSD On-Resistance, pull up LSD On Resistance pull down 0.1 to 5.5A, 5.4 to 24V -2 255 300 7 4 6 5 +2 345 12 10 9 8 % kHz Ω Ω Ω Ω Rising Vbat hysteresis 4.3 5.4 1.4 300