FAN5361 — 6MHz, 600mA / 750mA Synchronous Buck Regulator
December 2010
FAN5361 6MHz, 600mA / 750mA Synchronous Buck Regulator
Features
6MHz Fixed-Frequency Operation 35µA Typical Quiescent Current Best-in-Class Load Transient Response Best-in-Class Efficiency 600mA or 750mA Output Current Capability 2.3V to 5.5V Input Voltage Range 1.0 to 1.90V Fixed Output Voltage Low Ripple Light-Load PFM Mode Forced PWM and External Clock Synchronization Internal Soft-Start Input Under-Voltage Lockout (UVLO) Thermal Shutdown and Overload Protection 6-bump WLCSP, 0.4mm Pitch 6-pin 2 x 2mm UMLP
Description
The FAN5361 is a 600mA or 750mA, step-down, switching voltage regulator that delivers a fixed output from a 2.3V to 5.5V input voltage supply. Using a proprietary architecture with synchronous rectification, the FAN5361 is capable of delivering a peak efficiency of 92%, while maintaining efficiency over 80% at load currents as low as 1mA. The regulator operates at a nominal fixed frequency of 6MHz, which reduces the value of the external components to 470nH for the output inductor and 4.7µF for the output capacitor. The PWM modulator can be synchronized to an external frequency source. At moderate and light loads, pulse frequency modulation is used to operate the device in power-save mode with a typical quiescent current of 35µA. Even with such a low quiescent current, the part exhibits excellent transient response during large load swings. At higher loads, the system automatically switches to fixed-frequency control, operating at 6MHz. In shutdown mode, the supply current drops below 1µA, reducing power consumption. For applications that require minimum ripple or fixed frequency, PFM mode can be disabled using the MODE pin. The FAN5361 is available in 6-bump, 0.4mm pitch, WaferLevel Chip-Scale Package (WLCSP) and a 6-lead 2 x 2mm ultra-thin MLP package (UMLP).
Applications
Cell Phones, Smart Phones ® Tablets, Netbooks , Ultra-Mobile PCs ® ® 3G, LTE, WiMAX™, WiBro , and WiFi Data Cards Gaming Devices, Digital CamerasDC/DC Micro Modules
Typical Applications
Figure 1. Typical Applications
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© 2008 Fairchild Semiconductor Corporation FAN5361 • Rev. 1.1.0
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FAN5361 — 6MHz, 600mA / 750mA Synchronous Buck Regulator
Ordering Information
Part Number
FAN5361UC123X FAN5361UC182X FAN5361UMP123X FAN5361UMP15X FAN5361UMP182X
Output (1) Voltage
1.233V 1.820V 1.233V 1.500V 1.820V
Package
WLCSP-6, 0.4mm Pitch
Temperature Range
Packing
–40 to +85°C 6-Lead, 2 x 2mm UMLP
Tape and Reel
Note: 1. Other voltage options available on request. Contact a Fairchild representative.
Pin Configurations MODE SW FB
A1 B1 A2 B2
VIN EN GND
Figure 3. WLCSP, Bumps Facing Up
C1
C2
Figure 2. WLCSP, Bumps Facing Down
Figure 4. UMLP, Leads Facing Down
Pin Definitions
Pin # WLCSP UMLP
A1 B1 C1 C2 B2 A2 3 2 1 6 5 4
Name Description
MODE. Logic 1 on this pin forces the IC to stay in PWM mode. A logic 0 allows the IC to MODE automatically switch to PFM during light loads. The regulator also synchronizes its switching frequency to four times the frequency provided on this pin. Do not leave this pin floating. SW FB GND EN VIN Switching Node. Connect to output inductor. Feedback / VOUT. Connect to output voltage. Ground. Power and IC ground. All signals are referenced to this pin. Enable. The device is in shutdown mode when voltage to this pin is 1.2V. Do not leave this pin floating. Input Voltage. Connect to input power source.
© 2008 Fairchild Semiconductor Corporation FAN5361 • Rev. 1.1.0
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FAN5361 — 6MHz, 600mA / 750mA Synchronous Buck Regulator
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.
Symbol
VIN VSW VCTRL Input Voltage Voltage on SW Pin EN and MODE Pin Voltage Other Pins ESD TJ TSTG TL Electrostatic Discharge Protection Level Junction Temperature Storage Temperature
Parameter
Min.
–0.3 –0.3 –0.3 –0.3
Max.
7.0 VIN + 0.3 VIN + 0.3 VIN + 0.3 4.0 1.5
(2) (2) (2)
Unit
V V V V kV
Human Body Model per JESD22-A114 Charged Device Model per JESD22-C101 –40 –65
+150 +150 +260
°C °C °C
Lead Soldering Temperature, 10 Seconds
Note: 2. Lesser of 7V or VIN+0.3V.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
VCC IOUT L CIN COUT TA TJ Supply Voltage Range Output Current Inductor Input Capacitor Output Capacitor
Parameter
Min.
2.3 0
Typ.
Max.
5.5 600
Unit
V mA µH µF
0.47 2.2 1.6 –40 –40 4.7 12.0 +85 +125
µF °C °C
Operating Ambient Temperature Operating Junction Temperature
Thermal Properties
Junction-to-ambient thermal resistance is a function of application and board layout. This data is measured with four-layer 1s2p boards in accordance to JEDEC standard JESD51. Special attention must be paid not to exceed junction temperature TJ(max) at a given ambient temperate TA.
Symbol
θJA
Parameter
Junction-to-Ambient Thermal Resistance WLCSP UMLP
Typical
150 49
Unit
°C/W °C/W
© 2008 Fairchild Semiconductor Corporation FAN5361 • Rev. 1.1.0
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FAN5361 — 6MHz, 600mA / 750mA Synchronous Buck Regulator
Electrical Characteristics
Minimum and maximum values are at VIN = VEN = 2.3V to 5.5V, VMODE = 0V (AUTO Mode), TA = -40°C to +85°C; circuit of Figure 1, unless otherwise noted. Typical values are at TA = 25°C, VIN = VEN = 3.6V.
Symbol
Power Supplies IQ I(SD) VUVLO VUVHYST VIH VIL VLHYST IIN fSW fSYNC Regulation
Parameter
Conditions
No Load, Not Switching PWM Mode VIN = 3.6V, EN = GND Rising VIN
Min.
Typ.
35 6 0.05 2.15 150
Max.
55 1.00 2.25
Unit
µA mA µA V mV V
Quiescent Current Shutdown Supply Current Under-Voltage Lockout Threshold Under-Voltage Lockout Hysteresis Enable HIGH-Level Input Voltage Enable LOW-Level Input Voltage Logic Input Hysteresis Voltage Enable Input Leakage Current Switching Frequency
(3) (3)
Logic Inputs: EN and MODE Pins 1.2 0.4 100 Pin to VIN or GND VIN = 3.6V, TA = 25°C Square Wave at MODE Input ILOAD = 0 to 750mA PWM Mode ILOAD = 0 to 600mA PWM Mode ILOAD = 0 to 600mA PWM Mode ILOAD = 0 to 600mA PWM Mode From EN Rising Edge VIN = VGS = 3.6V VIN = VGS = 3.6V VOUT = 1.233V, 1.5V, 1.82V VOUT = 1.9V CCM Only 900 5.4 1.3 1.862 1.862 1.784 1.784 1.470 1.470 1.207 1.207 0.01 6.0 1.5 1.900 1.900 1.820 1.820 1.500 1.500 1.233 1.233 180 350 225 1100 1375 150 15 1250 1.00 6.6 1.7 1.957 1.938 1.875 1.856 1.545 1.530 1.272 1.259 300 µs V V mV µA MHz MHz
Switching and Synchronization MODE Synchronization Range
1.900V 1.820V 1.500V 1.233V tSS Soft-Start PMOS On Resistance NMOS On Resistance PMOS Open-Loop Peak Current Limit Thermal Shutdown Thermal Shutdown Hysteresis
VO
Output Voltage Accuracy
Output Driver RDS(on) ILIM(OL) TTSD THYS mΩ mA °C °C
Notes: 3. Limited by the effect of tOFF minimum (see Figure 14 and Figure 15 in Typical Performance Characteristics). 4. The Electrical Characteristics table reflects open-loop data. Refer to Operation Description and Typical Characteristics for closed-loop data.
© 2008 Fairchild Semiconductor Corporation FAN5361 • Rev. 1.1.0
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FAN5361 — 6MHz, 600mA / 750mA Synchronous Buck Regulator
Typical Performance Characteristics
Unless otherwise noted, VIN = VEN = 3.6V, VMODE = 0V (AUTO Mode), VOUT = 1.82V, TA = 25°C.
100% 95% 90% 85%
100% 95% 90% 85%
Efficiency
75% 70% 65% 60% 55% 50% 1 10 100
Auto 2.3VIN Auto 2.7VIN Auto 3.6VIN Auto 4.2VIN
Efficiency
80%
80% 75% 70% 65% 60% 55% 50% -30C 85C 25C
1000
1
10
100
1000
I LOAD Output Current (mA)
I LOAD Output Current (mA)
Figure 5. Efficiency vs. Load Current and Input Supply Figure 6. Efficiency vs. Load Current and Temperature
100% 95% 90% 85%
100% 95% 90% 85%
Efficiency
80% 75% 70% 65% 60% 55% 50% 1 10 100 1000 VIN=2.3V VIN=2.7V VIN=3.6V VIN=4.2V
Efficiency
80% 75% 70% 65% 60% 55% 50% 1 10 100 1000 Auto PFM/PWM
Forced PWM
I LOAD Output Current (mA)
I LOAD Output Current (mA)
Figure 7. 1.233VOUT Efficiency vs. Load Current and Supply
Figure 8. Efficiency, Auto PWM/PFM vs. Forced PWM
1.84
1.248 VIN=2.3V 1.243
1.83
VIN=2.7V VIN=3.6V
VOUT (V)
1.238
VIN=4.2V
VOUT (V)
1.82
VIN=2.3V VIN=2.7V
1.81
1.233
VIN=3.6V VIN=4.2V
1.80 0 100 200 300 400 500 600
1.228
1.223 0.0 0.1 0.2 0.3 0.4 0.5 0.6
Load Current (mA)
I LOAD Output Current (A)
Figure 9. Load Regulation
© 2008 Fairchild Semiconductor Corporation FAN5361 • Rev. 1.1.0
Figure 10. 1.233VOUT Load Regulation vs. Input Supply
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FAN5361 — 6MHz, 600mA / 750mA Synchronous Buck Regulator
Typical Performance Characteristics (Continued)
Unless otherwise noted, VIN = VEN = 3.6V, VMODE = 0V (AUTO Mode), VOUT = 1.82V, TA = 25°C.
1.830
45 40 3.6VIN 5.5VIN 2.5VIN
1.825
35
1.820
30 Vout (mVpp)
Auto PWM/PFM Forced PWM 1 10 100 1,000
VOUT (V)
25 20 15
1.815
1.810
10 5 0 0 100 200 300 Load Current (mA) 400 500 600
1.805
I LOAD Output Current (mA)
Figure 11. Load Regulation, Auto PFM / PWM and Forced PWM
30
Figure 12. 1.82VOUT Peak-to-Peak Output Voltage Ripple
7
FPWM Mode
25
5.5VIN 2.5VIN
S witching Frequency (MHz)
3.6VIN
6
20 Vout (mVpp)
5
15
4
10
3
VIN>2.9V VIN=2.7V
5
2
VIN=2.5V VIN=2.3V
0 0 100 200 300 Load Current (mA) 400 500 600
1 0 0.1 0.2 0.3 0.4 0.5 0.6
Load Current (A)
Figure 13. 1.233VOUT Peak-to-Peak Output Voltage Ripple
7
Figure 14. Effect of tOFF(MIN) on Reducing Switching Frequency
350 300 250 200 150 100
FPWM Mode Switching Frequency (MHz)
6
Always PWM
4
Load Current (mA)
5
The switching mode changes at these borders
3
2
VIN>2.4V
Always PFM
1
50
VIN=2.3V
0
0 0.1 0.2 0.3 0.4 0.5 0.6
PFM border PWM border
0
2.5
3.0
3.5
4.0 Input Voltage (V)
4.5
5.0
5.5
Load Current (A)
Figure 15. 1.233VOUT Effect of tOFF(MIN) on Reducing Switching Frequency
Figure 16. PFM / PWM Boundaries
© 2008 Fairchild Semiconductor Corporation FAN5361 • Rev. 1.1.0
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FAN5361 — 6MHz, 600mA / 750mA Synchronous Buck Regulator
Typical Performance Characteristics (Continued)
Unless otherwise noted, VIN = VEN = 3.6V, VMODE = 0V (AUTO Mode), VOUT = 1.82V, TA = 25°C.
250
42
Always PWM
200
40
150 100
The switching mode changes at these borders
Quiescent Current ( μ A)
Load Current (mA)
38
36
Always PFM
50 0 2.5 3.0 3.5 4.0 Input Voltage (V) 4.5 5.0 5.5 PFM border PWM border
34
32
VEN=VIN VEN=1.8V
30 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
VIN Input Voltage (V)
Figure 17. 1.233VOUT PFM / PWM Boundaries
0.20 0.18 0.16 VIN=5.5V VEN=0V
Figure 18. Quiescent Current vs. Input Voltage
Supply Current (µA)
0.14 0.12 0.10 0.08 0.06 0.04 0.02 0.00 -40 -20 0 20 40 60 80
Ambient Temperature (°C)
Figure 19. Shutdown Current vs. Temperature
© 2008 Fairchild Semiconductor Corporation FAN5361 • Rev. 1.1.0
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FAN5361 — 6MHz, 600mA / 750mA Synchronous Buck Regulator
Typical Performance Characteristics (Continued)
Unless otherwise noted, VIN = VEN = 3.6V, VMODE = 0V (AUTO Mode), VOUT = 1.82V, TA = 25°C, 5µs/div. horizontal sweep.
Figure 20. Line Transient 3.3VIN to 3.9VIN, 50mA Load, 10µs/div.
Figure 21. Line Transient 3.3VIN to 3.9VIN, 250mA Load, 10µs/div.
Figure 22. Combined Line/Load Transient 3.9 to Figure 23. Combined Line/Load Transient 3.3 to 3.9VIN 3.3VIN Combined with 40mA to 400mA Load Transient Combined with 400mA to 40mA Load Transient
Figure 24. Load Transient 0 to 150mA, 2.5VIN
Figure 25. Load Transient 50 to 250mA, 2.5VIN
© 2008 Fairchild Semiconductor Corporation FAN5361 • Rev. 1.1.0
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FAN5361 — 6MHz, 600mA / 750mA Synchronous Buck Regulator
Typical Performance Characteristics (Continued)
Unless otherwise noted, VIN = VEN = 3.6V, VMODE = 0V (AUTO Mode), VOUT = 1.82V, TA = 25°C, 5µs/div. horizontal sweep.
Figure 26. Load Transient 150 to 400mA, 2.5VIN
Figure 27. Load Transient 0 to 150mA, 3.6VIN
Figure 28. Load Transient 50 to 250mA, 3.6VIN
Figure 29. Load Transient 150 to 400mA, 3.6VIN
Figure 30. Load Transient 0 to 150mA, 4.5VIN
Figure 31. Load Transient 50 to 250mA, 4.5VIN
Figure 32. Load Transient 150 to 400mA, 4.5VIN
© 2008 Fairchild Semiconductor Corporation FAN5361 • Rev. 1.1.0 www.fairchildsemi.com 9
FAN5361 — 6MHz, 600mA / 750mA Synchronous Buck Regulator
Typical Performance Characteristics (Continued)
Unless otherwise noted, VIN = VEN = 3.6V, VMODE = 0V (AUTO Mode), VOUT = 1.82V, TA = 25°C, 5µs/div. horizontal sweep.
Figure 33. Metallic Short Applied at VOUT, 50μs/div.
Figure 34. Metallic Short Applied at VOUT
Figure 35. Over-Current Fault Response, RLOAD = 1Ω, 50μs/div.
Figure 36. Over-Current Fault Response, RLOAD = 1Ω
Figure 37. Overload Recovery to Light Load, 50μs/div.
Figure 38. Soft-Start, RLOAD = 50Ω, 20μs/div.
© 2008 Fairchild Semiconductor Corporation FAN5361 • Rev. 1.1.0
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FAN5361 — 6MHz, 600mA / 750mA Synchronous Buck Regulator
Typical Performance Characteristics (Continued)
Unless otherwise noted, VIN = VEN = 3.6V, VMODE = 0V (AUTO Mode), VOUT = 1.82V, TA = 25°C.
Figure 39. SW-Node Jitter (Infinite Persistence), ILOAD = 200mA, 50ns/div.
Figure 40. Power Supply Rejection Ratio at 300mA Load
© 2008 Fairchild Semiconductor Corporation FAN5361 • Rev. 1.1.0
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FAN5361 — 6MHz, 600mA / 750mA Synchronous Buck Regulator
Operation Description
The FAN5361 is a 600mA or 750mA, step-down, switching voltage regulator that delivers a fixed output from an input voltage supply of 2.3V to 5.5V. Using a proprietary architecture with synchronous rectification, the FAN5361 is capable of delivering a peak efficiency of 92%, while maintaining efficiency over 80% at load currents as low as 1mA. The regulator operates at a nominal frequency of 6MHz at full load, which reduces the value of the external components to 470nH for the inductor and 4.7µF for the output capacitor. To prevent shut-down during soft-start, the following condition must be met:
IDISP + ILOAD < IMAX(DC)
(2)
where IMAX(DC) is the maximum load current the IC is guaranteed to support (600mA or 750mA). Table 1 shows combinations of COUT that allow the IC to start successfully with the minimum RLOAD that can be supported. Table 1. Minimum RLOAD Values for Soft-Start with Various COUT Values COUT 4.7μF, 0402 2 X 4.7μF, 0402 10μF, 0603 10μF, 0805 Minimum RLOAD VOUT / 0.60 VOUT / 0.60 VOUT / 0.60 VOUT / 0.50
Control Scheme
The FAN5361 uses a proprietary, non-linear, fixed-frequency PWM modulator to deliver a fast load transient response, while maintaining a constant switching frequency over a wide range of operating conditions. The regulator performance is independent of the output capacitor ESR, allowing for the use of ceramic output capacitors. Although this type of operation normally results in a switching frequency that varies with input voltage and load current, an internal frequency loop holds the switching frequency constant over a large range of input voltages and load currents. For very light loads, the FAN5361 operates in discontinuous current (DCM) single-pulse PFM mode, which produces low output ripple compared with other PFM architectures. Transition between PWM and PFM is seamless, with a glitch of less than 18mV at VOUT during the transition between DCM and CCM modes. Combined with exceptional transient response characteristics, the very low quiescent current of the controller (35µA) maintains high efficiency; even at very light loads, while preserving fast transient response for applications requiring tight output regulation.
Startup into Large COUT
Multiple soft-start cycles are required for no-load startup if COUT is greater than 15μF. Large COUT requires light initial load to ensure the FAN5361 starts appropriately. The IC shuts down for 85μs when IDISP exceeds ILIMIT for more than 21μs of current limit. The IC then begins a new soft-start cycle. Since COUT retains its charge when the IC is off, the IC reaches regulation after multiple soft-start attempts.
MODE Pin
Logic 1 on this pin forces the IC to stay in PWM mode. A logic 0 allows the IC to automatically switch to PFM during light loads. If the MODE pin is toggled, the converter synchronizes its switching frequency to four times the frequency on the mode pin (fMODE). The MODE pin is internally buffered with a Schmitt trigger, which allows the MODE pin to be driven with slow rise and fall times. An asymmetric duty cycle for frequency synchronization is also permitted as long as the minimum time below VIL(MAX) or above VIH(MAX) is 100ns.
Enable and Soft-Start
When EN is LOW, all circuits in FAN5361 are off and the IC draws ~50nA of current. When EN is HIGH and VIN is above its UVLO threshold, the regulator begins a soft-start cycle. The output ramp during soft-start is a fixed slew rate of 50mV/μs from 0 to 1 VOUT, then 12.5mV/μs until the output reaches its setpoint. Regardless of the state of the MODE pin, PFM mode is enabled to prevent current from being discharged from COUT if soft-start begins when COUT is charged. The IC may fail to start if heavy load is applied during startup and/or if excessive COUT is used. This is due to the currentlimit fault response, which protects the IC in the event of an over-current condition present during soft-start. The current required to charge COUT during soft-start is commonly referred to as “displacement current” is given as:
Current Limit, Fault Shutdown, and Restart
A heavy load or short circuit on the output causes the current in the inductor to increase until a maximum current threshold is reached in the high-side switch. Upon reaching this point, the high-side switch turns off, preventing high currents from causing damage. The regulator continues to limit the current cycle-by-cycle. After 21µs of current limit, the regulator triggers an over-current fault, causing the regulator to shut down for about 85μs before attempting a restart. If the fault was caused by short circuit, the soft-start circuit attempts to restart and produces an over-current fault after about 32μs, which results in a duty cycle of less than 30%, limiting power dissipation. The closed-loop peak-current limit, ILIM(PK), is not the same as the open-loop tested current limit, ILIM(OL), in the Electrical Characteristics table. This is primarily due to the effect of propagation delays of the IC current limit comparator.
IDISP = COUT •
where the
dV dt
(1)
dV term refers to the soft-start slew rate above. dt
© 2008 Fairchild Semiconductor Corporation FAN5361 • Rev. 1.1.0
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FAN5361 — 6MHz, 600mA / 750mA Synchronous Buck Regulator
Under-Voltage Lockout (UVLO)
When EN is HIGH, the under-voltage lockout keeps the part from operating until the input supply voltage rises high enough to properly operate. This ensures no misbehavior of the regulator during startup or shutdown.
When VIN is LOW, fixed switching is maintained as long as VOUT ≤ 1 − tOFF ( MIN ) • fSW ≈ 0.7 . VIN The switching frequency drops when the regulator cannot provide sufficient duty cycle at 6MHz to maintain regulation. This occurs when VOUT is greater than or equal to 1.82V and VIN is below 2.9V at high load currents (see Figure 15). The calculation for switching frequency is given by: ⎛ ⎞ 1 fSW = min ⎜ , 6MHz ⎟ ⎜ t SW ( MAX ) ⎟ ⎝ ⎠ where:
⎛ VOUT + IOUT • ROFF tSW ( MAX ) = 50ns • ⎜1 + ⎜ V −I IN OUT • RON − VOUT ⎝ ⎞ ⎟ ⎟ ⎠
(4) (3)
Thermal Shutdown (TSD)
When the die temperature increases, due to a high load condition and/or a high ambient temperature, the output switching is disabled until the temperature on the die has fallen sufficiently. The junction temperature at which the thermal shutdown activates is nominally 150°C with a 15°C hysteresis.
Minimum Off-Time Effect on Switching Frequency
tOFF(MIN) is 50ns. This imposes constraints on the maximum VOUT that the FAN5361 can provide, or the maximum VIN output voltage it can provide at low VIN while maintaining a fixed switching frequency in PWM mode.
where: ROFF RON
= RDSON _ N + DCRL
= RDSON _ P + DCRL
© 2008 Fairchild Semiconductor Corporation FAN5361 • Rev. 1.1.0
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FAN5361 — 6MHz, 600mA / 750mA Synchronous Buck Regulator
Applications Information
Selecting the Inductor
The output inductor must meet both the required inductance and the energy handling capability of the application. The inductor value affects average current limit, the PWM-toPFM transition point, output voltage ripple, and efficiency. The ripple current (∆I) of the regulator is:
ΔI ≈ VOUT ⎛ VIN − VOUT •⎜ ⎜ L•f VIN SW ⎝ ⎞ ⎟ ⎟ ⎠
IRMS =
IOUT(DC) +
2
ΔI2 12
(8)
The increased RMS current produces higher losses through the RDS(ON) of the IC MOSFETs, as well as the inductor DCR. Increasing the inductor value produces lower RMS currents, but degrades transient response. For a given physical inductor size, increased inductance usually results in an inductor with lower saturation current and higher DCR. Table 2 shows the effects of inductance higher or lower than the recommended 470nH on regulator performance.
(5)
The maximum average load current, IMAX(LOAD), is related to the peak current limit, ILIM(PK) by the ripple current, given by:
IMAX(LOAD ) = ILIM(PK ) −
ΔI 2
(6)
Output Capacitor
Table 3 suggests 0402 capacitors. 0603 capacitors may further improve performance in that the effective capacitance is higher. This improves transient response and output ripple. Increasing COUT has no effect on loop stability and can therefore be increased to reduce output voltage ripple or to improve transient response. Output voltage ripple, ∆VOUT, is:
⎛ ⎞ 1 ΔVOUT = ΔI • ⎜ + ESR ⎟ ⎜ 8 •C ⎟ • fSW OUT ⎝ ⎠
The transition between PFM and PWM operation is determined by the point at which the inductor valley current crosses zero. The regulator DC current when the inductor current crosses zero, IDCM, is:
IDCM =
ΔI 2
(7)
(9)
The FAN5361 is optimized for operation with L = 470nH, but is stable with inductances up to 1.2μH (nominal). Up to 2.2μH(nominal) may be used; however, in that case, VIN must be greater than or equal to 2.7V. The inductor should be rated to maintain at least 80% of its value at ILIM(PK). Efficiency is affected by the inductor DCR and inductance value. Decreasing the inductor value for a given physical size typically decreases the DCR; but since ∆I increases, the RMS current increases, as do the core and skin effect losses.
Input Capacitor
The 2.2μF ceramic input capacitor should be placed as close as possible between the VIN pin and GND to minimize the parasitic inductance. If a long wire is used to bring power to the IC, additional “bulk” capacitance (electrolytic or tantalum) should be placed between CIN and the power source lead to reduce ringing that can occur between the inductance of the power source leads and CIN. The effective capacitance value decreases as VIN increases due to DC bias effects.
Table 2. Effects of Changes in Inductor Value (from 470nH Recommended Value) on Regulator Performance
Inductor Value
Increase Decrease
IMAX(LOAD)
Increase Decrease
∆VOUT
Decrease Increase
Transient Response
Degraded Improved
Table 3. Recommended Passive Components and their Variation Due to DC Bias
Component Description
L1 470nH, 2012, 90mΩ,1.1A 2.2μF, 6.3V, X5R, 0402 4.7μF, X5R, 0402
Vendor
Murata LQM21PNR47MC0 Murata LQM21PNR54MG0 Hitachi Metals HSLI-201210AG-R47 Murata or Equivalent GRM155R60J225ME15 GRM188R60J225KE19D Murata or Equivalent GRM155R60G475M GRM155R60E475ME760
Min.
Typ.
Max.
(5)
Comment
Minimum value occurs at maximum current Decrease primarily due to DC bias (VIN) and elevated temperature Decrease primarily due to DC bias (VOUT)
300nH 470nH
520nH
CIN COUT
1.0μF 1.6μF
2.2μF 4.7μF
2.4μF 5.2μF
Note: 5. Higher inductance values are also acceptable. See “Selecting the Inductor” instructions in Applications Information.
© 2008 Fairchild Semiconductor Corporation FAN5361 • Rev. 1.1.0
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FAN5361 — 6MHz, 600mA / 750mA Synchronous Buck Regulator
PCB Layout Guidelines
There are only three external components: the inductor and the input and output capacitors. For any buck switcher IC, including the FAN5361, it is important to place a low-ESR input capacitor very close to the IC, as shown in Figure 41. The input capacitor ensures good input decoupling, which helps reduce noise appearing at the output terminals and ensures that the control sections of the IC do not behave erratically due to excessive noise. This reduces switching cycle jitter and ensures good overall performance. It is important to place the common GND of CIN and COUT as close as possible to the FAN5361 C2 terminal. There is some flexibility in moving the inductor further away from the IC; in that case, VOUT should be considered at the COUT terminal.
VIN
A1 B1 A2 B2 C2
CIN GND
470nH
C1
COUT VOUT
Figure 41. PCB Layout Guidance
© 2008 Fairchild Semiconductor Corporation FAN5361 • Rev. 1.1.0
www.fairchildsemi.com 15
FAN5361 — 6MHz, 600mA / 750mA Synchronous Buck Regulator
Physical Dimensions
0.03 C 2X BALL A1 INDEX AREA F E A B A1 0.40
(Ø0.30) Solder Mask Opening
0.40
(Ø0.20) Cu Pad
D
F 0.03 C 2X
TOP VIEW
0.06 C 0.05 C 0.625 0.547 E
RECOMMENDED LAND PATTERN (NSMD PAD TYPE)
0.378±0.018 0.208±0.021
C
SEATING PLANE
D
SIDE VIEWS
Ø0.260±0.010 6X 0.40 C B A 12 (X) +/-0.018 0.005 (Y) +/-0.018 F CAB
NOTES:
A. NO JEDEC REGISTRATION APPLIES. B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASMEY14.5M, 1994. D. DATUM C, THE SEATING PLANE IS DEFINED BY THE SPHERICAL CROWNS OF THE BALLS. E. PACKAGE TYPICAL HEIGHT IS 586 MICRONS ±39 MICRONS (547-625 MICRONS). F. FOR DIMENSIONS D, E, X, AND Y SEE PRODUCT DATASHEET. G. DRAWING FILENAME: UC006ACrev4.
0.40
BOTTOM VIEW
Figure 42. 6-Bump WLCSP, 0.4mm Pitch
Product-Specific Dimensions
Product
FAN5361UCX
D
1.370 +/-0.040
E
0.970 +/-0.040
X
0.285
Y
0.285
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/.
© 2008 Fairchild Semiconductor Corporation FAN5361 • Rev. 1.1.0
www.fairchildsemi.com 16
FAN5361 — 6MHz, 600mA / 750mA Synchronous Buck Regulator
Physical Dimensions
0.10 C
2X
2.0
A B
2.0
6
1.60 1.50
4
0.50 0.10 C PIN1 IDENT
2X TOP VIEW
1.10
1.40
2.40
1
3
0.55 MAX 0.10 C 0.08 C (0.15)
0.65
0.30
0.05 0.00
RECOMMENDED LAND PATTERN
C
SEATING PLANE
SIDE VIEW
NOTES:
PIN1 IDENT
1
1.50 MAX
3
A. OUTLINE BASED ON JEDEC REGISTRATION MO-229, VARIATION VCCC. B. DIMENSIONS ARE IN MILLIMETERS.
1.10 MAX
6x
0.35 0.25
6 4
C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. D. DRAWING FILENAME: MKT-UMLP06Crev1
0.65 1.30
0.35 6x 0.25 0.10 C A B 0.05 C
BOTTOM VIEW
Figure 43. 6-Lead, 2 x 2mm, Ultra-Thin Molded Leadless Package (UMLP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/.
© 2008 Fairchild Semiconductor Corporation FAN5361 • Rev. 1.1.0
www.fairchildsemi.com 17
FAN5361 — 6MHz, 600mA / 750mA Synchronous Buck Regulator
© 2008 Fairchild Semiconductor Corporation FAN5361 • Rev. 1.1.0
www.fairchildsemi.com 18