FAN6103 — Power Supply Supervisor Plus PWM
October 2009
FAN6103 Power Supply Supervisor Plus PWM
Features
PC Half-Bridge Power Supply Supervisor Plus PWM High Integration, Few External Components Over-Voltage Protection for 3.3V, 5V, and 12V Under-Voltage Protection for 3.3V, 5V, and 12V Under-Voltage protection for –12V and/or –5V Over-Power and Short-Circuit Protection Power-Down Warning Circuitry Power-Good Circuitry Delay Time for PSON and PG Signal Remote ON/OFF Function On-Chip Oscillator and Error Amplifier Latching PWM for Cycle-By-Cycle Switching Push-Pull PWM Operation and Totem-Pole Outputs Soft-Start and Maximum 93% Duty Cycle
Description
FAN6103 controller is designed for switching mode power supply for desktop PCs. It provides all the functions necessary to monitor and control the output of the power supply. Remote ON/OFF control, power good circuitry, and protection features against over-voltage and over-power are implemented. It directly senses all the output rails for OVP without the need of external dividers. An innovated AC-signal sampling circuitry provides a sufficient power-down warning signal for PG. A built-in timer generates accuracy timing for control circuit, including the PS-off delay. The cycle-by-cycle PWM switching prevents the power transformer from saturation and ensures the fastest response for the short-circuit protection, which greatly reduces the stress for power transistors. Utilizing minimum external components, the FAN6103 includes all of the functions for push-pull and/or halfbridge topology, decreasing the production cost and PCB space, while increasing the mean time between failures for power supply
Applications
Desktop PC Power Supply
Ordering Information
Part Number
FAN6103NZ
Operating Temperature Range
-40°C to +105°C
Eco Status
RoHS
Package
16-Pin Dual Inline Package (DIP)
Packing Method
Tube
For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
© 2009 Fairchild Semiconductor Corporation FAN6103 • Rev. 1.0.0
www.fairchildsemi.com
FAN6103 — Power Supply Supervisor Plus PWM
Application Diagram
-1 2V
12V
5V
3 .3 V
3 .3 V C o n tro lle r U VAC V33 V5 V12 VC C PG PSON V DD NVP RI GN D OP2 OPP FA N 6 1 0 3 IN C OM P SS 5V sb Pok PSon -1 2V -5 V
OP1
Figure 1. Typical Application
© 2009 Fairchild Semiconductor Corporation FAN6103 • Rev. 1.0.0
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FAN6103 — Power Supply Supervisor Plus PWM
Block Diagram
V 33 V5 V 12 UVAC RI PG GN D VCC
2
3
7
5
2 µA
15
V REF
10
11
16
0.7V
D SD D e la y 3 0 0m s
UV D e te cto r OV P ro te cto r UV P ro te cto r
D e la y 3ms
D
SET
Q Q
9
OP 1
CL R
S
SET
Q Q
8
OP 2
3.2V
VCC 5V
64 µA 2.1V
D
SET
R
CL R
Q Q
O .S . C
NVP OP P
6 4
B u ffe r
2.4V
D e la y 7m s
CL R
2.5V
8 µA
B u ffe r
D e la y 7m s
V CC
D e la y 1 5m se c
1.4V
P S ON
1
On/Off D elay 50 / 16ms
D e la y 2m s
14
SS
13
IN
12
C OM P
Figure 2. Function Block Diagram
Marking Information F – Fairchild Logo Z – Plant Code X – 1-Digit Year Code Y – 1-Digit Week Code TT – 2 -Digit Die Run Code T – Package Type (N:DIP) P – Z: Pb Free M – Manufacture Flow Code
Figure 3. Top Mark
© 2009 Fairchild Semiconductor Corporation FAN6103 • Rev. 1.0.0
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FAN6103 — Power Supply Supervisor Plus PWM
Pin Configuration
Figure 4. Pin Configuration
Pin Definitions
Pin #
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Name
PSON V33 V5 OPP UVAC NVP V12 OP2 OP1 PG GND COMP IN SS RI VCC
Description
Remote on/off logic input. Turn on/off the PWM output after the 16ms / 50ms delay. PSON = 0 means that the main SMPS is operational. PSON = 1 means that the main SMPS is off and the latch is reset. 3.3V over-voltage/under-voltage control sense input. 5V over-voltage/under-voltage control sense input. Over-power sense input. This pin is connected to driver transformer or the output of current transformer. When not in use, this pin should be grounded. AC-fail detection. Detect main AC voltage under-voltage or failure. The protection input for negative output, such as –12V and/or –5V; trip voltage = 2.1V. 12V over-voltage/under-voltage control sense input. The totem-pole output drivers of push-pull PWM. The output are enabled (LOW) only when the NAND gate inputs are HIGH; the maximum duty cycle on output OP2 is 46%. The totem-pole output drivers of push-pull PWM. The output are enabled (LOW) only when the NAND gate inputs are HIGH the maximum duty cycle on output OP1 is 46%. Power-good logic output, 0 or 1 (open-collector). PG = 1 means that the power is ready for operation. The PG delay is 300ms. Ground. Error amplifier output and the input of the PWM comparator. The negative input of error amplifier. The positive input of error amplifier is a 2.5V reference voltage. The soft-start, it is settable through an external capacitor. The current source output at this pin is 8µA and the voltage is clamped at 2.5V. Reference Resistor. Connected to external resistor for the reference setting. Supply voltage; 4.5V ~ 5.5V, connected to 5V standby.
© 2009 Fairchild Semiconductor Corporation FAN6103 • Rev. 1.0.0
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FAN6103 — Power Supply Supervisor Plus PWM
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.
Symbol
VCC VH VL IOUT PD ΘJA TJ TSTG TL ESD DC Supply Voltage
Parameter
Supply Voltage on PSON, V33, V5, V12, OP1, OP2 Pins Supply Voltage on OPP, UVAC, RI, SS , NVP, IN, COMP, PG Pins Output Current at PG Power Dissipation TA < 50°C Thermal Resistance (Junction-to-Air) Operating Junction Temperature Storage Temperature Range Lead Temperature (Soldering) Electrostatic Discharge Capability Human Body Model, JESD22-A114 Charged Device Model, JESD22-C101
Min.
-0.3 -0.3
Max.
16 16.0 7.0 30 1500 82.5
Unit
V V V mA mW °C/W °C °C °C V
-40 -55
+125 +150 +260 3000 1250
Notes: 1. All voltage values, except differential voltage, are given with respect to GND pin. 2. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
TA
Parameter
Operating Ambient Temperature
Min.
-40
Max.
+105
Unit
°C
© 2009 Fairchild Semiconductor Corporation FAN6103 • Rev. 1.0.0
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FAN6103 — Power Supply Supervisor Plus PWM
Electrical Characteristics
VCC = 5V, TA = 25°C, and RI = 75kΩ unless otherwise noted.
Symbol
VCC Section VCC ICC1 ICC2
Parameter
DC Supply Voltage Total Supply Current Total Supply Current
Conditions
Min.
4.5
Typ.
Max.
5.5 10
Units
V mA mA
PSON = LOW, OP1/OP2 = 1000pF PSON = HIGH, OP1/OP2 = 1000pF 3.3V 3.9 5.8 13.9 2.0 3.0 6.0 2.5 4.0 9.4 VUVAC = 1.5V 2.25 3.0 0.2 2.0 63 0.37 0.80 0.37 5 3.3
5
10
Protection Section 4.1 6.1 14.5 2.6 3.6 7.2 2.8 4.3 10.1 2.32 3.2 0.3 2.1 67 0.70 2.40 1.20 7 7.0 4.3 6.5 14.9 2.8 3.9 8.0 3.0 4.5 10.4 2.39 3.4 0.4 2.2 71 1.35 3.75 1.88 9 10.2 V V V V V V V V V V V V V µA ms ms ms ms ms VOVP Over-Voltage Protection 5.0V 12.0V 3.3V VUVP Under-Voltage Protection 5.0V 120V VUVS Under-Voltage Sense for PG Low Over-Power Protection (3) (with TOPP Delay Time) Over-Power Protection (without Delay Time) Disable Under-Voltage / OverPower Protection Threshold Negative Voltage Protection Voltage Level Negative Voltage Protection Source Current Timing for Over-Voltage Protection Timing for Under-Voltage Protection Timing for Under-Voltage Sense for PG Low Timing for Over-Power Protection Timing for Negative Voltage Protection Output Voltage Low Output Voltage High Output Impedance of VOH 4 1.5 3.3 3.3V 5.0V 12.0V
VOPP VOPPH VX VNVP INVP TOVP TUVP TUVS TOPP TNVP
PWM Output Section VOL VOH RO 0.8 V V kΩ
Note: 3. VOPPS = (2/3) • VOPP + (1/3) • VUVAC. Continued on following page…
© 2009 Fairchild Semiconductor Corporation FAN6103 • Rev. 1.0.0
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FAN6103 — Power Supply Supervisor Plus PWM
Electrical Characteristics (Continued)
VCC = 5V, TA = 25°C, and RI = 75kΩ unless otherwise noted.
Symbol
Power-Good Section tPG VUVAC tR tF VOL2 ION2 VIH VIL VHYSTERESIS IPSON tPSON(ON) tPSON(OFF) tPSOFF VREF IIB AVOL BW PSRR fOSC DCMAX ISS
Parameter
Timing for PG Delay UVAC Voltage Sense for PG PG Good Output Rising Time PG Good Falling Time PG Output Saturation Level PG Leakage Current Collector High-Level Input Voltage Low-Level Input Voltage PSON Input Hysteresis Voltage Remote Input Driving Current Timing PSON to ON Timing PSON to OFF Timing PG LOW to Power OFF Reference Voltage Input Bias Current Open-Loop Voltage Gain Unity Gain Bandwidth Power Supply Rejection Ratio PWM Frequency Max Duty Cycle Charge Current
Conditions
RI = 75kΩ CL = 100pF, Pull 2.25V to 5.00V CL = 100pF, Pull to 5.00V to 2.25V IPG = 10mA VPG = 5V
Min.
200 0.68
Typ.
300 0.70 1 300
Max.
400 0.72 3 500 0.5 1
Units
ms V µs ns V µA V
Remote ON/OFF Section 2 0.8 0.3 0.5 RI = 75kΩ RI = 75kΩ RI = 75kΩ TA = 25°C 38 8 1.5 2.46 50 0.3 50 RI = 75kΩ 62 85 7 8 65 68 93 9 50 16 2.0 2.50 60 1.0 62 24 6.3 2.54 0.1 V V mA ms ms ms V µA dB MHz dB kHz % µA
Error Amplifier Section
Oscillator Section
Soft-Start Section
© 2009 Fairchild Semiconductor Corporation FAN6103 • Rev. 1.0.0
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FAN6103 — Power Supply Supervisor Plus PWM
Typical Performance Characteristics
4.5 4.4
2.60
2.55 ICC1 (mA) 4.3 4.2 4.1 2.45 4.0 3.9 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (°C) 2.40 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (°C) VREF (V) FOSC (kHz) -40 -25 -10 5 20 35 50 65 80 95 110 125 2.50
Figure 5. Operating Supply Current vs. Temperature
6.75 6.71 VOH (V) 6.67 6.63 6.59 6.55 Temperature (°C)
Figure 6. Reference Voltage vs. Temperature
66.0 65.0 64.0 63.0 62.0 61.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (°C)
Figure 7. PWM Output Voltage vs. Temperature
90.0 7.95 7.93 ISS (µA) 7.91 7.89 7.87 7.85 -40 -25 -10 5 20 35 50 65 80 95 110 125
Figure 8. Frequency vs. Temperature
89.5 DCMAX (%)
89.0
88.5
88.0 Temperature (°C)
-40
-25
-10
5
20
35
50
65
80
95
110 125
Temperature (°C)
Figure 9.
Maximum Duty Cycle vs. Temperature
Figure 10.
Charge Current vs. Temperature
© 2009 Fairchild Semiconductor Corporation FAN6103 • Rev. 1.0.0
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FAN6103 — Power Supply Supervisor Plus PWM
Typical Performance Characteristics (Continued)
2.63 2.61 VUVP (V) VOVP (V) -40 -25 -10 5 20 35 50 65 80 95 110 125 2.59 2.57 2.55 2.53 Temperature (°C) 4.20
4.15
4.10
4.05
4.00 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (°C)
Figure 11. 3.3V VUVP vs. Temperature
3.63 3.61 VUVP (V) 3.59 3.57 3.55 3.53 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (°C) VOVP (V)
Figure 12. 3.3V VOVP vs. Temperature
6.25 6.20 6.15 6.10 6.05 6.00 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (°C)
Figure 13. 5V VUVP vs. Temperature
7.20 7.15 VUVP (V) VOVP (V) 7.10 7.05 7.00 6.95 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (°C) 14.65 14.60 14.55 14.50 14.45 14.40
Figure 14. 5V VOVP vs. Temperature
-40 -25 -10
5
20
35
50
65
80
95 110 125
Temperature (°C)
Figure 15. 12V VUVP vs. Temperature
Figure 16.
12V VOVP vs. Temperature
© 2009 Fairchild Semiconductor Corporation FAN6103 • Rev. 1.0.0
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FAN6103 — Power Supply Supervisor Plus PWM
Functional Description
FAN6103 is suitable for half-bridge, push-pull topology and incorporates with a three-channel supervisor. The PWM section comprises a built-in 65KHz oscillator and high-immunity circuits, which protect the system from noise interference and provide more noise margins. FAN6103 has OVP and UVP for 12V, 5V, and 3.3V. NVP is used for negative voltage protection, such as 12V and/or -5V. The UVAC is applied to detect AC line condition.
-5 V
5V 6 4µA
-1 2 V
R2
R1
2 .1 V
Figure 18. NVP Protection Circuit
Over-Power Protection (OPP)
FAN6103 provides over-power protection to detect over-power or short-circuit conditions. When it detects the voltage level over 2.4V, the supervisor triggers PG to LOW and pulls the SS pin LOW to switch off the power.
AC-Fail Detection
Through a resistor divider, UVAC is connected to the secondary power transformer for detecting the AC line condition. Once the voltage of UVAC is lower than 0.7V for a period of time, such as 200µs, the PG signal is pulled LOW to indicate an AC line power-down condition. The voltage amplitude of the PWM switching signal in the secondary power transformer is proportional to the AC line voltage. Adjust the ratio of resistor divider to determine the threshold of powerdown warning. A small capacitor is connected from UVAC to ground for filtering the switching noise.
OP1
V DD
OP2 OPP
0. 7V
+
U V AC
Figure 19. AC Detection Circuit Figure 17. OPP Protection Circuit
Negative-Voltage Protection (NVP)
The NVP provides an under-voltage protection for negative voltage output. An under-voltage represents the phenomenal of the overload condition in negative voltage output. For example, the -12V output may drop to -10V during the overload situation. A resistor determining the threshold of the protection is connected from pin NVP to the negative voltage output. Via this resistor, NVP output a 64µA constant current to the negative voltage output. When the NVP voltage is over 2.1V for longer than 7ms, FAN6103 locks the power output off: VNVP = 64 μ A × (R1 + R2 ) + ( −12V ) (1)
The power outputs are locked off when VNVP > 2.1V.
© 2009 Fairchild Semiconductor Corporation FAN6103 • Rev. 1.0.0
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Timing Chart
VCC
PSON
3.3V,5V,12V tPSON(ON) NVP tPSON(OFF) tUVP tNVP
SS(on/off)
tPSOFF
PG
tPG
VCC PSON Voltage < VUVAC UVAC OPP tOPP SS(on/off)
PG
Figure 20. Timing Diagram
© 2009 Fairchild Semiconductor Corporation FAN6103 • Rev. 1.0.0
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FAN6103 — Power Supply Supervisor Plus PWM
Physical Dimensions
16
19.68 18.66
A
9
6.60 6.09
1
8
(0.40)
TOP VIEW
0.38 MIN 5.33 MAX 3.42 3.17 3.81 2.92 2.54 0.58 A 0.35 1.78 1.14 17.78
SIDE VIEW NOTES: UNLESS OTHERWISE SPECIFIED A THIS PACKAGE CONFORMS TO JEDEC MS-001 VARIATION BB B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR PROTRUSIONS D) CONFORMS TO ASME Y14.5M-1994 E) DRAWING FILE NAME: N16EREV1
Figure 21. 16-Pin Dual In-Line Package (DIP)
8.13 7.62
0.35 0.20 8.69
15 0
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/.
© 2009 Fairchild Semiconductor Corporation FAN6103 • Rev. 1.0.0
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FAN6103 — Power Supply Supervisor Plus PWM
© 2009 Fairchild Semiconductor Corporation FAN6103 • Rev. 1.0.0
www.fairchildsemi.com 13