FAN6982MY

FAN6982 — CCM Power Factor Correction Controller February 2010 FAN6982 CCM Power Factor Correction Controller Features Continuous Conduction Mode Innovative Switching-Charge Multiplier-Divider Average-Current-Mode for Input-Current Shaping TriFault Detect™ Prevent Abnormal Operation for Feedback Loop Power-On Sequence Control Soft-Start Capability Brownout Protection Cycle-by-Cycle Peak Current Limiting. Improves Light-Load Efficiency Fulfills Class-D Requirements of IEC 1000-3-2 Programmable Frequency: 50kHz to 130kHz W ide Range Universal AC Input Voltage Maximum Duty Cycle 97% VDD Under-Voltage Lockout (UVLO) Description The FAN6982 is a 14-pin, Continuous Conduction Mode (CCM) PFC controller IC intended for Power Factor Correction (PFC) pre-regulators. The FAN6982 includes circuits for the implementation of leading edge, average current, “boost”-type power factor correction, and results in a power supply that fully complies with the IEC1000-3-2 specification. A TriFault Detect™ function helps reduce external components and provides full protection for feedback loops such as open, short, and over voltage. An overvoltage comparator shuts down the PFC stage in the event of a sudden load decrease. The RDY signal can be used for power-on sequence control. The EN function can choose to enable or disable the range function. FAN6982 also includes PFC soft-start, peak current limiting, and input voltage brownout protection. Applications Desktop PC Power Supply Internet Server Power Supply LCD TV/Monitor Power Supply DC Motor Power Supply Ordering Information Part Number FAN6982MY Operating Temperature Range -40°C to +105°C Eco Status Green Package 14-Pin Small Outline Package (SOP) Packing Method Tape & Reel For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. © 2009 Fairchild Semiconductor Corporation FAN6982 • Rev. 1.0.1 www.fairchildsemi.com FAN6982 — CCM Power Factor Correction Controller Application Diagram Figure 1. Typical Application © 2009 Fairchild Semiconductor Corporation FAN6982 • Rev. 1.0.1 www.fairchildsemi.com 2 FAN6982 — CCM Power Factor Correction Controller Block Diagram 14 1 11 VEA Low-Power Detect Comparator IEA 0.5V PFC UVP VDD 7.5V REFERENCE S SET VREF 12 2.75V/2.5V VDD 28V/27V -1.15V ISENSE 1.05V/1.9V VRMS PFC OVP Q FBPFC 2.5V 13 0.3V GmV RM GmI VDD OVP PFC ILIMIT VIN UVP R CLR Q 6 EN OPFC 10 Range VRMS 4 2 k 2 x S SET Q VEA PGND 9 IM O IAC R CL R Q Gain Modulator RM 2.8V VDD 3 ISENSE UVLO RDY 5 7 RT/CT OSCILLATOR FBPFC 2.4V/1.15V SGND 8 Figure 2. Functional Block Diagram Marking Information F – Fairchild Logo Z – Plant Code X – 1-Digit Year Code Y – 1-Digit Week Code TT – 2-Digit Die-Run Code T – Package Type (M: SOP) P – Y: Green Package M – Manufacture Flow Code Figure 3. Top Mark © 2009 Fairchild Semiconductor Corporation FAN6982 • Rev. 1.0.1 www.fairchildsemi.com 3 FAN6982 — CCM Power Factor Correction Controller Pin Configuration Figure 4. Pin Configuration Pin Definitions Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Name IEA IAC ISENSE VRMS RDY EN RT/CT SGND PGND OPFC VDD VREF FBPFC VEA Description Output of Current Amplifier. This is the output of the PFC current amplifier. The signal from this pin is compared with sawtooth and determines the pulsewidth for PFC gate drive. Input AC Current. For normal operation, this input is used to provide current reference for the multiplier. The suggested maximum IAC is 100µA. Current Sense. The non-inverting input of the PFC current amplifier and the output of multiplier and PFC ILIMIT comparator. Line-Voltage Detection. The pin is used for PFC multiplier. Ready Signal. This pin controls the power-on sequence. Once the FAN6982 is turned on and the FBPFC voltage exceeds in 2.4V, the RDY pin pulls LOW impedance. If the FBPFC voltage is lower than 1.15V, the RDY pin pulls HIGH impedance. Enable Range Function. The range function is enabled when EN is connected to VREF. The range function is disabled when EN is connected to GND. Oscillator RC Timing Connection. Oscillator timing node; timing set by RT and CT. Signal Ground. Power Ground. Gate Drive. The totem-pole output drive for PFC MOSFET. This pin is internally clamped under 15V to protect the MOSFET. Power Supply. The threshold voltages for startup and turn-off are 11V and 9.3V, respectively. The operating current is lower than 10mA. Reference Voltage. Buffered output for the internal 7.5V reference. Voltage Feedback Input. The feedback input for PFC voltage loop. The inverting input of PFC error amplifier. This pin is connected to the PFC output through a divider network. Output of Voltage Amplifier. The error-amplifier output for PFC voltage feedback loop. A compensation network is connected between this pin and ground. © 2009 Fairchild Semiconductor Corporation FAN6982 • Rev. 1.0.1 www.fairchildsemi.com 4 FAN6982 — CCM Power Factor Correction Controller Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VDD VH VL VIEA VN IAC IREF IPFC-OUT PD RΘ j-a RΘ j-c TJ TSTG TL ESD DC Supply Voltage OPFC, RDY, EN, VREF Parameter Min. -0.3 -0.3 0 -5.0 Max. 30 30.0 7.0 VVREF+0.3 0.7 1 5 0.5 800 104.10 40.61 Unit V V V V V mA mA A mW °C/W °C/W °C °C °C kV IAC, VRMS, RT/CT, FBPFC, VEA IEA ISENSE Input AC Current VREF Output Current Peak PFC OUT Current, Source or Sink Power Dissipation, TA < 50°C Thermal Resistance (Junction-to-Air) Thermal Resistance (Junction-to-Case) Operating Junction Temperature Storage Temperature Range Lead Temperature (Soldering) Electrostatic Discharge Capability Human Body Model, JESD22-A114 Charged Device Model, JESD22-C101 -40 -55 +125 +150 +260 4.5 1.0 Notes: 1. All voltage values, except differential voltage, are given with respect to the GND pin. 2. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol TA Parameter Operating Ambient Temperature Min. -40 Max. +105 Unit °C © 2009 Fairchild Semiconductor Corporation FAN6982 • Rev. 1.0.1 www.fairchildsemi.com 5 FAN6982 — CCM Power Factor Correction Controller Electrical Characteristics Unless otherwise noted; VDD=15V, TA= 25°C, TA=TJ, RT=27kΩ, and CT=1000pF. Symbol VDD Section VDD-OP IDD ST IDD-OP VTH-ON △VTH VDD-OVP △VDD-OVP Oscillator fOSC (3) fDV Parameter Continuously Operating Voltage Startup Current Operating Current Turn-on Threshold Voltage Hysteresis VDD OVP VDD OVP Hysteresis PFC Frequency Voltage Stability Temperature Stability Total Variation Ramp Voltage Discharge Current Frequency Range PFC Dead Time Reference Voltage Load Regulation of Reference Voltage Conditions Min. Typ. Max. Units 22 VDD=VTH-ON-0.1V; OPFC Open VDD=13V; OPFC Open 2.0 10 1.35 27 28 1 RT=27kΩ, CT=1000pF 11V ≦ VDD ≦ 22V -40°C ~ +105°C Line, Temperature Valley-to-Peak VRAMP=0V, VRT/CT=2.5V RT=27kΩ, CT=1000pF IREF=0mA, CREF=0.1µF CREF=0.1µF, IREF=0mA to 3.5mA VVDD=14V, Rise/Fall Time > 20µs 6.5 50 400 7.4 600 7.5 30 58 2.8 15.0 75 800 7.6 50 25 0.4 7.35 5 5 1.00 1.85 750 340 1.05 1.90 850 410 1.10 1.95 950 480 0.5 7.65 25 60 64 67 2 2 70 30 2.3 11 80 3.0 12 1.90 29 V µA mA V V V V kHz % % kHz V mA kHz ns V mV mV % V mV mA V V mV ms fDT (3) fTV fRV IOSC-DIS fRANGE tPFC-DEAD VREF VVREF △VVREF1 △VVREF2 △VVREF-DT △VVREF-TV △VVREF-LS IREF-MAX Brownout VRMS-UVL VRMS-UVH △VRMS-UVP tUVP RDY Section VFBPFC-RD △VFBPFC-RD IRDY-LEK VRDY-L Line Regulation of Reference CREF=0.1µF, VVDD=11V to 22V Voltage Temperature Stability Total Variation (3) (3) (3) -40°C ~ +105°C Line, Load, Temperature TJ=125°C, 0 ~ 1000HRs VVREF > 7.35V When VRMS=1.05V at 75 VRMS When VRMS=1.9V at 85 • 1.414 Long-Term Stability Maximum Current VRMS Threshold Low VRMS Threshold High Hysteresis Under-Voltage Protection Debounce Time FBPFC Voltage Level to Pull Low Impedance with RDY Pin Hysteresis Leakage Current of RDY High Impedance RDY Low Voltage 2.3 1.15 VFBPFC