FAN7383

FAN7383 Half-Bridge Gate-Drive IC February 2007 FAN7383 Half-Bridge Gate-Drive IC Features Floating Channel Designed for Bootstrap Operation to +600V. Typically 350mA/650mA Sourcing/Sinking Current Driving Capability for Both Channels Extended Allowable Negative VS Swing to -9.8V for Signal Propagation at VDD=VBS=15V High-Side Output in Phase of IN Signal Built-in UVLO Functions for Both Channels Built-in Common-Mode dv/dt Noise Canceling Circuit Typically Internal 330ns Minimum Dead-Time Programmable Turn-On Delay Time Control (Dead-Time) Description The FAN7383 is a half-bridge gate-drive IC with shutdown and programmable dead-time control functions for driving MOSFETs and IGBTs that operate up to +600V. Fairchild’s high voltage process and common-mode noise canceling technique give stable operation of highside drivers under high-dv/dt noise circumstances. An advanced level-shift circuit allows high-side gate driver operation up to VS= -9.8V (typical) for VBS=15V. The UVLO circuits for both channels prevent malfunction when VDD and VBS are lower than the specified threshold voltage. Output drivers typically source/sink 350mA/650mA, respectively, which is suitable for all kinds of half and full bridge inverter. 14-SOP Applications SMPS Motor Drive Inverter Fluorescent Lamp Ballast HID Ballast 1 Ordering Information Part Number FAN7383M (1) Package 14-SOP Pb-Free Yes Operating Temperature Range Packing Method -40°C ~ 125°C Tube Tape & Reel FAN7383MX(1) Note: 1. These devices passed wave soldering test by JESD22A-111. © 2006 Fairchild Semiconductor Corporation FAN7383 Rev. 1.0.3 www.fairchildsemi.com FAN7383 Half-Bridge Gate-Drive IC Typical Application Circuit RBOOT DBOOT VDC VDD PWM Shutdown PWM IC Control 1 2 3 4 5 IN SD DT VDD LO1 LO2 GND VB HO1 HO2 VS NC NC NC 14 RHON 13 12 11 10 9 8 RHOFF CBOOT RDT 6 7 RLOFF RLON FAN7383 Rev.01 Figure 1. Application Circuit for Half-Bridge Switching Power Supply VDC VCC VDD VB HO1 HO2 VDD VB HO1 HO2 VS PHA PHB IN VS IN SD SD Forward SD M Reverse LO1 FAN7383 LO1 DT GND LO2 FAN7383 LO2 GND DC Motor Controller DT FAN7383 Rev.01 Figure 2. Application Circuit for Full-Bridge DC Motor Driver © 2006 Fairchild Semiconductor Corporation FAN7383 Rev. 1.0.3 2 www.fairchildsemi.com FAN7383 Half-Bridge Gate-Drive IC Internal Block Diagram 14 UVLO VB HO1 HO2 VS VDD LO1 LO2 GND 13 12 11 DRIVER PULSE GENERATOR NOISE CANCELLER R S R Q IN SD DT 1 2 3 SCHMITT TRIGGER INPUT HS(ON/OFF) UVLO SHOOT THOUGH PREVENTION DEAD-TIME { DTMIN=330nsec } LS(ON/OFF) 4 5 6 7 DRIVER DELAY FAN7383 Rev:01 Figure 3. Functional Block Diagram of FAN7383 © 2006 Fairchild Semiconductor Corporation FAN7383 Rev. 1.0.3 3 www.fairchildsemi.com FAN7383 Half-Bridge Gate-Drive IC Pin Configuration IN SD DT VDD LO1 LO2 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VB HO1 HO2 VS NC NC NC Figure 4. Pin Configuration (Top View) FAN7383 FAN7383 Rev:00 Pin Definitions Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Name IN SD DT VDD LO1 LO2 GND N.C. N.C. N.C. VS HO2 HO1 VB Logic Input for Gate Driver Description Logic Input for Shutdown (Active Low) Programmable Dead-Time Control with External Resistor Low-Side Supply Voltage Low-Side Driver Source Output Low-Side Driver Sink Output Ground Not connected Not connected Not connected High-Side Floating Supply Return High-Side Driver Sink Output High-Side Driver Source Output High-Side Floating Supply © 2006 Fairchild Semiconductor Corporation FAN7383 Rev. 1.0.3 4 www.fairchildsemi.com FAN7383 Half-Bridge Gate-Drive IC Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA = 25°C unless otherwise specified. Symbol VS VB VHO VDD VLO VIN VSD VDT GND dVS/dt PD(2)(3)(4) θJA TJ TSTG Parameter High-side offset voltage High-side floating supply voltage High-side floating output voltage HO1, HO2 Low-side and logic fixed supply voltage Low-side output voltage LO1, LO2 Logic input voltage (IN) Shutdown logic input voltage Dead-time control voltage Logic ground Allowable offset voltage slew rate Power dissipation Thermal resistance, junction-to-ambient Junction temperature Storage temperature Min. VB-25 -0.3 VS-0.3 -0.3 -0.3 -0.3 -0.3 -0.3 VDD-25 Max. VB+0.3 625 VB+0.3 25 VDD+0.3 VDD+0.3 VDD+0.3 5.0 VDD+0.3 50 1.0 110 150 150 Unit V V V V V V V V V V/ns W °C/W °C °C Notes: 2. When mounted on 76.2 x 114.3 x 1.6mm PCB. (FR-4 glass epoxy material). 3. Please refer to: JESD51-2: Integral circuits thermal test method environmental conditions - Natural convection JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages 4. Do not exceed PD under any circumstances. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol VB VS VDD VHO VLO VIN TA Parameter High-side floating supply voltage High-side floating supply offset voltage Low-side supply voltage High-side (HO) output voltage Low-side (LO) output voltage Logic input voltage (IN) Ambient temperature Condition Min. VS+15 6-VDD 15 VS GND GND -40 Max. VS+20 600 20 VB VDD VDD 125 Unit V V V V V V °C © 2006 Fairchild Semiconductor Corporation FAN7383 Rev. 1.0.3 5 www.fairchildsemi.com FAN7383 Half-Bridge Gate-Drive IC Electrical Characteristics VBIAS (VDD, VBS) = 15.0V, RDT = GND, TA = 25°C, unless otherwise specified. The VIN and IIN parameters are referenced to GND. The VO and IO parameters are referenced to VS and GND and are applicable to the respective outputs HO and LO. Symbol IQBS IQDD ISD(5) IPBS IPDD ILK VDDUV+ VBSUV+ VDDUVVBSUVVDDUVH VBSUVH VOH VOL IO+ IOVS Parameter Quiescent VBS supply current Quiescent VDD supply current VDD supply current at shutdown mode Operating VBS supply current Operating VDD supply current Offset supply leakage current VDD and VBS supply under-voltage positive going threshold VDD and VBS supply under-voltage negative going threshold VDD and VBS supply under-voltage lockout hysteresis High-level output voltage, VBIAS-VO Low-level output voltage, VO Output high short-circuit pulse current Output low short-circuit pulsed current Allowable negative VS pin voltage for IN signal propagation to HO Logic "1" input voltage Logic "0" input voltage Logic "1" input bias current Logic "0" input bias current Shutdown "1" input voltage Shutdown "0" input voltage Input pull-down resistance VIN=5V VIN=0V IO=20mA Condition VIN=0V or 5V VIN=0V or 5V, RDT=0Ω SD=GND fIN=20kHz,rms value fIN=20kHz,rms value, RDT=0Ω VB=VS=600V Min. Typ. Max. Unit 35 650 650 400 950 90 900 900 700 1200 10 μA SUPPLY CURRENT SECTION POWER SUPPLY SECTION 10.7 10.0 11.6 10.8 0.8 12.5 11.6 V GATE DRIVER OUTPUT SECTION 1.0 0.6 VO=0V, VIN=5V with PW