FAN7384

FAN7384 Half-Bridge Gate-Drive IC February 2007 FAN7384 Half-Bridge Gate-Drive IC Features Floating Channel for Bootstrap Operation to +600V Typically 250mA/500mA Sourcing/Sinking Current Driving Capability for Both Channels Extended Allowable Negative VS Swing to -9.8V for Signal Propagation at VDD=VBS=15V Matched Propagation Delay Below 50ns Output In-Phase with Input Signal 3.3V and 5V Input Logic Compatible Built-in Shoot-Through Prevention Logic Built-in Common Mode dv/dt Noise Canceling Circuit Built-in UVLO Functions for Both Channels Built-in Cycle-by-Cycle Shutdown Function Built-in Soft-Off Function Built-in Bi-Directional Fault Function Built-in Short-Circuit Protection Function Description The FAN7384 is a monolithic half-bridge gate-drive IC designed for high voltage, high speed driving MOSFETs and IGBTs operating up to +600V. Fairchild’s high-voltage process and common-mode noise canceling technique provide stable operation of high-side drivers under high-dv/dt noise circumstances. An advanced level-shift circuit allows high-side gate driver operation up to VS = -9.8V (typical) for VBS =15V. The UVLO circuits prevent malfunction when VDD and VBS are lower than the specified threshold voltage. Output drivers typically source/sink 250mA/500mA, respectively, which is suitable for half-bridge and fullbridge applications in motor drive systems. 14-SOP Applications Motor Inverter Driver Normal Half-Bridge and Full-Bridge Driver Switching Mode Power Supply 1 Ordering Information Part Number FAN7384M(1) FAN7384MX(1) Package 14-SOP Pb-Free Yes Operating Temperature Range -40°C ~ 125°C Packing Method Tube Tape & Reel Note: 1. These devices passed wave soldering test by JESD22A-111. © 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 www.fairchildsemi.com FAN7384 Half-Bridge Gate-Drive IC Typical Application Diagrams VDC VCC VDD VB HO VS UU UL VU UL WU WL HIN LIN VDD HO VDD HO U U HIN LIN FAN7384 VB VS FAN7384 FAN7384 3-Phase Motor Controller V HIN LIN FO SD V VB VS W W FO SD CSC VSL LO GND FO SD CSC VSL LO GND CSC VSL LO GND FAN7384 Rev.03 Figure 1. 3-Phase Motor Drive Application VDC VCC RPULLUP VDD VB HO VDD VB HO PHA PHB HIN HIN VS FAN7384 Forward FAN7384 VS LIN HIN FO SD LO 300K FO M Reverse LO FAULT SHUTDOWN SD 300K GND VSL CSC DC Motor Controller GND VSL CSC FAN7384 Rev.02 Figure 2. DC Motor Drive Application © 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 2 www.fairchildsemi.com FAN7384 Half-Bridge Gate-Drive IC Internal Block Diagram 14 UVLO VB DRIVER PULSE GENERATOR HS(ON/OFF) NOISE CANCELLER R S R Q 13 HO 12 LIN 1 SCHMITT TRIGGER INPUT VDD_UVLO UVLO VS 4 DRIVER VDD HIN 3 SHOOT-THROUGH PREVENTION LS(ON/OFF) GND/VSL LEVEL SHIFTER DELAY 9 LO SD 2 CONTROL LOGIC 8 FAULT LOGIC SOFT-OFF ISOFT ONE-SHOT TRIGGER 0.5V VDD_UVLO ONE-SHOT TRIGGER VSL CSC 6 5 FO GND 7 FAN7384 Rev.03 Figure 3. Functional Block Diagram © 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 3 www.fairchildsemi.com FAN7384 Half-Bridge Gate-Drive IC Pin Configuration LIN SD HIN VDD FO CSC GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VB HO VS NC NC LO VSL Figure 4. Pin Configuration (Top View) FAN7384 FAN7384 Rev.00 Pin Definitions Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Name LIN SD HIN VDD FO CSC GND VSL LO NC NC VS HO VB Description Logic Input for low-side gate driver Shutdown control input with active low Logic Input for high-side gate driver Low-side power supply voltage Bi-direction fault pin with open drain Short-circuit current detection input Ground Low-side supply offset voltage Low-side gate driver output Not connection Not connection High-side floating supply offset voltage High-side gate driver output High-side floating supply voltage © 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 4 www.fairchildsemi.com FAN7384 Half-Bridge Gate-Drive IC Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA=25°C, unless otherwise specified. Symbol VS VB VHO VDD VIN VCSC VFO dVS/dt PD(2)(3)(4) θJA TJ TS Notes: Parameter High-side offset voltage VS High-side floating supply voltage VB High-side floating output voltage Low-side and logic-fixed supply voltage Logic input voltage (HIN, LIN, SD) Current sense input voltage Fault output voltage Allowable offset voltage slew rate Power dissipation Thermal resistance, junction-to-ambient Junction temperature Storage temperature Min. VB-25 -0.3 VS-0.3 -0.3 -0.3 -0.3 -0.3 Max. VB+0.3 625 VB+0.3 25 VDD+0.3 VDD+0.3 VDD+0.3 50 1.0 110 150 Unit V V V V V V V V/ns W °C/W °C °C -55 150 2. Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material). 3. Refer to the following standards: JESD51-2: Integral circuits thermal test method environmental conditions - natural convection JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages 4. Do not exceed PD under any circumstances. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol VB VS VDD VHO VLO VIN VFO TA Parameter High-side floating supply voltage High-side floating supply offset voltage Supply voltage High-side output voltage Low-side output voltage Logic input voltage (HIN, LIN, SD) Fault output voltage Ambient temperature Condition Min. VS+13 6-VDD 13 VS GND GND -0.3 -40 Max. VS+20 600 20 VB VDD VDD VDD+0.3 125 Unit V V V V V V V °C © 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 5 www.fairchildsemi.com FAN7384 Half-Bridge Gate-Drive IC Electrical Characteristics VBIAS (VDD, VBS) = 15.0V, TA = 25°C, unless otherwise specified. The VIN and IIN parameters are referenced to GND. The VO and IO parameters are referenced to VS and GND and are applicable to the respective outputs HO and LO. Symbol IQDD IPDD VDDUV+ VDDUVVDDHYS Characteristics Quiescent VDD supply current Operating VDD supply current VDD supply under-voltage positive going threshold Condition VLIN=0V or 5V fLIN=20kHz, rms value VDD=Sweep Min. Typ. Max. Unit 600 950 10.9 10.4 11.9 11.4 0.5 800 1300 12.9 12.4 μA μA V V V LOW SIDE POWER SUPPLY SECTION VDD supply under-voltage negative going VDD=Sweep threshold VDD supply under-voltage lockout hysteresis VBS supply under-voltage positive going threshold VDD=Sweep BOOTSTRAPPED POWER SUPPLY SECTION VBSUV+ VBSUVVBSHYS ILK IQBS IPBS VOH VOL IO+ IOVS VBS=Sweep 10.6 10.1 11.5 11.0 0.5 10 50 400 90 600 100 100 200 420 250 500 -9.8 -7.0 -7.0 7.0 1.2 2.5 2.5 1.2 0.5 VIN=5V VIN=0V 10 15 20 2.0 12.4 11.9 V V V μA μA μA mV mV mA mA V V V V V V V μA μA VBS supply under-voltage negative going VBS=Sweep threshold VBS supply under-voltage lockout hysteresis Offset supply leakage current Quiescent VBS supply current Operating VBS supply current High-level output voltage, VBIAS-VO Low-level output voltage, VO Output HIGH short-circuit pulse current Output LOW short-circuit pulsed current Allowable negative VS pin voltage for IN signal propagation to HO VBS=Sweep VB=VS=600V VHIN=0V or 5V fHIN=20kHz, rms value IO=0mA (No Load) IO=0mA (No Load) VO=0V, VIN=5V with PW