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FAN73932MX

FAN73932MX

  • 厂商:

    FAIRCHILD(仙童半导体)

  • 封装:

  • 描述:

    FAN73932MX - Half-Bridge Gate Drive IC - Fairchild Semiconductor

  • 数据手册
  • 价格&库存
FAN73932MX 数据手册
FAN73932 — Half-Bridge Gate Drive IC June 2009 FAN73932 Half-Bridge Gate Drive IC Features Floating Channel for Bootstrap Operation to +600V Typically 2.0A/2.0A Sourcing/Sinking Current Driving Capability Extended Allowable Negative VS Swing to -9.8V for Signal Propagation at VBS=15V High-Side Output in Phase of IN Input Signal 3.3V and 5V Input Logic Compatible Matched Propagation Delay for Both Channels Cycle-by-Cycle Edge-Triggered Shutdown Function Built-in UVLO Functions for Both Channels Built-in Common-Mode dv/dt Noise Canceling Circuit Internal 400ns Minimum Dead-Time Description The FAN73932 is a half-bridge, gate-drive IC with shutdown and dead-time functions which can drive highspeed MOSFETs and IGBTs that operate up to +600V. It has a buffered output stage with all NMOS transistors designed for high pulse current driving capability and minimum cross-conduction. Fairchild’s high-voltage process and common-mode noise canceling techniques provide stable operation of the high-side driver under high dv/dt noise circumstances. An advanced level-shift circuit offers high-side gate driver operation up to VS=-9.8V (typical) for VBS=15V. The UVLO circuit prevents malfunction when VDD and VBS are lower than the specified threshold voltage. Applications High-Speed Power MOSFET and IGBT Gate Driver Induction Heating High-Power DC-DC Converter Synchronous Step-Down Converter Motor Drive Inverter The high-current and low-output voltage drop feature makes this device suitable for all kinds of half- and fullbridge inverters, like motor drive inverter, switching mode power supply, induction heating, and high-power DC-DC converter applications. 8-SOP Ordering Information Part Number FAN73932M FAN73932MX Package 8-SOP Operating Temperature Range -40°C to +125°C Eco Status RoHS Packing Method Tube Tape & Reel For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. © 2008 Fairchild Semiconductor Corporation FAN73932 • Rev. 1.0.0 www.fairchildsemi.com FAN73932 — Half-Bridge Gate Drive IC Typical Application Diagrams +15V Up to 600V PWM IC Control PWM Shutdown 1 IN VB HO VS VDD 8 2 SD COM LO 7 DBOOT 6 CBOOT 3 Load +15V RBOOT 4 5 Figure 1. Typical Application Circuit Internal Block Diagram 8 UVLO VB DRIVER PULSE GENERATOR HS(ON/OFF) NOISE CANCELLER R S R Q 7 HO IN 1 200K SCHMITT TRIGGER INPUT UVLO 6 VS 5 VDD DRIVER 5V SHOOT THOUGH PREVENTION SD 2 DEAD-TIME { 400ns } LS(ON/OFF) DELAY 4 LO 3 COM Figure 2. Functional Block Diagram © 2008 Fairchild Semiconductor Corporation FAN73932 • Rev. 1.0.0 www.fairchildsemi.com FAN73932 — Half-Bridge Gate Drive IC Pin Configuration IN SD COM LO FAN73932 1 8 VB HO VS VDD 2 7 3 6 4 5 Figure 3. Pin Configuration (Top View) Pin Definitions Pin # 1 2 3 4 5 6 7 8 Name IN SD COM LO VDD VS HO VB Logic Input for Shutdown Ground Low-Side Driver Return Supply Voltage Description Logic Input for High-Side and Low-Side Gate Driver Output, In-Phase with HO High-Voltage Floating Supply Return High-Side Driver Output High-Side Floating Supply © 2008 Fairchild Semiconductor Corporation FAN73932 • Rev. 1.0.0 www.fairchildsemi.com FAN73932 — Half-Bridge Gate Drive IC Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA=25°C unless otherwise specified. Symbol VB VS VHO VLO VDD VIN VSD COM dVS/dt PD θJA TJ TSTG Notes: 1. 2. Characteristics High-Side Floating Supply Voltage High-Side Floating Offset Voltage High-Side Floating Output Voltage Low-Side Output Voltage Low-Side and Logic Fixed Supply Voltage Logic Input Voltage (IN) Logic Input Voltage (SD) Logic Ground and Low-Side Driver Return Allowable Offset Voltage Slew Rate Power Dissipation(1, 2, 3) Thermal Resistance Junction Temperature Storage Temperature Min. -0.3 VB-25.0 VS-0.3 -0.3 -0.3 -0.3 -0.3 VDD-25.0 Max. 625.0 VB+0.3 VB+0.3 VDD+0.3 25.0 VDD+0.3 5.5 VDD+0.3 ± 50 0.625 200 +150 Unit V V V V V V V V V/ns W °C/W °C °C -55 +150 3. Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material). Refer to the following standards: JESD51-2: Integral circuits thermal test method environmental conditions - natural convection; JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages Do not exceed PD under any circumstances. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol VB VS VHO VDD VLO VIN VSD TA Note: 4. Parameter High-Side Floating Supply Voltage High-Side Floating Supply Offset Voltage High-Side Output Voltage Low-Side and Logic Fixed Supply Voltage Low-Side Output Voltage Logic Input Voltage (IN) Logic Input Voltage (SD) (4) Min. VS+10 6-VDD VS 10 COM COM COM -40 Max. VS+20 600 VB 20 VDD VDD 5 +125 Unit V V V V V V V °C Operating Ambient Temperature Shutdown (SD) input is internally clamped with 5.2V. © 2008 Fairchild Semiconductor Corporation FAN73932 • Rev. 1.0.0 www.fairchildsemi.com FAN73932 — Half-Bridge Gate Drive IC Electrical Characteristics VBIAS(VDD, VBS)=15.0V, COM=0V, and TA = 25°C, unless otherwise specified. The VIN and IIN parameters are referenced to COM and are applicable to the respective input leads: IN and SD. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO and LO. Symbol IQDD IQBS IPDD IPBS ISD ILK VDDUV+ VBSUV+ VDDUVVBSUVVDDUVHVBSUVH VIH VIL IIN+ IINRIN SD+ SDRPSD VOH VOL IO+ IOVS Note: 5 Characteristics Quiescent VDD Supply Current Quiescent VBS Supply Current Operating VDD Supply Current Operating VBS Supply Current Shutdown mode Supply Current Offset Supply Leakage Current Test Condition VIN=0V, SD=5V VIN=0V or 5V, SD=5V fIN=20KHz, No Load, SD=5V CL=1nF, fIN=20KHz, rms, SD=5V SD=0V, SD=5V VB=VS=600V Min. Typ. Max. Unit 320 50 700 420 400 700 120 1300 800 800 10 μA μA μA μA µA μA POWER SUPPLY SECTION BOOTSTRAPPED SUPPLY SECTION VDD and VBS Supply Under-Voltage Positive Going Threshold Voltage VDD and VBS Supply Under-Voltage Negative Going Threshold Voltage VDD and VBS Supply Under-Voltage Lockout Hysteresis Voltage Logic “1” Input Voltage for HO & Logic “0” for LO Logic “0” Input Voltage for HO & Logic “1” for LO Logic Input High Bias Current Logic Input Low Bias Current Logic Input Pull-Down Resistance Shutdown (SD) input Positive-Going Threshold Shutdown (SD) input Negative-Going Threshold Shutdown (SD) Input Pull-Up Resistance High-level Output Voltage (VBIAS - VO) Low-level Output Voltage Output High, Short-Circuit Pulsed Current(5) Output Low, Short-Circuit Pulsed Current(5) Allowable Negative VS Pin Voltage for IN Signal Propagation to HO No Load No Load VHO=0V, VIN=5V, PW ≤10µs VHO=15V,VIN=0V, PW ≤10µs 1.5 1.5 2.0 2.0 -9.8 -7.0 200 1.5 100 2.5 0.8 VIN=5V, SD=0V VIN=0V, SD=5V 200 5.0 5.5 25 VDD =VBS=Sweep VDD =VBS=Sweep VDD=VBS=Sweep 8 7.4 9 8.4 0.6 10 9.4 V V V INPUT LOGIC SECTION 2.5 0.8 60 3 V V μA μA KΩ V V V KΩ V mV A A V VSDCLAMP Shutdown (SD) Input Clamping Voltage GATE DRIVER OUTPUT SECTION These parameters guaranteed by design. © 2008 Fairchild Semiconductor Corporation FAN73932 • Rev. 1.0.0 www.fairchildsemi.com FAN73932 — Half-Bridge Gate Drive IC Dynamic Electrical Characteristics VBIAS(VDD, VBS)=15.0V, COM=0V, CL=1000pF, and TA=25°C, unless otherwise specified. Symbol tON tOFF tSD MtON MtOFF tR tF DT MDT Note: 6. Parameter Turn-On Propagation Delay Time Turn-Off Propagation Delay Time Shutdown Propagation Delay Time Delay Matching, HO and LO Turn-On Delay Matching, HO and LO Turn-Off Turn-On Rise Time Turn-Off Fall Time Dead-Time: LO Turn-Off to HO Turn-On and HO Turn-Off to LO Turn-On Dead-time matching=|DTLO-HO - DTHO-LO| (6) Conditions VS=0V VS=0V Min. Typ. 600 200 140 0 0 Max. 850 350 220 50 50 50 35 500 50 Unit ns ns ns ns ns ns ns ns ns VS=0V VS=0V 300 25 20 400 0 The turn-on propagation delay time included dead-time. © 2008 Fairchild Semiconductor Corporation FAN73932 • Rev. 1.0.0 www.fairchildsemi.com FAN73932 — Half-Bridge Gate Drive IC Typical Characteristics 800 750 700 280 240 200 160 120 80 40 -40 tON [ns] 650 600 550 500 450 400 -40 -20 0 20 40 60 80 100 120 tOFF [ns] -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 4. Turn-On Propagation Delay vs. Temperature Figure 5. Turn-Off Propagation Delay vs. Temperature 50 30 40 20 tR [ns] 30 tF [ns] 10 20 0 10 -10 -40 0 -40 -20 0 20 40 60 80 100 120 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 6. Turn-On Rise Time vs. Temperature Figure 7. Turn-Off Fall Time vs. Temperature 30 30 20 20 10 MTOFF [ns] -20 0 20 40 60 80 100 120 MTON [ns] 10 0 0 -10 -10 -20 -40 -20 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 8. Turn-On Delay Matching vs. Temperature Figure 9. Turn-Off Delay Matching vs. Temperature © 2008 Fairchild Semiconductor Corporation FAN73932 • Rev. 1.0.0 www.fairchildsemi.com 7 FAN73932 — Half-Bridge Gate Drive IC Typical Characteristics (Continued) 550 300 500 250 DT [ns] 450 tSD [ns] -20 0 20 40 60 80 100 120 200 400 150 350 100 300 -40 50 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 10. Dead-Time vs. Temperature Figure 11. Shutdown Propagation Delay vs. Temperature 400 120 100 IQBS [μA] IQDD [μA] 350 80 60 40 20 300 250 -40 -20 0 20 40 60 80 100 120 0 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 12. Quiescent VDD Supply Current vs. Temperature Figure 13. Quiescent VBS Supply Current vs. Temperature 1200 1000 1000 800 IPBS [μA] IPDD [μA] 800 600 600 400 400 200 200 -40 -20 0 20 40 60 80 100 120 0 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 14. Operating VDD Supply Current vs. Temperature Figure 15. Operating VBS Supply Current vs. Temperature © 2008 Fairchild Semiconductor Corporation FAN73932 • Rev. 1.0.0 www.fairchildsemi.com 8 FAN73932 — Half-Bridge Gate Drive IC Typical Characteristics (Continued) 10.0 9.5 9.5 9.0 VDDUV+ [V] VDDUV- [V] 9.0 8.5 8.5 8.0 8.0 -40 -20 0 20 40 60 80 100 120 7.5 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 16. VDD UVLO+ vs. Temperature Figure 17. VDD UVLO- vs. Temperature 10.5 10.0 9.5 10.0 VBSUV+ [V] 9.5 VBSUV- [V] -20 0 20 40 60 80 100 120 9.0 8.5 8.0 9.0 8.5 7.5 7.0 -40 8.0 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 18. VBS UVLO+ vs. Temperature Figure 19. VBS UVLO- vs. Temperature 2.0 1.8 1.6 1.4 1.0 0.8 0.6 VOL [V] VOH [V] 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -40 -20 0 20 40 60 80 100 120 0.4 0.2 0.0 -0.2 -0.4 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 20. High-Level Output Voltage vs. Temperature Figure 21. Low-Level Output Voltage vs. Temperature © 2008 Fairchild Semiconductor Corporation FAN73932 • Rev. 1.0.0 www.fairchildsemi.com 9 FAN73932 — Half-Bridge Gate Drive IC Typical Characteristics (Continued) 3.0 3.0 2.5 2.5 VIH [V] VIL [V] -20 0 20 40 60 80 100 120 2.0 2.0 1.5 1.5 1.0 1.0 -40 0.5 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 22. Logic High Input Voltage vs. Temperature Figure 23. Logic Low Input Voltage vs. Temperature 50 -8 40 -9 IIN+ [μA] 30 VS [V] -20 0 20 40 60 80 100 120 -10 20 -11 10 -12 0 -40 -13 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 24. Logic Input High Bias Current vs. Temperature . Figure 25. Allowable Negative VS Voltage vs. Temperature © 2008 Fairchild Semiconductor Corporation FAN73932 • Rev. 1.0.0 www.fairchildsemi.com 10 FAN73932 — Half-Bridge Gate Drive IC Switching Time Definitions 1 IN SD COM LO VB HO VS VDD 8 +15V HO 10uF 100nF 1nF SD 2 7 3 6 LO 1nF 4 5 +15V 10uF 100nF Figure 26. Switching Time Test Circuit IN HO skip LO skip SD Shutdown DT1 DT2 Shutdown DT2 DT1 DT1 Figure 27. Input/Output Timing Diagram IN 50% tOFF tR 50% tON 90% tR 90% LO 10% tON tR 90% 90% 10% HO 10% tOFF tF 10% Figure 28. Switching Time Waveform Definition © 2008 Fairchild Semiconductor Corporation FAN73932 • Rev. 1.0.0 www.fairchildsemi.com FAN73932 — Half-Bridge Gate Drive IC SD 50% tSD 90% HO or LO Figure 29. Shutdown Waveform Definition IN 50% tOFF 50% DTHO-LO 90% LO 10% DTLO-HO 90% HO 10% tOFF MDT= DTLO-HO - DTHO-LO Figure 30. Dead-Time Waveform Definition IN(LO) 50% 50% 50% 50% IN(HO) LO MTon HO 90% MToff 90% 10% 10% Figure 31. Delay Matching Waveform Definition © 2008 Fairchild Semiconductor Corporation FAN73932 • Rev. 1.0.0 www.fairchildsemi.com FAN73932 — Half-Bridge Gate Drive IC Mechanical Dimensions Figure 32. 8-Lead Small Outline Package (SOP) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2008 Fairchild Semiconductor Corporation FAN73932 • Rev. 1.0.0 www.fairchildsemi.com FAN73932 — Half-Bridge Gate Drive IC © 2009 Fairchild Semiconductor Corporation FAN73932 Rev. 1.0.0 www.fairchildsemi.com 14
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