FAN7393A

FAN7393A — Half-Bridge Gate Drive IC December 2010 FAN7393A Half-Bridge Gate Drive IC Features Floating Channel for Bootstrap Operation to +600V Typically 2.5A/2.5A Sourcing/Sinking Current Driving Capability Extended Allowable Negative VS Swing to -9.8V for Signal Propagation at VBS=15V High-Side Output in Phase of IN Input Signal 3.3V and 5V Input Logic Compatible Matched Propagation Delay for Both Channels Built-in Shutdown Function Built-in UVLO Functions for Both Channels Built-in Common-Mode dv/dt Noise Cancelling Circuit Internal 400ns Minimum Dead Time at RDT=0Ω Programmable Turn-On Delay Control (Dead-Time) Description The FAN7393A is a half-bridge gate-drive IC with shutdown and programmable dead-time control functions that can drive high-speed MOSFETs and Isolated Gate Bridge Transistors (IGBTs) operating up to +600V. It has a buffered output stage with all NMOS transistors designed for high-pulse-current driving capability and minimum cross-conduction. Fairchild’s high-voltage process and common-mode noise canceling techniques provide stable operation of the high-side driver under high dv/dt noise circumstances. An advanced level-shift circuit offers high-side gate driver operation up to VS=-9.8V (typical) for VBS=15V. The UVLO circuit prevents malfunction when VDD and VBS are lower than the specified threshold voltage. The high-current and low-output voltage drop feature makes this device suitable for diverse half- and fullbridge inverters; motor drive inverters, switching mode power supplies, induction heating, and high-power DCDC converter applications. Applications High-Speed Power MOSFET and IGBT Gate Driver Induction Heating High-Power DC-DC Converter Synchronous Step-Down Converter Motor Drive Inverter 14-SOP Ordering Information Part Number FAN7393AM FAN7393AMX Package 14-SOIC Operating Temperature -40°C to +125°C Packing Method Tube Tape & Reel © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 www.fairchildsemi.com FAN7393A — Half-Bridge Gate Drive IC Typical Application Diagrams +15V RBOOT DBOOT FAN7393A PWM IC Control PWM Shutdown 1 IN 2 SD 3 VSS RDT 4 DT 5 COM 6 LO 7 VDD VS 11 NC 10 NC 9 NC 8 R2 NC 14 VB 13 HO 12 R1 CBOOT Load Up to 600V Figure 1. Typical Application Circuit Internal Block Diagram 13 VB UVLO DRIVER PULSE GENERATOR IN 1 250K HS(ON/OFF) NOISE CANCELLER R S R Q 12 HO 5V 250K SCHMITT TRIGGER INPUT 11 VS 7 VDD SD 2 SHOOT-THROUGH PREVENTION RDTINT UVLO DRIVER DT 4 DEAD-TIME { DTMIN=400ns } LS(ON/OFF) VSS/COM LEVEL SHIFT DELAY 6 LO VSS 3 5 Pin 8, 9, 10 and 14 are no connection COM Figure 2. Functional Block Diagram © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 www.fairchildsemi.com 2 FAN7393A — Half-Bridge Gate Drive IC Pin Configuration IN SD VSS DT COM LO VDD 1 14 NC VB HO VS NC NC NC 2 13 FAN7393A 3 12 4 5 11 10 6 9 7 8 Figure 3. Pin Configurations (Top View) Pin Definitions Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Name IN SD VSS DT COM LO VDD NC NC NC VS HO VB NC Logic Input for Shutdown Logic Ground Description Logic Input for High-Side and Low-Side Gate Driver Output, In-Phase with HO Dead-Time Control with External Resistor (Referenced to VSS) Ground Low-Side Driver Return Supply Voltage No Connection No Connection No Connection High-Voltage Floating Supply Return High-Side Driver Output High-Side Floating Supply No Connection © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 www.fairchildsemi.com 3 FAN7393A — Half-Bridge Gate Drive IC Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA=25°C unless otherwise specified. Symbol VB VS VHO VLO VDD VIN VSD DT VSS dVS/dt PD θJA TJ TSTG Characteristics High-Side Floating Supply Voltage High-Side Floating Offset Voltage(1) High-Side Floating Output Voltage Low-Side Output Voltage Low-Side and Logic Fixed Supply Voltage Logic Input Voltage (IN) Logic Input Voltage (SD) Programmable Dead-Time Pin Voltage Logic Ground Allowable Offset Voltage Slew Rate Power Dissipation(2, 3, 4) Thermal Resistance Junction Temperature Storage Temperature Min. -0.3 VB-VSHUNT VS-0.3 -0.3 -0.3 -0.3 VSS -0.3 VDD-25 Max. 625.0 VB+0.3 VB+0.3 VDD+0.3 25.0 VDD+0.3 5.5 VDD+0.3 VDD+0.3 ± 50 1 110 +150 Unit V V V V V V V V V V/ns W °C/W °C °C -55 +150 Notes: 1. This IC contains a shunt regulator on VBS. This supply pin should not be driven by a low-impedance voltage source greater than VSHUNT specified in the Electrical Characteristics section. 2. Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material). 3. Refer to the following standards: JESD51-2: Integral circuits thermal test method environmental conditions - natural convection, and JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages. 4. Do not exceed maximum PD under any circumstances. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol VB VS VHO VDD VLO VIN VSD DT VSS TA Parameter High-Side Floating Supply Voltage High-Side Floating Supply Offset Voltage High-Side Output Voltage Low-Side and Logic Fixed Supply Voltage Low-Side Output Voltage Logic Input Voltage (IN) Logic Input Voltage (SD) Programmable Dead-Time Pin Voltage Logic Ground Operating Ambient Temperature Min. VS+10 6-VDD VS 10 COM VSS VSS VSS -5 -40 Max. VS+20 600 VB 20 VDD VDD 5 VDD +5 +125 Unit V V V V V V V V V °C © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 www.fairchildsemi.com 4 FAN7393A — Half-Bridge Gate Drive IC Electrical Characteristics VBIAS(VDD, VBS)=15.0V, VSS=COM=0V, DT=VSS, and TA=25°C unless otherwise specified. The VIN and IIN parameters are referenced to VSS/COM and are applicable to the respective input leads: IN and SD. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO and LO. Symbol IQDD IQBS IPDD IPBS ISD ILK VDDUV+ VBSUV+ VDDUVVBSUVVDDUVHVBSUVH VSHUNT VIH VIL IIN+ IINRIN SD+ SDRPSD VOH VOL IO+ IO- Characteristics Quiescent VDD Supply Current Quiescent VBS Supply Current Operating VDD Supply Current Operating VBS Supply Current Shutdown Mode Supply Current Offset Supply Leakage Current VDD and VBS Supply Under-Voltage Positive-Going Threshold Voltage VDD and VBS Supply Under-Voltage Negative-Going Threshold Voltage VDD and VBS Supply Under-Voltage Lockout Hysteresis Voltage Test Condition VIN=0V or 5V VIN=0V or 5V fIN=20KHz, No Load CL=1nF, fIN=20KHz, RMS SD=VSS VB=VS=600V Min. Typ. Max. Unit 600 55 1.0 450 650 1000 100 1.6 800 1000 10 μA μA mA μA μA μA POWER SUPPLY SECTION BOOTSTRAPPED SUPPLY SECTION VIN=0V, VDD=VBS=Sweep VIN=0V, VDD=VBS=Sweep VIN=0V, VDD=VBS=Sweep 7.8 7.3 8.8 8.3 0.5 9.8 9.3 V V V SHUNT REGULATOR SECTION Shunt Regulator Clamping Voltage for VBS Logic “1” Input Voltage for HO & Logic “0” for LO Logic “0” Input Voltage for HO & Logic “1” for LO Logic Input High Bias Current Logic Input Low Bias Current Logic Input Pull-Down Resistance Voltage(5) 2.5 0.8 100 No Load (IO=0A) No Load (IO=0A) VHO=0V, VIN=5V, PW ≤10µs VHO=15V, VIN=0V, PW ≤10µs 2.0 2.0 -5.0 -9.8 2.5 2.5 5.0 -7.0 250 Shutdown (SD) Input Positive-Going Threshold Shutdown (SD) Input Negative-Going Threshold Shutdown (SD) Input Pull-Up Resistance VIN=5V, SD=0V VIN=0V, SD=5V 100 250 5.0 5.5 20 VBS=Sweep, ISHUNT=5mA 21 23 25 V INPUT LOGIC SECTION 2.5 0.8 50 3 V V μA μA KΩ V V V KΩ 1.5 100 V mV A A V V VSDCLAMP Shutdown (SD) Input Clamping GATE DRIVER OUTPUT SECTION High-Level Output Voltage (VBIAS - VO) Low-Level Output Voltage Output High, Short-Circuit Pulsed Current(5) Output Low, Short-Circuit Pulsed Current(5) VSS/COM VSS-COM/COM-VSS Voltage Educability(5) VS Allowable Negative VS Pin Voltage for IN Signal Propagation to HO Note: 5 These parameters are guaranteed by design. © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 www.fairchildsemi.com 5 FAN7393A — Half-Bridge Gate Drive IC Dynamic Electrical Characteristics VBIAS(VDD, VBS)=15.0V, VSS=COM=0V, CL=1000pF, DT=VSS, and TA=25°C, unless otherwise specified. Symbol tON tOFF tSD MtON MtOFF tR tF DT MDT Parameter Turn-On Propagation Delay (6) Conditions VS=0V, RDT=0Ω VS=0V Min. Typ. 530 130 140 0 0 Max. 730 250 210 90 40 50 35 500 6 40 500 Unit ns ns ns ns ns ns ns ns µs ns ns Turn-Off Propagation Delay Shutdown Propagation Delay Delay Matching, HO and LO Turn-On Delay Matching, HO and LO Turn-Off Turn-On Rise Time Turn-Off Fall Time Dead Time: LO Turn-Off to HO Turn-On, HO Turn-Off to LO Turn-On Dead-Time Matching=|DTLO-HO - DTHO-LO| VS=0V VS=0V RDT=0Ω RDT=200KΩ RDT=0Ω RDT=200KΩ 300 4 25 15 400 5 0 0 Note: 6 The turn-on propagation delay includes dead time. © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 www.fairchildsemi.com 6 FAN7393A — Half-Bridge Gate Drive IC Typical Characteristics 750 700 650 200 250 High-Side Low-Side tON [ns] 550 500 450 400 350 -40 -20 0 20 40 60 80 High-Side Low-Side 100 120 tOFF [ns] 600 150 100 50 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 4. Turn-On Propagation Delay vs. Temperature Figure 5. Turn-Off Propagation Delay vs. Temperature 50 High-Side Low-Side 40 35 30 25 High-Side Low-Side tR [ns] 30 tF [ns] 20 15 10 20 10 5 0 -40 0 -40 -20 0 20 40 60 80 100 120 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 6. Turn-On Rise Time vs. Temperature Figure 7. Turn-Off Fall Time vs. Temperature 500 40 450 20 400 MDT [ns] DT1 DT2 -20 0 20 40 60 80 100 120 DT [ns] 0 350 -20 300 -40 -40 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 8. Dead Time (RDT=0Ω) vs. Temperature Figure 9. Dead Time Matching (RDT=0Ω) vs. Temperature © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 www.fairchildsemi.com 7 FAN7393A — Half-Bridge Gate Drive IC Typical Characteristics (Continued) 6.0 DT1 DT2 RDT=200KΩ 500 RDT=200KΩ 250 5.5 MDT [ns] DT [μs] 5.0 0 4.5 -250 4.0 -40 -20 0 20 40 60 80 100 120 -500 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 10. Dead Time (RDT=200KΩ) vs. Temperature Figure 11. Dead-Time Matching (RDT=200KΩ) vs. Temperature 100 75 MTON MTOFF 6 5 4 Delay Matching [ns] 50 DT [μs] 25 0 -25 -50 -75 -100 -40 -20 0 20 40 60 80 100 120 3 2 1 0 0 50 100 150 200 Temperature [°C] RDT [KΩ] Figure 12. Delay Matching vs. Temperature Figure 13. Dead Time vs. RDT 1000 200 180 900 800 tSD [ns] 160 140 120 100 -40 ISD [μA] High-Side Low-Side -20 0 20 40 60 80 100 120 700 600 500 400 300 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 14. Shutdown Propagation Delay vs. Temperature Figure 15. Shutdown Mode Supply Current vs. Temperature © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 www.fairchildsemi.com 8 FAN7393A — Half-Bridge Gate Drive IC Typical Characteristics (Continued) 1000 900 100 80 IQDD [μA] IQBS [μA] 800 700 600 500 60 40 20 400 300 -40 0 -40 -20 0 20 40 60 80 100 120 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 16. Quiescent VDD Supply Current vs. Temperature Figure 17. Quiescent VBS Supply Current vs. Temperature 1300 1200 1100 800 700 600 IPDD [μA] 1000 900 800 700 -40 IPBS [V] -20 0 20 40 60 80 100 120 500 400 300 200 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 18. Operating VDD Supply Current vs. Temperature Figure 19. Operating VBS Supply Current vs. Temperature 10.0 10.0 9.5 9.5 VDDUV+ [V] VDDUV- [V] 9.0 9.0 8.5 8.5 8.0 8.0 7.5 -40 -20 0 20 40 60 80 100 120 7.5 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 20. VDD UVLO+ vs. Temperature Figure 21. VDD UVLO- vs. Temperature © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 www.fairchildsemi.com 9 FAN7393A — Half-Bridge Gate Drive IC Typical Characteristics (Continued) 10.0 10.0 9.5 9.5 VBSUV+ [V] 9.0 VBSUV- [V] -20 0 20 40 60 80 100 120 9.0 8.5 8.5 8.0 8.0 7.5 -40 7.5 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 22. VBS UVLO+ vs. Temperature Figure 23. VBS UVLO- vs. Temperature 2.0 High-Side Low-Side 1.5 1.0 0.8 0.6 High-Side Low-Side VOH [V] VOL [V] -20 0 20 40 60 80 100 120 0.4 0.2 0.0 1.0 0.5 -0.2 -0.4 0.0 -40 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 24. High-Level Output Voltage vs. Temperature Figure 25. Low-Level Output Voltage vs. Temperature 3.0 3.0 2.5 2.5 VIH [V] VIL [V] -20 0 20 40 60 80 100 120 2.0 2.0 1.5 1.5 1.0 1.0 -40 0.5 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 26. Logic HIGH Input Voltage vs. Temperature Figure 27. Logic LOW Input Voltage vs. Temperature © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 www.fairchildsemi.com 10 FAN7393A — Half-Bridge Gate Drive IC Typical Characteristics (Continued) 50 -7 -8 -9 40 IIN+ [μA] 30 VS [V] -20 0 20 40 60 80 100 120 -10 -11 20 10 -12 -13 -40 0 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 28. Logic Input High Bias Current vs. Temperature Figure 29. Allowable Negative VS Voltage vs. Temperature 750 700 650 High-Side Low-Side 250 High-Side Low-Side tON [ns] 600 550 500 450 400 350 10 12 14 16 18 20 tOFF [ns] 200 150 100 50 10 12 14 16 18 20 Supply Voltage [V] Supply Voltage [V] Figure 30. Turn-On Propagation Delay vs. Supply Voltage Figure 31. Turn-Off Propagation Delay vs. Supply Voltage 50 High-Side Low-Side 40 35 30 25 High-Side Low-Side tR [ns] 30 tF [ns] 20 15 10 20 10 5 0 10 0 10 12 14 16 18 20 12 14 16 18 20 Supply Voltage [V] Supply Voltage [V] Figure 32. Turn-On Rise Time vs. Supply Voltage Figure 33. Turn-Off Fall Time vs. Supply Voltage © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 www.fairchildsemi.com 11 FAN7393A — Half-Bridge Gate Drive IC Typical Characteristics (Continued) 1000 900 100 80 800 IQDD [μA] IQBS [μA] 12 14 16 18 20 700 600 500 400 300 10 60 40 20 0 10 12 14 16 18 20 Supply Voltage [V] Supply Voltage [V] Figure 34. Quiescent VDD Supply Current vs. Supply Voltage Figure 35. Quiescent VBS Supply Current vs. Supply Voltage 2.0 High-Side Low-Side 1.5 1.0 0.8 0.6 High-Side Low-Side VOH [V] VOL [V] 12 14 16 18 20 0.4 0.2 0.0 1.0 0.5 -0.2 -0.4 0.0 10 10 12 14 16 18 20 Supply Voltage [V] Supply Voltage [V] Figure 36. High-Level Output Voltage vs. Supply Voltage Figure 37. Low-Level Output Voltage vs. Supply Voltage © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 www.fairchildsemi.com 12 FAN7393A — Half-Bridge Gate Drive IC Switching Time Definitions 1 SD 2 3 4 5 LO 1nF +15V 10μF 100nF 7 6 IN SD VSS DT COM LO VDD NC 14 VB 13 HO 12 1nF VS 11 NC 10 NC NC 9 8 10μF 100nF +15V Figure 38. Switching Time Test Circuit IN HO LO SD DT1 DT2 DT1 DT2 Shutdown DT2 DT1 Shutdown DT1 Figure 39. Input / Output Timing Diagram IN 50% tOFF tF 50% tON 90% tR 90% LO 10% tON tR 90% 90% 10% HO 10% tOFF tF 10% Figure 40. Switching Time Waveform Definition © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 www.fairchildsemi.com 13 FAN7393A — Half-Bridge Gate Drive IC SD 50% tSD 90% HO or LO Figure 41. Shutdown Waveform Definition IN 50% tOFF 50% DTHO-LO 90% LO 10% DTLO-HO 90% HO 10% tOFF MDT= DTLO-HO - DTHO-LO Figure 42. Dead-Time Waveform Definition IN(LO) 50% 50% 50% 50% IN(HO) MTOFF LO MTON 10% HO 90% 90% 10% Figure 43. Delay Matching Waveform Definition © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 www.fairchildsemi.com 14 FAN7393A — Half-Bridge Gate Drive IC Package Dimensions 8.76 8.36 7.62 14 8 A 0.65 B 5.60 4.15 3.75 B 6.00 B 1.70 #1 1.27 PIN ONE INDICATOR (0.27) #1 7 1.27 TOP VIEW 0.51 0.36 0.20 CBA LAND PATTERN RECOMMENDATION 1.80 MAX 1.65 1.45 SEE DETAIL A (R0.20) C 0.05MIN 1.27 SIDE VIEW 0.10 MAX C END VIEW 0.30 0.15 B NOTES: A) THIS DRAWING COMPLIES WITH JEDEC MS-012 EXCEPT AS NOTED. B) THIS DIMENSION IS OUTSIDE THE JEDEC MS-012 VALUE. C) ALL DIMENSIONS ARE IN MILLIMETERS. D) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS. E) LANDPATTERN STANDARD: SOIC127P600X145-14M F) DRAWING FILE NAME AND REVISION : M14CREV1 GAGE PLANE 8° (R0.10) 0.36 SEATING PLANE DETAIL A 0.90 0.50 Figure 49. 14-Lead, Small Outline Integrated Circuit (SOIC), Non-JEDEC, .150-Inch Narrow Body, 225SOP Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 www.fairchildsemi.com 15 FAN7393A — Half-Bridge Gate Drive IC © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 www.fairchildsemi.com 16