FAN7530_07

FAN7530 Critical Conduction Mode PFC Controller April 2007 FAN7530 Critical Conduction Mode PFC Controller Features Low Total Harmonic Distortion (THD) Precise Adjustable Output Over-Voltage Protection Open-Feedback Protection and Disable Function Zero Current Detector 150µs Internal Start-up Timer MOSFET Over-Current Protection Under-Voltage Lockout with 3.5V Hysteresis Low Start-up (40µA) and Operating Current (1.5mA) Totem Pole Output with High State Clamp +500/-800mA Peak Gate Drive Current 8-pin DIP or 8-pin SOP Description The FAN7530 is an active power factor correction (PFC) controller for the boost PFC applications that operates in critical conduction mode (CRM). It uses the voltage mode PWM that compares an internal ramp signal with the error amplifier output to generate MOSFET turn-off signal. Because the voltage mode CRM PFC controller does not need the rectified AC line voltage information, it can save the power loss of the input voltage sensing network necessary for the current mode CRM PFC controller. FAN7530 provides many protection functions such as over voltage protection, open-feedback protection, overcurrent protection, and under-voltage lockout protection. The FAN7530 can be disabled if the INV pin voltage is lower than 0.45V and the operating current decreases to 65µA. Using a new variable on-time control method, THD is lower than the conventional CRM boost PFC ICs. Applications Adapter Ballast LCD TV, CRT TV SMPS Related Application Notes AN-6027 - Design of Power Factor Correction Circuit Using FAN7530 Ordering Information Part Number FAN7530N FAN7530M FAN7530MX Operating Temp. Range -40°C to +125°C -40°C to +125°C -40°C to +125°C Pb-Free Yes Yes Yes Package 8-DIP 8-SOP 8-SOP Packing Method Rail Rail Tape & Reel Marking Code FAN7530 FAN7530 FAN7530 © 2006 Fairchild Semiconductor Corporation FAN7530 Rev. 1.0.2 www.fairchildsemi.com FAN7530 Critical Conduction Mode PFC Controller Typical Application Diagrams L AC IN VAUX NAUX RZCD R2 ZCD CO VCC MOT CS I1 COMP R1 GND FAN7530 Rev. 00 D VO I2 FAN7530 INV Figure 1. Typical Boost PFC Application Internal Block Diagram VCC 8 UVLO 2.5V Ref Internal Bias Vref1 VCC 12V 8.5V Disable 150ms Timer Drive Output 13V 7 OUT ZCD 5 6.7V 1.4V 1.5V Zero Current Detector S Q R OVP 2.675V 2.5V CS 4 40k 8pF 0.8V Ramp Signal Saw Tooth Generator Current Protection Comparator Disable 0.45V 0.35V 1V Offset Vref1 Error Amplifier Gm MOT 2 1V~5V Range 6 GND 3 COMP 1 INV FAN7530 Rev. 00 Figure 2. Functional Block Diagram of FAN7530 © 2006 Fairchild Semiconductor Corporation FAN7530 Rev. 1.0.2 2 www.fairchildsemi.com FAN7530 Critical Conduction Mode PFC Controller Pin Assignments VCC 8 OUT 7 GND 6 ZCD 5 YWW FAN7530 1 INV 2 MOT 3 COMP 4 CS FAN7530 Rev. 00 Figure 3. Pin Configuration (Top View) Pin Definitions Pin # 1 Name INV Description This pin is the inverting input of the error amplifier. The output voltage of the boost PFC converter should be resistively divided to 2.5V. This pin is used to set the slope of the internal ramp. The voltage of this pin is maintained at 3V. If a resistor is connected between this pin and GND, current flows out of the pin and the slope of the internal ramp is proportional to this current. This pin is the output of the transconductance error amplifier. Components for the output voltage compensation should be connected between this pin and GND. This pin is the input of the over-current protection comparator. The MOSFET current is sensed using a sensing resistor and the resulting voltage is applied to this pin. An internal RC filter is included to filter switching noise. This pin is the input of the zero current detection block. If the voltage of this pin goes higher than 1.5V, then goes lower than 1.4V, the MOSFET is turned on. This pin is used for the ground potential of all the pins. For proper operation, the signal ground and the power ground should be separated. This pin is the gate drive output. The peak sourcing and sinking current levels are +500mA and -800mA respectively. For proper operation, the stray inductance in the gate driving path must be minimized. This pin is the IC supply pin. IC current and MOSFET drive current are supplied using this pin. 2 MOT 3 COMP 4 CS 5 6 ZCD GND 7 OUT 8 VCC © 2006 Fairchild Semiconductor Corporation FAN7530 Rev. 1.0.2 3 www.fairchildsemi.com FAN7530 Critical Conduction Mode PFC Controller Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA = 25°C unless otherwise specified. Symbol VCC IOH, IOL Iclamp Idet VIN Tj TA Tstg VESD_HBM VESD_MM VESD_CDM Supply Voltage Parameter Peak Drive Output Current Driver Output Clamping Diodes VO>VCC or VO90% at 85Vac input) Low THD (total harmonic distortion) (