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FDC6000NZ

FDC6000NZ

  • 厂商:

    FAIRCHILD(仙童半导体)

  • 封装:

  • 描述:

    FDC6000NZ - Dual N-Channel 2.5V Specified PowerTrench MOSFET - Fairchild Semiconductor

  • 数据手册
  • 价格&库存
FDC6000NZ 数据手册
FDC6000NZ June 2004 FDC6000NZ Dual N-Channel 2.5V Specified PowerTrench MOSFET General Description This N-Channel 2.5V specified MOSFET is a rugged gate version of Fairchild's Semiconductor’s advanced PowerTrench process. It has been optimized for power management applications with a wide range of gate drive voltage (2.5V – 12V). Packaged in FLMP SSOT-6, the RDS(ON) and thermal properties of the device are optimized for battery power management applications. Features • 6.5 A, 20 V RDS(ON) = 20 mΩ @ VGS = 4.5 V RDS(ON) = 28 mΩ @ VGS = 2.5 V • ESD protection diode (note 3) • High performance trench technology for extremely low RDS(ON) • FLMP SSOT-6 package: Enhanced thermal performance in industry-standard package size Bottom Drain Contact Applications • Battery management/Charger Application • Load switch S2 S1 G1 S2 SuperSOT-6 TM 4 G2 3 2 1 Bottom Drain Contact 5 6 S1 FLMP TA=25oC unless otherwise noted MOSFET Maximum Ratings Symbol VDSS VGSS ID PD Drain-Source Voltage Gate-Source Voltage Drain Current – Continuous – Pulsed Parameter Ratings 20 ±12 (Note 1a) Units V V A W 7.3 20 1.6 1.8 1.2 –55 to +150 Power Dissipation for Dual Operation Power Dissipation for Single Operation (Note 1a) (Note 1a) (Note 1b) TJ, TSTG Operating and Storage Junction Temperature Range °C Thermal Characteristics RθJA RθJc Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1a) 68 1 °C/W Package Marking and Ordering Information Device Marking .0NZ 2004 Fairchild Semiconductor Corporation Device FDC6000NZ Reel Size 7’’ Tape width 8mm Quantity 3000 units FDC6000NZ Rev E1 (W) FDC6000NZ Electrical Characteristics Symbol BVDSS ∆BVDSS ∆TJ IDSS IGSS VGS(th) ∆VGS(th) ∆TJ RDS(on) TA = 25°C unless otherwise noted Parameter Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate–Body Leakage (Note 2) Test Conditions VGS = 0 V, ID = 250 µA Min 20 Typ Max Units V 14 1 ± 10 mV/°C µA µA V mV/°C 20 21 24 28 30 mΩ Off Characteristics ID = 250 µA, Referenced to 25°C VDS = 16 V, VGS = ±12 V, VDS = VGS, VGS = 0 V VDS = 0 V ID = 250 µA 0.6 0.9 –4 16.5 16.8 19.2 22.5 22.8 30 On Characteristics Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance 1.5 ID = 250 µA, Referenced to 25°C VGS = 4.5 V, ID = 6.5 A ID = 6.4 A VGS = 4.0 V, ID = 6.3 A VGS = 3.1 V, ID = 5.5 A VGS = 2.5 V, VGS = 4.5 V, ID = 6.5A, TJ=125°C VDS = 5 V, ID = 6.5 A gFS Forward Transconductance S Dynamic Characteristics Ciss Coss Crss RG Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance (Note 2) VDS = 10 V, f = 1.0 MHz V G S = 0 V, 840 210 100 pF pF pF Ω VGS = 15 mV, f = 1.0 MHz 2.3 Switching Characteristics td(on) tr td(off) tf Qg Qgs Qgd IS VSD Turn–On Delay Time Turn–On Rise Time Turn–Off Delay Time Turn–Off Fall Time Total Gate Charge Gate–Source Charge Gate–Drain Charge VDD = 10 V, VGS = 4.5 V, ID = 1 A, RGEN = 6 Ω 10 15 18 9 20 27 32 18 11 ns ns ns ns nC nC nC VDS = 10 V, VGS = 4.5 V ID = 6.5 A, 8 1.5 2.1 Drain–Source Diode Characteristics and Maximum Ratings Maximum Continuous Drain–Source Diode Forward Current Drain–Source Diode Forward Voltage VGS = 0 V, IS = 1.25A (Note 2) 1.25 0.7 1.2 A V FDC6000NZ RevE1 (W) FDC6000NZ Electrical Characteristics Symbol trr Qrr NOTES: TA = 25°C unless otherwise noted Parameter Diode Reverse Recovery Time Diode Reverse Recovery Charge Test Conditions IF = 6.5 A, diF/dt = 100 A/µs Min Typ Max Units 16 4.3 nS nC Drain–Source Diode Characteristics and Maximum Ratings 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 68°C/W when mounted on a 1in2 pad of 2 oz copper (Single Operation). b) 102°C/W when mounted on a minimum pad of 2 oz copper (Single Operation). Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% 3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. 4. Electrical characterization and datasheet limits was based on a single source configuration (pin 2 & 5 no connection). FDC6000NZ RevE1 (W) FDC6000NZ Dimensional Outline and Pad Layout Bottom View Recommended Landing Pattern For Common Drain Configuration Recommended Landing Pattern For Standard Dual Configuration Top View FDC6000NZ RevE1 (W) FDC6000NZ Typical Characteristics 20 3 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS = 4.5V 3.5V 2.5V 3.0V 2.0V 2.8 2.6 2.4 2.2 2 1.8 1.6 1.4 1.2 1 0.8 0 VGS = 1.8V ID, DRAIN CURRENT (A) 15 10 2.0V 1.8V 5 2.5V 3.0V 3.5V 4.5V 15 20 0 0 0.5 1 1.5 2 2.5 VDS, DRAIN-SOURCE VOLTAGE (V) 5 10 ID, DRAIN CURRENT (A) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.062 1.6 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE RDS(ON), ON-RESISTANCE (OHM) ID = 6.5A VGS = 4.5V 1.4 0.057 0.052 0.047 0.042 0.037 0.032 0.027 0.022 0.017 ID = 3.3 A 1.2 TA = 125oC 1 0.8 TA = 25oC 0.6 -50 -25 0 25 50 75 100 o 125 150 0.012 1 2 3 4 5 VGS, GATE TO SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE ( C) Figure 3. On-Resistance Variation with Temperature. 30 IS, REVERSE DRAIN CURRENT (A) VDS = 5V 25 ID, DRAIN CURRENT (A) 20 15 10 5 0 1 1.5 2 2.5 VGS, GATE TO SOURCE VOLTAGE (V) TA = -55oC 125oC 25oC Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 VGS = 0V 10 TA = 125oC 1 25oC 0.1 -55oC 0.01 0.001 0.0001 0 0.2 0.4 0.6 0.8 1 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDC6000NZ Rev E1(W) FDC6000NZ Typical Characteristics 5 VGS, GATE-SOURCE VOLTAGE (V) ID = 6.5A 4 VDS = 5V 10V CAPACITANCE (pF) 1200 1000 CISS 800 600 400 200 CRSS 0 COSS f = 1MHz VGS = 0 V 15V 3 2 1 0 0 2 4 6 8 10 Qg, GATE CHARGE (nC) 0 5 10 15 20 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. 100 P(pk), PEAK TRANSIENT POWER (W) Figure 8. Capacitance Characteristics. 50 RDS(ON) LIMIT ID, DRAIN CURRENT (A) 10 10ms 100ms 1s 100µs 1ms 40 SINGLE PULSE RθJA = 102°C/W TA = 25°C 30 1 10s DC VGS = 4.5V SINGLE PULSE RθJA = 102oC/W TA = 25oC 20 0.1 10 0.01 0.1 1 10 100 VDS, DRAIN-SOURCE VOLTAGE (V) 0 0.0001 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 D = 0.5 R θJA (t) = r(t) * R θ JA R θ JA = 1 02 °C/W P(pk) t1 t2 T J - T A = P * R θ JA (t) Duty Cycle, D = t1 / t2 SINGLE PULSE 0.2 0.1 0.1 0.05 0.02 0.01 0 .01 0.0001 0.001 0.01 0.1 t 1, TIME (sec) 1 10 100 1000 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. FDC6000NZ Rev E1(W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FAST ActiveArray™ FASTr™ Bottomless™ FPS™ CoolFET™ FRFET™ CROSSVOLT™ GlobalOptoisolator™ DOME™ GTO™ EcoSPARK™ HiSeC™ E2CMOS™ I2C™ EnSigna™ i-Lo™ FACT™ ImpliedDisconnect™ FACT Quiet Series™ ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC Across the board. Around the world.™ OPTOPLANAR™ PACMAN™ The Power Franchise POP™ Programmable Active Droop™ Power247™ PowerSaver™ PowerTrench QFET QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ µSerDes™ SILENT SWITCHER SMART START™ SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic TINYOPTO™ TruTranslation™ UHC™ UltraFET VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I11
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