FDC6036P

FDC6036P January 2004 FDC6036P P-Channel 1.8V Specified PowerTrench MOSFET General Description This dual P-Channel 1.8V specified MOSFET uses Fairchild’s advanced low voltage PowerTrench process. Packaged in FLMP SSOT-6, the RDS(ON) and thermal properties of the device are optimized for battery power management applications. Features • –5 A, –20 V. RDS(ON) = 44 mΩ @ VGS = –4.5 V RDS(ON) = 64 mΩ @ VGS = –2.5 V RDS(ON) = 95 mΩ @ VGS = –1.8 V • Low gate charge, High Power and Current handling capability • High performance trench technology for extremely low RDS(ON) • FLMP SSOT-6 package: Enhanced thermal performance in industry-standard package size Bottom Drain Contact Applications • Battery management/Charger Application • Load switch 4 5 6 Bottom Drain Contact 3 2 1 MOSFET Maximum Ratings Symbol VDSS VGSS ID PD TA=25oC unless otherwise noted Parameter Drain-Source Voltage Gate-Source Voltage Drain Current – Continuous – Pulsed Power Dissipation for Dual Operation Power Dissipation for Single Operation (Note 1a) (Note 1b) (Note 1a) Ratings –20 ±8 –5 –20 1.8 1.8 0.9 –55 to +150 Units V V A W TJ, Tstg Operating and Storage Junction Temperature Range °C Thermal Characteristics RθJA RθJC .036 2004 Fairchild Semiconductor Corporation Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) 68 1 °C/W Package Marking and Ordering Information FDC6036P 7’’ 8mm 3000 units FDC6036P Rev C2 (W) FDC6036P Electrical Characteristics Symbol BVDSS ∆BVDSS ∆TJ IDSS IGSS TA = 25°C unless otherwise noted Parameter Test Conditions ID = –250 µA Min –20 Typ Max Units V Off Characteristics Drain–Source BreakdownVoltage VGS = 0 V, Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate–Body Leakage (Note 2) ID = –250 µA, Referenced to 25°C VDS = –16 V, VGS = ±8 V, VGS = 0 V VDS = 0 V –24 –1 ±100 mV/°C µA nA On Characteristics VGS(th) ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance VDS = VGS, ID = –250 µA –0.4 –0.7 4.4 37 52 74 51 16 –1.5 V mV/°C ID = –250 µA, Referenced to 25°C VGS = –4.5 V, ID = –5.0 A ID = –4.0 A VGS = –2.5 V, ID = –3.2 A VGS = –1.8 V, VGS = –4.5 V,ID = –5 A,TJ=125°C VDS = –5 V, ID = –5 A 44 64 95 61 mΩ gfs Forward Transconductance S Dynamic Characteristics Ciss Coss Crss Rg Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance (Note 2) VDS = –10 V, f = 1.0 MHz VGS = 0 V, 992 169 85 pF pF pF mΩ V GS = 15 mV f = 1.0 MHz 8.6 Switching Characteristics td(on) tr td(off) tf Qg Qgs Qgd Turn–On Delay Time Turn–On Rise Time Turn–Off Delay Time Turn–Off Fall Time Total Gate Charge Gate–Source Charge Gate–Drain Charge VDD = –10 V, VGS = –4.5 V, ID = –1 A, RGEN = 6 Ω 12 10 40 20 24 20 64 36 14 ns ns ns ns nC nC nC VDS = –10 V, VGS = –4.5 V ID = –5 A, 10 1.7 2.0 Drain–Source Diode Characteristics and Maximum Ratings IS VSD trr Qrr Maximum Continuous Drain–Source Diode Forward Current Drain–Source Diode Forward Voltage Diode Reverse Recovery Time Diode Reverse Recovery Charge VGS = 0 V, IS = –1.25 A (Note 2) –1.25 –0.7 19 7.8 –1.2 A V ns nC IF = –5 A, diF/dt = 100 A/µs FDC6036P Rev C2 (W) FDC6036P Electrical Characteristics NOTES: TA = 25°C unless otherwise noted 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 60°C/W when mounted on a 1in2 pad of 2 oz copper (Single Operation). b) 130°C/W when mounted on a minimum pad of 2 oz copper (Single Operation). Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% FDC6036P Rev C2 (W) FDC6036P Dimensional Outline and Pad Layout Bottom View Recommended Landing Pattern Top View FDC6036P Rev C2 (W) FDC6036P Typical Characteristics 20 2.6 -2.5V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS =-4.5V -ID, DRAIN CURRENT (A) 15 2.4 2.2 2 1.8 1.6 1.4 1.2 1 0.8 0 5 10 -ID, DRAIN CURRENT (A) 15 -2.0V VGS =-1.8V 10 -1.8V -2.0V -2.5V 5 -1.5V -4.5V 0 0 1 2 3 4 5 -VDS, DRAIN-SOURCE VOLTAGE (V) 20 Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.15 1.4 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 1.3 1.2 1.1 1 0.9 0.8 -50 RDS(ON), ON-RESISTANCE (OHM) ID = -5A VGS = -4.5V ID = -2.5A 0.13 0.11 0.09 TA = 125oC TA = 25oC 0.07 0.05 -25 0 25 50 75 100 125 150 0.03 1 2 3 4 5 -VGS, GATE TO SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE (oC) Figure 3. On-Resistance Variation with Temperature. 15 TA = -55 C 125oC 9 o Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 10 VGS = 0V 1 TA = 125oC 0.1 25oC 0.01 -55oC 0.001 25oC -ID, DRAIN CURRENT (A) 12 6 3 -IS, REVERSE DRAIN CURRENT (A) VDS = -5V 0 0.5 1 1.5 2 2.5 -VGS, GATE TO SOURCE VOLTAGE (V) 0.0001 0 0.2 0.4 0.6 0.8 1 1.2 -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDC6036P Rev C2 (W) FDC6036P Typical Characteristics 5 -VGS, GATE-SOURCE VOLTAGE (V) 1500 ID = -5A Vds = -5V -10V CAPACITANCE (pF) 1250 Ciss 1000 750 500 Coss 250 Crss 0 0 2 4 6 8 10 12 f = 1MHz VGS = 0 V 4 -15V 3 2 1 0 Qg, GATE CHARGE (nC) 0 5 10 15 20 -VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. 100 RDS(ON) LIMIT 10 Figure 8. Capacitance Characteristics. 10 -ID, DRAIN CURRENT (A) 1 100µs 1ms 10ms 100ms 1s 10s DC 8 SINGLE PULSE o RθJA = 130 C/W TA = 2 5 C o POWER (W) 6 4 0.1 VGS = -4.5V SINGLE PULSE o RθJA = 130 C/W T A = 25 C o 2 0.01 0.1 1 10 100 -VDS, DRAIN-SOURCE VOLTAGE (V) 0 0.01 0.1 1 10 100 1000 SINGLE PULSE TIME (SEC) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 D = 0.5 0.2 RθJA(t) = r(t) * RθJA RθJA = 130 °C/W P(pk) t1 t2 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 0.1 0.1 0.05 0.02 0.01 SINGLE PULSE 0.01 0.0001 0.001 0.01 0.1 t1, TIME (sec) 1 10 100 1000 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. FDC6036P Rev C2 (W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FACT Quiet Series™ ActiveArray™ FAST Bottomless™ FASTr™ CoolFET™ FPS™ CROSSVOLT™ FRFET™ DOME™ GlobalOptoisolator™ EcoSPARK™ GTO™ E2CMOSTM HiSeC™ EnSignaTM I2C™ FACT™ ImpliedDisconnect™ Across the board. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I7