November 1997
FDC634P P-Channel Enhancement Mode Field Effect Transistor
General Description
These P-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications such as cellular phone and notebook computer power management and other battery powered circuits where high-side switching, and low in-line power loss are needed in a very small outline surface mount package.
Features
-3.5 A, -20 V. RDS(ON) = 0.080 Ω @ VGS = -4.5 V RDS(ON) = 0.110 Ω @ VGS = -2.5 V. SuperSOTTM-6 package design using copper lead frame for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability.
SOT-23
SuperSOTTM-6
SuperSOTTM-8
SO-8
SOT-223
SOIC-16
S D D
1
6
.63
pin 1
4
2 5
G D D SuperSOT
TM
-6
3
4
Absolute Maximum Ratings T A = 25°C unless otherwise note
Symbol Parameter VDSS VGSS ID PD Drain-Source Voltage Gate-Source Voltage - Continuous Drain Current - Continuous - Pulsed Maximum Power Dissipation
(Note 1a) (Note 1b) (Note 1a)
FDC634P -20 ±8 -3.5 -11 1.6 0.8 -55 to 150
Units V V A
W
TJ,TSTG RθJA RθJC
Operating and Storage Temperature Range
°C
THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)
78 30
°C/W °C/W
© 1997 Fairchild Semiconductor Corporation
FDC634P Rev.C
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Zero Gate Voltage Drain Current VGS = 0 V, ID = -250 µA ID = -250 µA, Referenced to 25 o C VDS = -16 V, VGS = 0 V TJ = 55 C IGSSF IGSSR VGS(th) Gate - Body Leakage, Forward Gate - Body Leakage, Reverse VGS = 8 V, VDS = 0 V VGS = -8 V, VDS= 0 V VDS = VGS, ID = -250 µA ID = -250 µA, Referenced to 25 o C VGS = -4.5 V, ID = -3.5 A TJ = 125 C VGS = -2.5 V, ID= -3.1 A ID(on) gFS Ciss Coss Crss tD(on) tr tD(off) tf Qg Qgs Qgd IS VSD
Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a. 78oC/W when mounted on a 1 in2 pad of 2oz Cu in FR-4 board. b. 156oC/W when mounted on a minimum pad of 2oz Cu in FR-4 board. 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
o o
-20 -29 -1 -10 100 -100
V mV /oC µA µA nA nA
∆BVDSS/∆TJ
IDSS
ON CHARACTERISTICS (Note 2) Gate Threshold Voltage Gate Threshold VoltageTemp.Coefficient Static Drain-Source On-Resistance -0.4 -0.6 2.1 0.07 0.099 0.093 -10 6.5 0.08 0.13 0.11 A S -1 V mV /oC
∆VGS(th)/∆TJ
RDS(ON)
Ω
On-State Drain Current Forward Transconductance
VGS = -4.5 V, VDS = -5 V VDS = -10 V, ID= -3.5 A VDS = -10 V, VGS = 0 V, f = 1.0 MHz
DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance 665 270 70 pF pF pF
SWITCHING CHARACTERISTICS (Note 2) Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = -5 V, ID = -3.5 A, VGS = -4.5 V VDD = -5 V, ID = -1 A, VGS = -4.5 V, RGEN = 6 Ω 8 24 50 29 9.5 1.3 2.2 16 38 80 45 13 ns ns ns ns nC nC nC
DRAIN-SOURCE DIODE CHARACTERISTICS Continuous Source Diode Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = -1.3 A
(Note 2)
-1.3 -0.75 -0.6 -1.2 -1 TJ = 125oC
A V
FDC634P Rev.C
Typical Electrical Characteristics
15
2
-I D , DRAIN-SOURCE CURRENT (A)
R DS(ON), NORMALIZED
12
-3.5 -3.0 -2.5
DRAIN-SOURCE ON-RESISTANCE
VGS = -4.5V
1.8
V GS = -2.0 V
1.6 1.4 1.2 1 0.8
9
-2.0
6
-2.5 -3.5 -3.0 -4.5
3
-1.5
0
0
1
2 3 4 -VDS , DRAIN-SOURCE VOLTAGE (V)
5
0
3
6
9
12
15
-I D , DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
1.6 DRAIN-SOURCE ON-RESISTANCE
0.25
I D = -3.5A
1.4
V GS = -4.5V
R DS(ON) , ON-RESISTANCE (OHM)
ID = -1.8A
0.2
R DS(ON) , NORMALIZED
1.2
0.15
1
T = 125°C J
0.1
0.8
25°C
0.05
0.6 -50
-25
0 25 50 75 100 TJ , JUNCTION TEMPERATURE (°C)
125
150
1
2
3
4
5
-VGS , GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with Temperature.
Figure 4. On Resistance Variation with Gate-To- Source Voltage.
-IS , REVERSE DRAIN CURRENT (A)
15
15
VDS = -5.0V
-ID , DRAIN CURRENT (A) 12
T = -55°C J
VGS = 0V
1
25°C 125°C
TJ = 125°C 25°C -55°C
9
0.1
6
0.01
3
0.001
0
0
0.5
1
1.5
2
2.5
3
0.0001
0
0.2
0.4
0.6
0.8
1
1.2
1.4
-VGS , GATE TO SOURCE VOLTAGE (V)
-VSD , BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.
FDC634P Rev.C
Typical Electrical And Thermal Characteristics
5 -VGS , GATE-SOURCE VOLTAGE (V)
2000
I D = -3.5A
4
VDS = -5V -10V
CAPACITANCE (pF)
1200 800 600
Ciss
3
-15V
Coss
200
2
1
80
f = 1 MHz VGS = 0 V
0 2 4 6 8 10
Crss
0 Qg , GATE CHARGE (nC)
30 0.1
0.2
0.5
1
2
5
10
30
-VDS , DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
20 10 -I D , DRAIN CURRENT (A) 5
RD S(O N) I LIM T
5
100
1m s 10 ms 10 0m s 1s DC
us
4 POWER (W)
1 0.3 0.1 0.03 0.01 0.1
3
SINGLE PULSE RθJA =See note 1b TA = 25°C
2
VGS = -4.5V SINGLE PULSE RθJA = See Note 1b A T A = 25°C
0.2 0.5 -V
DS
1
1
2
5
10
20
40
0 0.01
0.1
1
10
100
300
, DRAIN-SOURCE VOLTAGE (V)
SINGLE PULSE TIME (SEC)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power Dissipation.
1
r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE
0.5
D = 0.5
0.2 0.1 0.05
0.2 0.1 P(pk) 0.05 0.02 0.01 Single Pulse
RθJA (t) = r(t) * R θJA R θJA = See Note 1b
t1 TJ - T
A
t2
0.02 0.01 0.0001
= P * R JA(t) θ Duty Cycle, D = t 1/ t 2
0.01 0.1 t 1, TIME (sec) 1 10 100 300
0.001
Figure 11. Transient Thermal Response Curve.
Note: Thermal characterization performed using the conditions described in note 1b.Transient thermal response will change depending on the circuit board design.
FDC634P Rev.C