FDC6401N

FDC6401N October 2001 FDC6401N Dual N-Channel 2.5V Specified PowerTrench® MOSFET General Description This Dual N-Channel MOSFET has been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized for low gate charge, low RDS(ON) and fast switching speed. Features • 3.0 A, 20 V. RDS(ON) = 70 mΩ @ VGS = 4.5 V RDS(ON) = 95 mΩ @ VGS = 2.5 V • Low gate charge (3.3 nC) • High performance trench technology for extremely low RDS(ON) • High power and current handling capability Applications • DC/DC converter • Battery Protection • Power Management D2 S1 D1 4 5 G2 3 2 1 SuperSOT TM -6 S2 G1 TA=25 C unless otherwise noted o 6 Absolute Maximum Ratings Symbol VDSS VGSS ID PD Drain-Source Voltage Gate-Source Voltage Drain Current – Continuous – Pulsed Parameter Ratings 20 ±12 (Note 1a) Units V V A W 3.0 12 0.96 0.9 0.7 –55 to +150 Power Dissipation for Single Operation (Note 1a) (Note 1b) (Note 1c) TJ, TSTG Operating and Storage Junction Temperature Range °C Thermal Characteristics RθJA RθJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 130 60 °C/W °C/W Package Marking and Ordering Information Device Marking .401 Device FDC6401N Reel Size 7’’ Tape width 8mm Quantity 3000 units ©2001 Fairchild Semiconductor Corporation FDC6401N Rev C (W) FDC6401N Electrical Characteristics Symbol BVDSS ∆BVDSS ∆TJ IDSS IGSSF IGSSR TA = 25°C unless otherwise noted Parameter Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate–Body Leakage, Forward Gate–Body Leakage, Reverse (Note 2) Test Conditions VGS = 0 V, ID = 250 µ A Min 20 Typ Max Units V Off Characteristics ID = 250 µ A, Referenced to 25°C VDS = 16 V, VGS = 12 V, VGS = –12 V VGS = 0 V VDS = 0 V VDS = 0 V ID = 250 µ A 13 1 –100 100 mV/°C µA nA nA On Characteristics VGS(th) ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance On–State Drain Current Forward Transconductance VDS = VGS, 0.5 0.9 –3 50 66 71 1.5 V mV/°C ID = 250 µ A, Referenced to 25°C VGS = 4.5 V, ID = 3.0 A VGS = 2.5 V, ID = 2.5 A VGS = 4.5 V, ID = 3.0 A,TJ=125°C VGS = 4.5 V, VDS = 5 V VDS = 5V, ID = 3.0 A 70 95 106 mΩ ID(on) gFS 12 10 A S Dynamic Characteristics Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance (Note 2) VDS = 10 V, f = 1.0 MHz V GS = 0 V, 324 82 42 pF pF pF Switching Characteristics td(on) tr td(off) tf Qg Qgs Qgd Turn–On Delay Time Turn–On Rise Time Turn–Off Delay Time Turn–Off Fall Time Total Gate Charge Gate–Source Charge Gate–Drain Charge VDD = 10 V, ID = 1 A, VGS = 4.5 V, RGEN = 6 Ω 5 7 13 1.6 10 14 23 3 4.6 ns ns ns ns nC nC nC VDS = 10 V, VGS = 4.5 V ID = 3.0 A, 3.3 0.95 0.7 Drain–Source Diode Characteristics and Maximum Ratings IS VSD Maximum Continuous Drain–Source Diode Forward Current Drain–Source Diode Forward VGS = 0 V, IS = 0.8 A Voltage 0.8 (Note 2) A V 0.7 1.2 Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 130 °C/W when mounted on a 0.125 2 in pad of 2 oz. copper. b) 140 °C/W when 2 mounted on a .004 in pad of 2 oz copper c) 180 C°/W when mounted on a minimum pad. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% FDC6401N Rev C (W) FDC6401N Typical Characteristics 12 R DS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 2 VGS = 4.5V ID, DRAIN CURRENT (A) 10 3.5V 8 6 4 2 0 0 3.0V 2.5V VGS = 2.0V 1.8 1.6 2.0V 1.4 2.5V 1.2 3.0V 3.5V 4.5V 1 1 2 3 0.8 0 2 4 6 8 10 12 ID, DIRAIN CURRENT (A) VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.22 RDS(ON), ON-RESISTANCE (OHM) 1.6 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID = 3.0A VGS = 4.5V 1.4 ID = 1.5A 0.18 1.2 0.14 TA = 125 C 0.1 o 1 0.8 0.06 TA = 25 C 0.02 o 0.6 -50 -25 0 25 50 75 100 o 125 150 1 2 3 4 5 TJ, JUNCTION TEMPERATURE ( C) VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. 10 IS, REVERSE DRAIN CURRENT (A) Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 VDS = 5V ID, DRAIN CURRENT (A) 8 TA = -55oC 25 C o VGS = 0V 10 1 0.1 0.01 0.001 0.0001 125oC 6 TA = 125oC 25 C -55oC o 4 2 0 0.5 1 1.5 2 2.5 3 VGS, GATE TO SOURCE VOLTAGE (V) 0 0.2 0.4 0.6 0.8 1 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDC6401N Rev C (W) FDC6401N Typical Characteristics 5 VGS , GATE-SOURCE VOLTAGE (V) 450 ID = 3A VDS = 5V 15V 10V 360 CAPACITANCE (pF) CISS 270 f = 1 MHz VGS = 0 V 4 3 2 180 COSS 90 CRSS 1 0 0 1 2 Qg, GATE CHARGE (nC) 3 4 0 0 5 10 15 20 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. 100 10 Figure 8. Capacitance Characteristics. P(pk), PEAK TRANSIENT POWER (W) ID, DRAIN CURRENT (A) RDS(ON) LIMIT 10 1ms 10ms 1 VGS = 4.5V SINGLE PULSE RθJA = 180oC/W TA = 25 C 0.01 0.1 1 10 o 100µs 8 SINGLE PULSE RθJA = 180°C/W TA = 25°C 6 100ms 1s DC 4 0.1 2 100 0 0.01 0.1 1 10 100 1000 VDS, DRAIN-SOURCE VOLTAGE (V) t1, TIME (sec) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 D = 0.5 0.2 0.1 0.1 0.05 0.02 0.01 RθJA(t) = r(t) * RθJA RθJA = 180°C/W P(pk) t1 t2 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 0.01 SINGLE PULSE 0.001 0.0001 0.001 0.01 0.1 t1, TIME (sec) 1 10 100 1000 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. FDC6401N Rev C (W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT ™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ DISCLAIMER FAST ® FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench ® QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER ® SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™ UltraFET ® VCX™ STAR*POWER is used under license FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H4