FDC653

November 1997 FDC653N N-Channel Enhancement Mode Field Effect Transistor General Description This N-Channel enhancement mode power field effect transistors is produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications in notebook computers, portable phones, PCMICA cards, and other battery powered circuits where fast switching, and low in-line power loss are needed in a very small outline surface mount package. Features 5 A, 30 V. RDS(ON) = 0.035 Ω @ VGS = 10 V RDS(ON) = 0.055 Ω @ VGS = 4.5 V. Proprietary SuperSOTTM-6 package design using copper lead frame for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability. SOT-23 SuperSOTTM-6 SuperSOTTM-8 SO-8 SOT-223 SOIC-16 S D D 1 6 3 .65 G pin 1 2 5 D D SuperSOT TM 3 -6 4 Absolute Maximum Ratings Symbol Parameter VDSS VGSS ID PD Drain-Source Voltage Gate-Source Voltage - Continuous Drain Current - Continuous - Pulsed Maximum Power Dissipation T A = 25°C unless otherwise note FDC653N 30 ±20 (Note 1a) Units V V A 5 15 (Note 1a) (Note 1b) 1.6 0.8 -55 to 150 W TJ,TSTG RθJA RθJC Operating and Storage Temperature Range °C THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 78 30 °C/W °C/W © 1997 Fairchild Semiconductor Corporation FDC653N Rev.C ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Zero Gate Voltage Drain Current VGS = 0 V, ID = 250 µA ID = 250 µA, Referenced to 25 o C VDS = 24 V, VGS = 0 V TJ = 55 C IGSSF IGSSR VGS(th) Gate - Body Leakage, Forward Gate - Body Leakage, Reverse VGS = 20 V, VDS = 0 V VGS = -20 V, VDS= 0 V VDS = VGS, ID = 250 µA ID = 250 µA, Referenced to 25 o C VGS = 10 V, ID = 5 A TJ = 125 C VGS = 4.5 V, ID = 4.2 A ID(on) gFS Ciss Coss Crss tD(on) tr tD(off) tf Qg Qgs Qgd IS VSD Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a. 78oC/W when mounted on a minimum on a 1 in2 pad of 2oz Cu in FR-4 board. b. 156oC/W when mounted on a minimum pad of 2oz Cu in FR-4 board. 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%. o o 30 31 1 10 100 -100 V mV /oC µA µA nA nA ∆BVDSS/∆TJ IDSS ON CHARACTERISTICS (Note 2) Gate Threshold Voltage Gate Threshold VoltageTemp.Coefficient Static Drain-Source On-Resistance 1 1.7 -4.2 0.027 0.042 0.046 8 6.2 0.035 0.056 0.055 A S 2 V mV /oC ∆VGS(th)/∆TJ RDS(ON) Ω On-State Drain Current Forward Transconductance VGS = 10 V, VDS = 5 V VDS = 10 V, ID= 5 A VDS = 15 V, VGS = 0 V, f = 1.0 MHz DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance 350 220 80 pF pF pF SWITCHING CHARACTERISTICS (Note 2) Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = 15 V, ID = 5 A, VGS = 10 V VDD = 10 V, ID = 1 A, VGS = 4.5 V, RGEN = 6 Ω 7.5 12 13 6 12 2.1 2.6 15 25 25 15 17 ns ns ns ns nC nC nC DRAIN-SOURCE DIODE CHARACTERISTICS Continuous Source Diode Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = 1.3 A (Note 2) 1.3 0.75 0.6 1.2 1 TJ = 125oC A V FDC653N Rev.C Typical Electrical Characteristics 15 I D , DRAIN-SOURCE CURRENT (A) 3.5 6.0 R DS(ON) , NORMALIZED 5.0 12 DRAIN-SOURCE ON-RESISTANCE VGS = 10V 4.5 4.0 3 2.5 VGS =3.5V 9 4.0 2 1.5 1 0.5 6 3.5 4.5 5.0 6.0 10 3 3.0 0 0 0.5 1 1.5 2 0 3 VDS , DRAIN-SOURCE VOLTAGE (V) 6 9 I D , DRAIN CURRENT (A) 12 15 Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.8 DRAIN-SOURCE ON-RESISTANCE RDS(ON) , NORMALIZED 0.18 R DS(ON) , ON-RESISTANCE (OHM) I D = 5.0A 1.6 1.4 1.2 1 0.8 0.6 -50 I D =2A 0.15 0.12 0.09 V GS = 10V TA = 125°C 0.06 TA = 25°C 0.03 0 -25 0 25 50 75 100 T , JUNCTION TEMPERATURE (°C) J 125 150 2 4 6 8 VGS , GATE TO SOURCE VOLTAGE (V) 10 Figure 3. On-Resistance Variation with Temperature. Figure 4. On Resistance Variation with Gate-To- Source Voltage. 15 15 I S , REVERSE DRAIN CURRENT (A) V DS = 5V VGS =0V 1 I D , DRAIN CURRENT (A) 12 TA= 125°C 25°C 9 TA = -55°C 6 0.1 25°C 125°C 0.01 -55°C 3 0.001 0 1.5 0.0001 2 2.5 3 3.5 4 4.5 VGS , GATE TO SOURCE VOLTAGE (V) 0 0.2 0.4 0.6 0.8 1 1.2 V SD , BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDC653N Rev.B Typical Electrical And Thermal Characteristics 1000 10 VGS , GATE-SOURCE VOLTAGE (V) ID = 5.0A 8 V DS = 5V 10V CAPACITANCE (pF) 500 Ciss Coss 6 15V 200 4 2 100 f = 1 MHz V GS = 0V 0.3 V DS Crss 0 0 2 4 6 8 10 12 14 Q g , GATE CHARGE (nC) 50 0.1 1 3 10 30 , DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics. 30 10 I D , DRAIN CURRENT (A) 3 1 0.3 0.1 0.03 0.01 0.1 S( ) ON LIM IT 5 100 1m s 10m s 100 ms RD us 4 POWER (W) 3 SINGLE PULSE RθJA =See note 1b TA = 25°C VGS = 10V SINGLE PULSE RθJA = See Note 1b TA = 25°C 0.2 0.5 1 2 1s DC 2 1 5 10 30 50 0 0.01 0.1 1 10 100 300 V DS , DRAIN-SOURCE VOLTAGE (V) SINGLE PULSE TIME (SEC) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. 1 r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 0.5 D = 0.5 0.2 0.1 0.05 0.2 0.1 P(pk) 0.05 0.02 0.01 Single Pulse RθJA (t) = r(t) * R θJA R θJA = See Note 1b t1 TJ - T A t2 0.02 0.01 0.0001 = P * R JA(t) θ Duty Cycle, D = t 1/ t 2 0.01 0.1 t 1, TIME (sec) 1 10 100 300 0.001 Figure 11. Transient Thermal Response Curve. Note: Thermal characterization performed using the conditions described in note 1b.Transient thermal response will change depending on the circuit board design. FDC653N Rev.B