April 1999
FDC6561AN Dual N-Channel Logic Level PowerTrenchTM MOSFET
General Description Features
2.5 A, 30 V. RDS(ON) = 0.095 Ω @ VGS = 10 V RDS(ON) = 0.145 Ω @ VGS = 4.5 V Very fast switching. Low gate charge (2.1nC typical). SuperSOTTM-6 package: small footprint (72% smaller than standard SO-8); low profile (1mm thick).
These N-Channel Logic Level MOSFETs are produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain low gate charge for superior switching performance. These devices are well suited for all applications where small size is desireable but especially low cost DC/DC conversion in battery powered systems.
SOT-23
SuperSOTTM-6
SuperSOTTM-8
SO-8
SOT-223
SOIC-16
D2 S1 D1
1 .56
G2 S2
4
3
5
2
SuperSOT TM-6
pin 1
G1
6
1
Absolute Maximum Ratings
Symbol Parameter
TA = 25°C unless otherwise note
Ratings
Units
VDSS VGSS ID PD
Drain-Source Voltage Gate-Source Voltage - Continuous Drain Current - Continuous - Pulsed Maximum Power Dissipation
(Note 1a) (Note 1b) (Note 1c)
30 ±20 2.5 10 0.96 0.9 0.7 -55 to 150
V V A
W
TJ,TSTG RθJA RθJC
Operating and Storage Temperature Range
°C
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)
130 60
°C/W °C/W
FDC6561AN Rev.C
© 1999 Fairchild Semiconductor Corporation
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS
BVDSS
Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Zero Gate Voltage Drain Current
VGS = 0 V, ID = 250 µA ID = 250 µA, Referenced to 25 C VDS = 24 V, VGS = 0 V TJ = 55 oC VGS = 20 V, VDS = 0 V VGS = -20 V, VDS = 0 V
o
30 23.6 1 10 100 -100
V mV/oC µA µA nA nA
∆BVDSS/∆TJ
IDSS IGSSF IGSSR
Gate - Body Leakage, Forward Gate - Body Leakage, Reverse
ON CHARACTERISTICS (Note 2)
VGS(th)
Gate Threshold Voltage Gate Threshold VoltageTemp.Coefficient Static Drain-Source On-Resistance
VDS = VGS, ID = 250 µA ID = 250 µA, Referenced to 25 oC VGS = 10 V, ID = 2.5 A TJ = 125 C VGS = 4.5 V, ID = 2.0 A
o
1
1.8 -4 0.082 0.122 0.113
3
V mV/oC
∆VGS(th)/∆TJ
RDS(ON)
0.095 0.152 0.145
Ω
ID(on) gFS Ciss Coss Crss tD(on) tr tD(off) tf Qg Qgs Qgd IS VSD
Notes:
On-State Drain Current Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Continuous Source Diode Current Drain-Source Diode Forward Voltage
VGS = 10 V, VDS = 5 V VDS = 5 V, ID = 2.5 A VDS = 15 V, VGS = 0 V, f = 1.0 MHz
10 5 220 50 25
A S pF pF pF 12 18 22 6 3.2 1 1.3 0.75 ns ns ns ns nC nC nC A V
DYNAMIC CHARACTERISTICS
SWITCHING CHARACTERISTICS (Note 2)
VDD = 5 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω
6 10 12 2
VDS = 15 V, ID = 2.5 A VGS = 5 V
2.3 0.7 0.9
DRAIN-SOURCE DIODE CHARACTERISTICS
VGS = 0 V, IS = 0.75 A
(Note 2)
0.78
1.2
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
a. 130OC/W on a 0.125 in2 pad of 2oz copper.
b. 140OC/W on a 0.005 in2 pad of 2oz copper.
c. 180OC/W on a minimum pad.
FDC6561AN Rev.C
Typical Electrical Characteristics
10 I D , DRAIN-SOURCE CURRENT (A)
DRAIN-SOURCE ON-RESISTANCE
VGS =10V 6.0V
4.5V 4.0V
R DS(ON) , NORMALIZED
2 1.8 1.6 1.4 1.2 1 0.8
8
VGS = 4.0V 4.5V 5.0V 6.0V 7.0V 10V
6
4
3.5V
2
3.0V
0
0
1 2 3 V DS , DRAIN-SOURCE VOLTAGE (V)
4
0
2
4 6 I D , DRAIN CURRENT (A)
8
10
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
1.6 DRAIN-SOURCE ON-RESISTANCE
R DS(ON) , ON-RESISTANCE (OHM)
0.3
I D = 2.5 A VGS = 10 V
1.4
I D = 1.3A
0.25
R DS(ON) , NORMALIZED
1.2
0.2
1
0.15
TA = 125°C
0.8
0.1
TA = 25°C
0.05 2 4 6 8 VGS , GATE TO SOURCE VOLTAGE (V) 10
0.6 -50
-25
0 25 50 75 100 TJ , JUNCTION TEMPERATURE (°C)
125
150
Figure 3. On-Resistance Variation with Temperature.
Figure 4. On-Resistance Variation with Gate-to-Source Voltage.
10
10
ID , DRAIN CURRENT (A)
8
TA = -55°C
125°C 25°C
IS , REVERSE DRAIN CURRENT (A)
VDS = 5V
V GS = 0V
1
TA = 125°C
0.1
6
25°C -55°C
4
0.01
2
0.001
0
1
2
3 4 5 VGS , GATE TO SOURCE VOLTAGE (V)
6
0.0001
0
0.2 0.4 0.6 0.8 1 1.2 V SD , BODY DIODE FORWARD VOLTAGE (V)
1.4
Figure 5.Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.
FDC6561AN Rev.C
Typical Electrical Characteristics (continued)
10 VGS , GATE-SOURCE VOLTAGE (V)
500
ID = 2.5A
8
C iss
CAPACITANCE (pF)
VDS = 5V
15V
200 100
6
10V
4
C oss
50
2
20
0
f = 1 MHz V GS = 0V
C rss
0
1
2 Q g , GATE CHARGE (nC)
3
4
10 0.1
0.5 1 2 5 10 VDS , DRAIN TO SOURCE VOLTAGE (V)
30
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
30 10 I D , DRAIN CURRENT (A) 3 1 0.3 0.1 0.03 0.01 0.1
) ON S( RD IT LIM
5
100 us
4 POWER (W)
1m s 10m s 100 ms 1s DC
SINGLE PULSE RθJA =180°C/W TA = 25°C
3
2
VGS = 10V SINGLE PULSE RθJA =180°C/W TA = 25°C
0.3 1 3
1
10
30
50
0 0.01
0.1
1
10
100
300
VDS , DRAIN-SOURCE VOLTAGE (V)
SINGLE PULSE TIME (SEC)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power Dissipation.
TRANSIENT THERMAL RESISTANCE
1 0.5
D = 0.5
r(t), NORMALIZED EFFECTIVE
0.2 0.1 0.05
0.2 0.1 0.05 0.02 0.01
R θJA (t) = r(t) * R θJA R θJA =180°C/W
P(pk)
t1
t2
0.02 0.01 0.0001
Single Pulse
TJ - T A = P * R JA (t) θ Duty Cycle, D = t 1 / t 2
0.001
0.01
0.1 t 1 , TIME (sec)
1
10
100
300
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design.
FDC6561AN Rev.C
SuperSOTTM-6 Tape and Reel Data and Package Dimensions
SSOT-6 Packaging Configuration: Figure 1.0
Customize Label
Antistatic Cover Tape
Conductive Embossed Carrier Tape
F63TNR Label
631
SSOT-6 Packaging Information Packaging Option Packaging type Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg) Note/Comments Standard (no flow code) TNR 3,000 7” Dia 184x187x47 9,000 0.0158 0.1440 D87Z TNR 10,000 13” 343x343x64 20,000 0.0158 0.4700
631
631
631
Pin 1
SSOT-6 Unit Orientation
343mm x 342mm x 64mm Intermediate box for D87Z Option
F63TNR Label
F63TNR Label
F63TNR Label sample 184mm x 184mm x 47mm Pizza Box for Standard Option F63TNR Label
LOT: CBVK741B019 FSID: FDC633N QTY: 3000 SPEC:
Trailer SSOT-6 Tape Leader Configuration: Figure 2.0
D/C1: D9842 D/C2:
QTY1: QTY2:
SPEC REV: CPN:
QARV: (F63TNR)2
Carrier Tape Cover Tape
Trailer Tape 160mm minimum
Components
Leader Tape 390mm minimum
© 1998 Fairchild Semiconductor Corporation
December 1998, Rev. B
SuperSOTTM-6 Tape and Reel Data and Package Dimensions, continued
SSOT-6 Embossed Carrier Tape Configuration: Figure 3.0
T E1
P0
D0
F K0 Wc B0 E2 W
Tc A0 P1 D1
User Direction of Feed
Dimensions are in millimeter Pkg type SSOT-6 (8mm)
A0
3.23 +/-0.10
B0
3.18 +/-0.10
W
8.0 +/-0.3
D0
1.55 +/-0.05
D1
1.00 +/-0.125
E1
1.75 +/-0.10
E2
6.25 min
F
3.50 +/-0.05
P1
4.0 +/-0.1
P0
4.0 +/-0.1
K0
1.37 +/-0.10
T
0.255 +/-0.150
Wc
5.2 +/-0.3
Tc
0.06 +/-0.02
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481 rotational and lateral movement requirements (see sketches A, B, and C).
20 deg maximum Typical component cavity center line
0.5mm maximum
B0 20 deg maximum component rotation
0.5mm maximum
Sketch A (Side or Front Sectional View)
Component Rotation
A0 Sketch B (Top View)
Typical component center line
Sketch C (Top View)
Component lateral movement
SSOT-6 Reel Configuration: Figure 4.0
Component Rotation
W1 Measured at Hub
Dim A Max
Dim A max
Dim N
See detail AA
7” Diameter Option
B Min Dim C See detail AA W3
Dim D min
13” Diameter Option
W2 max Measured at Hub DETAIL AA
Dimensions are in inches and millimeters
Tape Size
8mm
Reel Option
7” Dia
Dim A
7.00 177.8 13.00 330
Dim B
0.059 1.5 0.059 1.5
Dim C
512 +0.020/-0.008 13 +0.5/-0.2 512 +0.020/-0.008 13 +0.5/-0.2
Dim D
0.795 20.2 0.795 20.2
Dim N
2.165 55 4.00 100
Dim W1
0.331 +0.059/-0.000 8.4 +1.5/0 0.331 +0.059/-0.000 8.4 +1.5/0
Dim W2
0.567 14.4 0.567 14.4
Dim W3 (LSL-USL)
0.311 – 0.429 7.9 – 10.9 0.311 – 0.429 7.9 – 10.9
8mm
13” Dia
December 1998, Rev. B
SuperSOTTM-6 Tape and Reel Data and Package Dimensions, continued
SuperSOT™-6 (FS PKG Code 31, 33)
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in: inches [millimeters]
Part Weight per unit (gram): 0.0158
© 1998 Fairchild Semiconductor Corporation
September 1998, Rev. A
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACEx™ CoolFET™ CROSSVOLT™ E2CMOSTM FACT™ FACT Quiet Series™ FAST® FASTr™ GTO™ HiSeC™
DISCLAIMER
ISOPLANAR™ MICROWIRE™ POP™ PowerTrench™ QS™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 TinyLogic™
UHC™ VCX™
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
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Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.