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FDC699P

FDC699P

  • 厂商:

    FAIRCHILD(仙童半导体)

  • 封装:

  • 描述:

    FDC699P - P-Channel 2.5V PowerTrencH MOSFET - Fairchild Semiconductor

  • 数据手册
  • 价格&库存
FDC699P 数据手册
FDC699P January 2004 FDC699P P-Channel 2.5V PowerTrench MOSFET General Description This P-Channel 2.5V specified MOSFET is a rugged gate version of Fairchild Semiconductor’s advanced PowerTrench process. It has been optimized for power management applications with a wide range of gate drive voltage (2.5V – 12V). Features • –7 A, –20 V RDS(ON) = 22 mΩ @ VGS = –4.5 V RDS(ON) = 30 mΩ @ VGS = –2.5 V • High performance trench technology for extremely low RDS(ON) • Fast switching speed • FLMP SuperSOT-6 package: Enhanced thermal performance in industry-standard package size Applications • • • Battery management Load Switch Battery protection G S S S SuperSOT-6 TM 1 S 6 5 Bottom Drain 2 3 4 S FLMP Absolute Maximum Ratings Symbol VDSS VGSS ID PD TJ, TSTG Drain-Source Voltage Gate-Source Voltage Drain Current – Continuous – Pulsed Power Dissipation TA=25oC unless otherwise noted Parameter Ratings –20 ±12 (Note 1a) Units V V A W °C –7 –40 2 1.5 –55 to +150 (Note 1a) (Note 1b) Operating and Storage Junction Temperature Range Thermal Characteristics RθJA RθJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1b) 60 111 0.5 °C/W Package Marking and Ordering Information Device Marking .699 Device FDC699P Reel Size 7’’ Tape width 8mm Quantity 3000 units 2004 Fairchild Semiconductor Corporation FDC699P Rev C2 (W) FDC699P Electrical Characteristics Symbol BVDSS ∆BVDSS ∆TJ IDSS IGSS VGS(th) ∆VGS(th) ∆TJ RDS(on) TA = 25°C unless otherwise noted Parameter Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate–Body Leakage (Note 2) Test Conditions VGS = 0 V, ID = –250 µA Min –20 Typ Max Units V Off Characteristics ID = – 250 µA, Referenced to 25°C VDS = –16 V, VGS = ±12 V, VGS = 0 V VDS = 0 V –0.6 –0.9 3 14 21 17 30 –12 –1 ±100 –1.5 mV/°C µA nA On Characteristics Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance Forward Transconductance ID = –250 µA VDS = VGS, ID = – 250 µA, Referenced to 25°C VGS = –4.5 V, ID = –7 A VGS = –2.5 V, ID = –6 A VGS = –4.5 V, ID = –7 A, TJ =125°C VDS = –5 V, ID = –7 A V mV/°C 22 30 31 mΩ gFS Ciss Coss Crss RG td(on) tr td(off) tf Qg Qgs Qgd IS VSD trr Qrr Notes: 1. S Dynamic Characteristics Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance (Note 2) VDS = – 10 V, f = 1.0 MHz V G S = 0 V, 2640 560 280 3.6 pF pF pF Ω 28 19 120 65 38 ns ns ns ns nC nC nC VGS = 15 mV, f = 1.0 MHz VDD = –10 V, ID = –1 A, VGS = –4.5 V, RGEN = 6 Ω Switching Characteristics Turn–On Delay Time Turn–On Rise Time Turn–Off Delay Time Turn–Off Fall Time Total Gate Charge Gate–Source Charge Gate–Drain Charge 16 11 75 41 VDS = –10 V, VGS = –5 V ID = –7 A, 27 5 7 Drain–Source Diode Characteristics and Maximum Ratings Maximum Continuous Drain–Source Diode Forward Current Drain–Source Diode Forward IS = –1.6 A VGS = 0 V, Voltage Reverse Recovery Time IF = –7 A, diF/dt = 100 A/µs Reverse Recovery Charge –1.6 (Note 2) A V ns nC –0.7 28 14 –1.2 RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 60°C/W when mounted on a 1in2 pad of 2 oz copper b) 111°C/W when mounted on a minimum pad of 2 oz copper Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% FDC699P Rev C2 (W) FDC699P Dimensional Outline and Pad Layout Bottom View Top View Recommended Landing Pattern FDC699P Rev C2 (W) FDC699P Typical Characteristics 40 VGS = -4.5V -3.5V -ID, DRAIN CURRENT (A) 30 -3.0V -2.5V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 2.8 2.6 2.4 2.2 2 1.8 1.6 1.4 1.2 1 0.8 0 10 20 -ID, DRAIN CURRENT (A) 30 VGS = -2.0V 20 -2.0V -2.5V -3.0V -3.5V -4.0V -4.5V 10 0 0 0.5 1 1.5 2 -VDS, DRAIN-SOURCE VOLTAGE (V) 2.5 40 Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.05 1.4 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE RDS(ON), ON-RESISTANCE (OHM) 1.3 1.2 1.1 1 0.9 0.8 -50 ID = -7A VGS = -4.5V ID = -3.5A 0.045 0.04 0.035 0.03 0.025 0.02 TA = 125oC TA = 25oC 0.015 0.01 -25 0 25 50 75 100 o TJ, JUNCTION TEMPERATURE ( C) 125 150 1 2 3 4 5 -VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation withTemperature. 40 Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 -IS, REVERSE DRAIN CURRENT (A) VDS = -5V -ID, DRAIN CURRENT (A) 30 10 1 0.1 VGS = 0V TA = 125oC 20 25oC 25oC 10 TA = 125 C o 0.01 -55oC 0.001 -55oC 0 0.5 1 1.5 2 2.5 -VGS, GATE TO SOURCE VOLTAGE (V) 3 0.0001 0 0.2 0.4 0.6 0.8 1 1.2 -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDC699P Rev C2 (W) FDC699P Typical Characteristics 5 -VGS, GATE-SOURCE VOLTAGE (V) ID = -7A VDS = -5V 4 -15V 3 -10V 4000 3500 CAPACITANCE (pF) 3000 2500 2000 1500 1000 500 Coss CISS f = 1MHz VGS = 0 V 2 1 Crss 0 0 5 10 15 20 Qg, GATE CHARGE (nC) 25 30 0 0 5 10 15 -VDS, DRAIN TO SOURCE VOLTAGE (V) 20 Figure 7. Gate Charge Characteristics. 100 100µs 1ms 10ms 100ms 1s Figure 8. Capacitance Characteristics. 50 P(pk), PEAK TRANSIENT POWER (W) RDS(ON) LIMIT 10µs -ID, DRAIN CURRENT (A) 10 40 SINGLE PULSE RθJA = 111°C/W TA = 25°C 30 1 10s DC VGS = -4.5V SINGLE PULSE RθJA = 111oC/W TA = 25oC 20 0.1 10 0.01 0.1 1 10 -VDS, DRAIN-SOURCE VOLTAGE (V) 100 0 0.001 0.01 0.1 1 t1, TIME (sec) 10 100 1000 Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. 1 r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE D = 0.5 0.2 RθJA(t) = r(t) * RθJA RθJA = 111 °C/W 0.1 0.1 0.05 0.02 P(pk) t1 t2 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 SINGLE PULSE 0.01 0.01 0.001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. FDC699P Rev C2 (W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FACT Quiet Series™ ActiveArray™ FAST Bottomless™ FASTr™ CoolFET™ FPS™ CROSSVOLT™ FRFET™ DOME™ GlobalOptoisolator™ EcoSPARK™ GTO™ E2CMOSTM HiSeC™ EnSignaTM I2C™ FACT™ ImpliedDisconnect™ Across the board. Around the world.™ The Power Franchise™ Programmable Active Droop™ DISCLAIMER ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench QFET QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ SILENT SWITCHER SMART START™ SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic TINYOPTO™ TruTranslation™ UHC™ UltraFET VCX™ FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I7
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