FDG315

FDG315

  • 厂商:

    FAIRCHILD(仙童半导体)

  • 封装:

  • 描述:

    FDG315 - N-Channel Logic Level PowerTrench MOSFET - Fairchild Semiconductor

  • 详情介绍
  • 数据手册
  • 价格&库存
FDG315 数据手册
FDG315N July 2000 FDG315N N-Channel Logic Level PowerTrench MOSFET General Description This N-Channel Logic Level MOSFET is produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize on-state resistance and yet maintain superior switching performance. These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required. Features • 2 A, 30 V. RDS(ON) = 0.12 Ω @ VGS = 10 V RDS(ON) = 0.16 Ω @ VGS = 4.5 V. • • • Low gate charge (2.1nC typical). High performance trench technology for extremely low RDS(ON). Compact industry standard SC70-6 surface mount package. Applications • • • DC/DC converter Load switch Power Management D D S 1 6 2 5 SC70-6 D D G 3 4 Absolute Maximum Ratings Symbol VDSS VGSS ID PD TJ, Tstg Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed TA = 25°C unless otherwise noted Parameter Ratings 30 ±20 2 6 0.75 0.48 -55 to +150 Units V V A W °C (Note 1a) Power Dissipation for Single Operation (Note 1a) (Note 1b) Operating and Storage Junction Temperature Range Thermal Characteristics RθJA Thermal Resistance, Junction-to-Ambient (Note 1b) 260 °C/W Package Marking and Ordering Information Device Marking .15 Device FDG315N Reel Size 7’’ Tape Width 8mm Quantity 3000 units 2000 Fairchild Semiconductor International FDG315N Rev. C FDG315N Electrical Characteristics Symbol BVDSS ∆BVDSS ∆TJ IDSS IGSS IGSS TA = 25°C unless otherwise noted Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Forward Gate-Body Leakage Reverse (Note 2) Test Conditions VGS = 0 V, ID = 250 µA ID = 250 µA, Referenced to 25°C VDS = 24 V, VGS = 0 V VGS = 16 V, VDS = 0 V VGS = -16 V, VDS = 0 V Min 30 Typ Max Units V Off Characteristics 26 1 100 -100 mV/°C µA nA nA On Characteristics VGS(th) ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance On-State Drain Current Forward Transconductance VDS = VGS, ID = 250 µA ID = 250 µA, Referenced to 25°C VGS = 10 V, ID = 2 A VGS = 10 V, ID = 2 A, TJ = 125°C VGS = 4.5 V, ID = 1.7 A VGS = 4.5 V, VDS = 5 V VDS = 5 V, ID = 2 A 1 1.8 -4 0.100 0.140 0.130 3 V mV/°C 0.12 0.20 0.16 Ω ID(on) GFS 3 5 A S Dynamic Characteristics Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance (Note 2) VDS = 15 V, VGS = 0 V, f = 1.0 MHz 220 50 20 pF pF pF Switching Characteristics Id(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = 15 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω 3 11 7 3 6 22 14 6 4 ns ns ns ns nC nC nC VDS = 15 V, ID = 2 A, VGS = 5 V 2.1 0.8 0.7 Drain-Source Diode Characteristics and Maximum Ratings IS VSD Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = 0.42 A (Note 2) 0.42 0.7 1.2 A V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 170°C/W when mounted on a 1 in2 pad of 2oz copper. b) 260°C/W when mounted on a minimum pad. 2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0% FDG315N Rev. C FDG315N Typical Characteristics 10 4.5V 4.0V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID, DRAIN-SOURCE CURRENT (A) VGS = 10V 8 6.0V 5.0V 6 3.5V 4 3.0V 2 1.8 V GS = 3 .5V 1.6 4.0V 1.4 1.2 1 0.8 0 1 2 3 4 0 2 4 6 8 10 VDS, DRAIN-SOURCE VOLTAGE (V) I D, DRAIN CURRENT (A) 4.5V 5.0V 6.0V 8.0V 10V 2 0 Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.35 RDS(ON), ON-RESISTANCE (OHM) ID = 1A 0.3 0.25 0.2 TA = 125oC 0.15 0.1 0.05 0 1.6 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID = 2 A VGS = 10V 1.4 1.2 1 0.8 TA = 25oC 0.6 -50 -25 0 25 50 75 100 o 125 150 2 4 6 8 10 TJ, JUNCTION TEMPERATURE ( C) VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. 10 125 C o Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 10 IS, REVERSE DRAIN CURRENT (A) VDS = 5V ID, DRAIN CURRENT (A) 8 T A = -55oC 25oC V GS = 0 V 1 TA = 125oC 25oC 6 0.1 -55 oC 4 0.01 2 0 1 2 3 4 5 VGS, GATE TO SOURCE VOLTAGE (V) 0.001 0.2 0.4 0.6 0.8 1 1.2 V SD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDG315N Rev. C FDG315N Typical Characteristics (continued) 10 VGS, GATE-SOURCE VOLTAGE (V) ID = 2A 8 VDS = 5V 10V 300 250 CAPACITANCE (pF) CISS 200 150 100 50 0 0 1 2 3 4 5 f = 1MHz VGS = 0 V 15V 6 4 2 COSS CRSS 0 Qg, GATE CHARGE (nC) 0 5 10 15 20 25 30 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate-Charge Characteristics. Figure 8. Capacitance Characteristics. 10 RDS(ON) LIMIT ID, DRAIN CURRENT (A) 1ms 10ms POWER (W) 30 SINGLE PULSE 24 RθJA= 260 C/W TA= 25 C o o 1 100ms 1s 10s 18 0.1 VGS = 10V SINGLE PULSE o RθJA = 260 C/W TA = 2 5 C o DC 12 6 0.01 0.1 1 10 100 VDS, DRAIN-SOURCE VOLTAGE (V) 0 0.0001 0.001 0.01 0.1 1 10 100 1000 SINGLE PULSE TIME (SEC) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. 1 TRANSIENT THERMAL RESISTANCE r(t), NORMALIZED EFFECTIVE 0.5 D = 0.5 0.2 R θJA (t) = r(t) * R θJA R θJA =260°C/W P(pk) 0.1 0.05 0.1 0.05 0.01 0.02 Single Pulse t1 t2 TJ - TA = P * R θJA (t) Duty Cycle, D = t 1 / t 2 0.01 0.005 0.0001 0.001 0.01 0.1 t1 , TIME (sec) 1 10 100 300 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient themal response will change depending on the circuit board design. FDG315N Rev. C TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DOME™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST® DISCLAIMER FASTr™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ POP™ PowerTrench® QFET™ QS™ QT Optoelectronics™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ VCX™ FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. F1
FDG315
PDF文档中包含的物料型号为:MAX31855。

器件简介:MAX31855是一款冷结补偿的逐次逼近寄存器(SAR)ADC,专为K型热电偶温度测量而设计。

引脚分配:MAX31855有8个引脚,包括V+、GND、SO、CS、CLK、DOUT、DGND和REF。

参数特性:工作温度范围为-40°C至+125°C,供电电压范围为2.0V至5.5V,转换速率为16次/秒。

功能详解:MAX31855能够直接读取K型热电偶的温度值,并将模拟信号转换为数字信号。

应用信息:适用于高精度温度测量应用,如工业过程控制、环境监测等。

封装信息:MAX31855采用SOIC-8封装。
FDG315 价格&库存

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