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FDMS6673BZ

FDMS6673BZ

  • 厂商:

    FAIRCHILD(仙童半导体)

  • 封装:

  • 描述:

    FDMS6673BZ - P-Channel PowerTrench® MOSFET -30 V, -28 A, 6.8 mΩ - Fairchild Semiconductor

  • 数据手册
  • 价格&库存
FDMS6673BZ 数据手册
FDMS6673BZ P-Channel PowerTrench® MOSFET August 2009 FDMS6673BZ P-Channel PowerTrench® MOSFET -30 V, -28 A, 6.8 m Features Max rDS(on) = 6.8 m Max rDS(on) = 12.5 m at VGS = -10 V, ID = -15.2 A at VGS = -4.5 V, ID = -11.2 A General Description The FDMS6673BZ has been designed to minimize losses in load switch applications. Advancements in both silicon and package technologies have been combined to offer the lowest rDS(on) and ESD protection. Advanced Package and Silicon combination for low rDS(on) HBM ESD protection level of 8 kV typical(note 3) MSL1 robust package design RoHS Compliant Applications Load Switch in Notebook and Server Notebook Battery Pack Power Management Top Bottom S Pin 1 S S G D D D D D D D D 5 6 7 8 4 3 2 1 G S S S Power 56 MOSFET Maximum Ratings TC = 25 °C unless otherwise noted Symbol VDS VGS Parameter Drain to Source Voltage Gate to Source Voltage Drain Current -Continuous (Package limited) ID -Continuous (Silicon limited) -Continuous -Pulsed PD TJ, TSTG Power Dissipation Power Dissipation TC = 25 °C TA = 25 °C (Note 1a) TC = 25 °C TC = 25 °C TA = 25 °C (Note 1a) Ratings -30 ±25 -28 -90 -15.2 -120 73 2.5 -55 to +150 W °C A Units V V Operating and Storage Junction Temperature Range Thermal Characteristics R R JC JA Thermal Resistance, Junction to Case Thermal Resistance, Junction to Ambient (Note 1a) 1.7 50 °C/W Package Marking and Ordering Information Device Marking FDMS6673BZ Device FDMS6673BZ Package Power 56 Reel Size 13 ’’ Tape Width 12 mm Quantity 3000 units ©2009 Fairchild Semiconductor Corporation FDMS6673BZ Rev C3 1 www.fairchildsemi.com FDMS6673BZ P-Channel PowerTrench® MOSFET Electrical Characteristics TJ = 25 °C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS BVDSS TJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Source Leakage Current ID = -250 A, VGS = 0 V ID = -250 A, referenced to 25 °C VDS = -24 V, VGS = 0 V VGS = ±25 V, VDS = 0 V -30 -18 -1 ±10 V mV/°C A A On Characteristics VGS(th) VGS(th) TJ rDS(on) gFS Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient Static Drain to Source On Resistance Forward Transconductance VGS = VDS, ID = -250 A ID = -250 A, referenced to 25 °C VGS = -10 V, ID = -15.2 A VGS = -4.5 V, ID = -11.2 A VGS = -10 V, ID = -15.2 A, TJ = 125 °C VDS = -5 V, ID = -15.2 A -1.0 -1.8 7 5.2 7.8 7.5 76 6.8 12.5 9.8 S m -3.0 V mV/°C Dynamic Characteristics Ciss Coss Crss Rg Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance VDS = -15 V, VGS = 0 V, f = 1 MHz 4444 781 695 4.5 5915 1040 1045 pF pF pF Switching Characteristics td(on) tr td(off) tf Qg Qg Qgs Qgd Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Total Gate Charge Gate to Source Charge Gate to Drain “Miller” Charge VGS = 0 V to -10 V VGS = 0 V to -5 V VDD = -15 V, ID = -15.2 A VDD = -15 V, ID = -15.2 A, VGS = -10 V, RGEN = 6 14 28 97 79 93 52 13 26 26 45 156 127 130 73 ns ns ns ns nC nC nC nC Drain-Source Diode Characteristics VSD trr Qrr Source to Drain Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0 V, IS = -2.1 A VGS = 0 V, IS = -15.2 A IF = -15.2 A, di/dt = 100 A/ s (Note 2) (Note 2) 0.7 0.8 33 20 JC 1.20 1.25 53 32 C A is V ns nC determined by Notes: 1: R JA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R the user's board design. is guaranteed by design while R a. 50 °C/W when mounted on a 1 in2 pad of 2 oz copper. b. 125 °C/W when mounted on a minimum pad of 2 oz copper. 2: Pulse Test: Pulse Width < 300 s, Duty cycle < 2.0%. 3: The diode connected between the gate and source servers only as protection against ESD. No gate overvoltage rating is implied. ©2009 Fairchild Semiconductor Corporation FDMS6673BZ Rev C3 2 www.fairchildsemi.com FDMS6673BZ P-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted 120 100 -ID, DRAIN CURRENT (A) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = - 10 V VGS = - 6 V VGS = - 4.5 V 4.0 3.5 3.0 VGS = -3.5 V VGS = -4 V VGS = -4.5 V VGS = -3 V PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX 80 VGS = -4 V 60 40 20 PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX VGS = -3.5 V 2.5 2.0 1.5 1.0 VGS = -10 V VGS = -6 V VGS = -3 V 0 0 1 2 3 4 -VDS, DRAIN TO SOURCE VOLTAGE (V) 0.5 0 20 40 60 80 100 120 -ID, DRAIN CURRENT (A) Figure 1. On Region Characteristics Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 1.6 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 25 SOURCE ON-RESISTANCE (m ) 1.4 1.2 1.0 0.8 ID = -15.2 A VGS = -10 V rDS(on), DRAIN TO 20 15 10 5 PULSE DURATION = 80 s ID = -15.2 A DUTY CYCLE = 0.5% MAX TJ = 125 oC TJ = 25 oC 0.6 -75 -50 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) 0 2 4 6 8 10 -VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On Resistance vs Junction Temperature 120 -IS, REVERSE DRAIN CURRENT (A) Figure 4. On-Resistance vs Gate to Source Voltage 200 100 10 1 0.1 0.01 TJ = -55 oC 100 -ID, DRAIN CURRENT (A) PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX VGS = 0 V VDS = -5 V 80 60 40 TJ = 150 oC TJ = -55 oC TJ = 150 oC TJ = 25 oC 20 TJ = 25 oC 0 0 1 2 3 4 5 -VGS, GATE TO SOURCE VOLTAGE (V) 0.001 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current ©2009 Fairchild Semiconductor Corporation FDMS6673BZ Rev C3 3 www.fairchildsemi.com FDMS6673BZ P-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted -VGS, GATE TO SOURCE VOLTAGE (V) 10 ID = -15.2 A 10000 CAPACITANCE (pF) 8 VDD = 10 V Ciss 6 VDD = 15 V VDD = 20 V 4 2 1000 Coss f = 1 MHz VGS = 0 V Crss 0 0 20 40 60 80 100 Qg, GATE CHARGE (nC) 300 0.1 1 10 30 -VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage 100 -ID, DRAIN CURRENT (A) 50 -IAS, AVALANCHE CURRENT (A) 80 60 VGS = 10 V 10 TJ = 100 oC TJ 125 oC = 25 oC 40 20 VGS = 4.5 V TJ = Limited by Package 1 0.01 0.1 1 10 100 200 0 25 R JC = 1.7 o C/W 50 75 100 o 125 150 tAV, TIME IN AVALANCHE (ms) TC, CASE TEMPERATURE ( C) Figure 9. Unclamped Inductive Switching Capability 200 100 100 us -ID, DRAIN CURRENT (A) Figure 10. Maximum Continuous Drain Current vs Case Temperature 10 -Ig, GATE LEAKAGE CURRENT (A) -4 VGS = 0 V 1 ms 10 10 10 10 -5 10 10 ms TJ = 125 oC -6 1 THIS AREA IS LIMITED BY rDS(on) 100 ms 1s 10 s DC -7 TJ = 25 oC 0.1 SINGLE PULSE TJ = MAX RATED R JA = 125 o -8 C/W TA = 25 oC 0.01 0.01 10 -9 0.1 1 10 100 200 0 5 10 15 20 25 30 -VDS, DRAIN to SOURCE VOLTAGE (V) -VGS, GATE TO SOURCE VOLTAGE (V) Figure 11. Forward Bias Safe Operating Area Figure 12. Igss vs Vgss ©2009 Fairchild Semiconductor Corporation FDMS6673BZ Rev C3 4 www.fairchildsemi.com FDMS6673BZ P-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted 2000 P(PK), PEAK TRANSIENT POWER (W) 1000 VGS = -10 V 100 SINGLE PULSE R JA = 125 oC/W TA = 25 oC 10 1 0.5 -4 10 10 -3 10 -2 10 -1 1 10 100 1000 t, PULSE WIDTH (sec) Figure 13. Single Pulse Maximum Power Dissipation 2 1 NORMALIZED THERMAL IMPEDANCE, Z JA DUTY CYCLE-DESCENDING ORDER 0.1 D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM 0.01 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x Z JA x R t1 t2 SINGLE PULSE 0.001 0.0004 -4 10 10 -3 R JA = 125 o C/W -1 JA + TA 10 -2 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 14. Junction-to-Ambient Transient Thermal Response Curve ©2009 Fairchild Semiconductor Corporation FDMS6673BZ Rev C3 5 www.fairchildsemi.com FDMS6673BZ P-Channel PowerTrench® MOSFET Dimensional Outline and Pad Layout ©2009 Fairchild Semiconductor Corporation FDMS6673BZ Rev C3 6 www.fairchildsemi.com FDMS6673BZ P-Channel PowerTrench® MOSFET TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. AccuPower™ FPS™ PowerTrench® The Power Franchise® Auto-SPM™ F-PFS™ PowerXS™ ® Build it Now™ FRFET® Programmable Active Droop™ SM ® Global Power Resource CorePLUS™ QFET TinyBoost™ Green FPS™ QS™ CorePOWER™ TinyBuck™ Green FPS™ e-Series™ Quiet Series™ CROSSVOLT™ TinyCalc™ Gmax™ RapidConfigure™ CTL™ TinyLogic® GTO™ Current Transfer Logic™ ® TINYOPTO™ IntelliMAX™ EcoSPARK ™ TinyPower™ ISOPLANAR™ EfficentMax™ Saving our world, 1mW /W /kW at a time™ TinyPWM™ MegaBuck™ EZSWITCH™* SmartMax™ TinyWire™ ™* MICROCOUPLER™ SMART START™ TriFault Detect™ MicroFET™ SPM® TRUECURRENT™* MicroPak™ STEALTH™ ® MillerDrive™ SuperFET™ Fairchild® MotionMax™ SuperSOT™-3 Fairchild Semiconductor® Motion-SPM™ SuperSOT™-6 UHC® ® FACT Quiet Series™ Ultra FRFET™ OPTOLOGIC SuperSOT™-8 FACT® OPTOPLANAR® UniFET™ SupreMOS™ ® FAST® VCX™ SyncFET™ FastvCore™ VisualMax™ Sync-Lock™ FETBench™ XS™ ®* PDP SPM™ FlashWriter® * Power-SPM™ tm tm tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. ANTI-COUNTERFEITING POLICY Fairchild Semiconductor Corporation’s Anti-Counterfeiting Policy. Fairchild’s Anti-Counterfeiting Policy is also stated on our external website, www.Fairchildsemi.com, under Sales Support. Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild Distributors are genuine parts, have full traceability, meet Fairchild’s quality standards for handing and storage and provide access to Fairchild’s full range of up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative / In Design Definition Datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I41 Preliminary First Production No Identification Needed Obsolete Full Production Not In Production ©2009 Fairchild Semiconductor Corporation FDMS6673BZ Rev C3 7 www.fairchildsemi.com
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